net/mlx5: allocate packet pacing context
This patch allocates the Packet Pacing context from the kernel, configures one according to requested pace send scheduling granularity and assigns to Clock Queue. Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
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@ -568,6 +568,8 @@ struct mlx5_dev_txpp {
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struct mlx5dv_devx_event_channel *echan; /* Event Channel. */
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struct mlx5_txpp_wq clock_queue; /* Clock Queue. */
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struct mlx5_txpp_wq rearm_queue; /* Clock Queue. */
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struct mlx5dv_pp *pp; /* Packet pacing context. */
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uint16_t pp_id; /* Packet pacing context index. */
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};
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/*
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@ -6,6 +6,7 @@
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#include <rte_interrupts.h>
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#include <rte_alarm.h>
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#include <rte_malloc.h>
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#include <rte_cycles.h>
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#include "mlx5.h"
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#include "mlx5_rxtx.h"
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@ -48,6 +49,69 @@ mlx5_txpp_create_eqn(struct mlx5_dev_ctx_shared *sh)
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return 0;
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}
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static void
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mlx5_txpp_free_pp_index(struct mlx5_dev_ctx_shared *sh)
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{
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if (sh->txpp.pp) {
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mlx5_glue->dv_free_pp(sh->txpp.pp);
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sh->txpp.pp = NULL;
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sh->txpp.pp_id = 0;
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}
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}
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/* Allocate Packet Pacing index from kernel via mlx5dv call. */
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static int
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mlx5_txpp_alloc_pp_index(struct mlx5_dev_ctx_shared *sh)
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{
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#ifdef HAVE_MLX5DV_PP_ALLOC
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uint32_t pp[MLX5_ST_SZ_DW(set_pp_rate_limit_context)];
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uint64_t rate;
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MLX5_ASSERT(!sh->txpp.pp);
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memset(&pp, 0, sizeof(pp));
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rate = NS_PER_S / sh->txpp.tick;
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if (rate * sh->txpp.tick != NS_PER_S)
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DRV_LOG(WARNING, "Packet pacing frequency is not precise.");
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if (sh->txpp.test) {
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uint32_t len;
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len = RTE_MAX(MLX5_TXPP_TEST_PKT_SIZE,
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(size_t)RTE_ETHER_MIN_LEN);
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MLX5_SET(set_pp_rate_limit_context, &pp,
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burst_upper_bound, len);
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MLX5_SET(set_pp_rate_limit_context, &pp,
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typical_packet_size, len);
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/* Convert packets per second into kilobits. */
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rate = (rate * len) / (1000ul / CHAR_BIT);
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DRV_LOG(INFO, "Packet pacing rate set to %" PRIu64, rate);
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}
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MLX5_SET(set_pp_rate_limit_context, &pp, rate_limit, rate);
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MLX5_SET(set_pp_rate_limit_context, &pp, rate_mode,
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sh->txpp.test ? MLX5_DATA_RATE : MLX5_WQE_RATE);
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sh->txpp.pp = mlx5_glue->dv_alloc_pp
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(sh->ctx, sizeof(pp), &pp,
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MLX5DV_PP_ALLOC_FLAGS_DEDICATED_INDEX);
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if (sh->txpp.pp == NULL) {
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DRV_LOG(ERR, "Failed to allocate packet pacing index.");
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rte_errno = errno;
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return -errno;
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}
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if (!sh->txpp.pp->index) {
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DRV_LOG(ERR, "Zero packet pacing index allocated.");
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mlx5_txpp_free_pp_index(sh);
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rte_errno = ENOTSUP;
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return -ENOTSUP;
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}
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sh->txpp.pp_id = sh->txpp.pp->index;
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return 0;
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#else
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RTE_SET_USED(sh);
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DRV_LOG(ERR, "Allocating pacing index is not supported.");
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rte_errno = ENOTSUP;
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return -ENOTSUP;
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#endif
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}
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static void
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mlx5_txpp_destroy_send_queue(struct mlx5_txpp_wq *wq)
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{
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@ -457,6 +521,7 @@ mlx5_txpp_create_clock_queue(struct mlx5_dev_ctx_shared *sh)
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}
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sq_attr.state = MLX5_SQC_STATE_RST;
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sq_attr.cqn = wq->cq->id;
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sq_attr.packet_pacing_rate_limit_index = sh->txpp.pp_id;
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sq_attr.wq_attr.cd_slave = 1;
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sq_attr.wq_attr.uar_page = sh->tx_uar->page_id;
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sq_attr.wq_attr.wq_type = MLX5_WQ_TYPE_CYCLIC;
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@ -503,6 +568,7 @@ error:
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* - Clock CQ/SQ
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* - Rearm CQ/SQ
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* - attaches rearm interrupt handler
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* - starts Clock Queue
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*
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* Returns 0 on success, negative otherwise
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*/
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@ -518,6 +584,9 @@ mlx5_txpp_create(struct mlx5_dev_ctx_shared *sh, struct mlx5_priv *priv)
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sh->txpp.skew = priv->config.tx_skew;
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sh->txpp.freq = priv->config.hca_attr.dev_freq_khz;
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ret = mlx5_txpp_create_eqn(sh);
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if (ret)
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goto exit;
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ret = mlx5_txpp_alloc_pp_index(sh);
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if (ret)
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goto exit;
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ret = mlx5_txpp_create_clock_queue(sh);
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@ -530,6 +599,7 @@ exit:
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if (ret) {
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mlx5_txpp_destroy_rearm_queue(sh);
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mlx5_txpp_destroy_clock_queue(sh);
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mlx5_txpp_free_pp_index(sh);
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mlx5_txpp_destroy_eqn(sh);
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sh->txpp.tick = 0;
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sh->txpp.test = 0;
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@ -550,6 +620,7 @@ mlx5_txpp_destroy(struct mlx5_dev_ctx_shared *sh)
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{
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mlx5_txpp_destroy_rearm_queue(sh);
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mlx5_txpp_destroy_clock_queue(sh);
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mlx5_txpp_free_pp_index(sh);
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mlx5_txpp_destroy_eqn(sh);
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sh->txpp.tick = 0;
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sh->txpp.test = 0;
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