crypto/cnxk: add flexi cipher decryption
Add flexi crypto cipher decrypt support in enqueue API. Flexi crypto opcode covers a broad set of ciphers including variants of AES. Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Archana Muniganti <marchana@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
This commit is contained in:
Archana Muniganti
Akhil Goyal
parent
3de331795f
commit
b02cd7a316
@ -7,6 +7,10 @@
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Symmetric crypto = Y
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Sym operation chaining = Y
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HW Accelerated = Y
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In Place SGL = Y
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OOP SGL In LB Out = Y
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OOP SGL In SGL Out = Y
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OOP LB In LB Out = Y
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Symmetric sessionless = Y
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Digest encrypted = Y
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@ -14,6 +18,18 @@ Digest encrypted = Y
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; Supported crypto algorithms of 'cn10k' crypto driver.
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;
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[Cipher]
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NULL = Y
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3DES CBC = Y
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3DES ECB = Y
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AES CBC (128) = Y
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AES CBC (192) = Y
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AES CBC (256) = Y
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AES CTR (128) = Y
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AES CTR (192) = Y
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AES CTR (256) = Y
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AES XTS (128) = Y
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AES XTS (256) = Y
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DES CBC = Y
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;
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; Supported authentication algorithms of 'cn10k' crypto driver.
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@ -24,3 +40,7 @@ Digest encrypted = Y
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; Supported AEAD algorithms of 'cn10k' crypto driver.
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;
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[AEAD]
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AES GCM (128) = Y
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AES GCM (192) = Y
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AES GCM (256) = Y
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CHACHA20-POLY1305 = Y
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@ -7,6 +7,10 @@
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Symmetric crypto = Y
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Sym operation chaining = Y
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HW Accelerated = Y
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In Place SGL = Y
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OOP SGL In LB Out = Y
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OOP SGL In SGL Out = Y
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OOP LB In LB Out = Y
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Symmetric sessionless = Y
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Digest encrypted = Y
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@ -14,6 +18,18 @@ Digest encrypted = Y
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; Supported crypto algorithms of 'cn9k' crypto driver.
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;
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[Cipher]
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NULL = Y
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3DES CBC = Y
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3DES ECB = Y
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AES CBC (128) = Y
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AES CBC (192) = Y
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AES CBC (256) = Y
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AES CTR (128) = Y
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AES CTR (192) = Y
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AES CTR (256) = Y
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AES XTS (128) = Y
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AES XTS (256) = Y
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DES CBC = Y
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;
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; Supported authentication algorithms of 'cn9k' crypto driver.
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@ -24,3 +40,7 @@ Digest encrypted = Y
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; Supported AEAD algorithms of 'cn9k' crypto driver.
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;
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[AEAD]
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AES GCM (128) = Y
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AES GCM (192) = Y
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AES GCM (256) = Y
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CHACHA20-POLY1305 = Y
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@ -83,6 +83,10 @@ cn10k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
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dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
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RTE_CRYPTODEV_FF_HW_ACCELERATED |
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RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
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RTE_CRYPTODEV_FF_IN_PLACE_SGL |
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RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
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RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
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RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
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RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
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RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
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@ -81,6 +81,10 @@ cn9k_cpt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
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dev->feature_flags = RTE_CRYPTODEV_FF_SYMMETRIC_CRYPTO |
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RTE_CRYPTODEV_FF_HW_ACCELERATED |
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RTE_CRYPTODEV_FF_SYM_OPERATION_CHAINING |
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RTE_CRYPTODEV_FF_IN_PLACE_SGL |
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RTE_CRYPTODEV_FF_OOP_LB_IN_LB_OUT |
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RTE_CRYPTODEV_FF_OOP_SGL_IN_LB_OUT |
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RTE_CRYPTODEV_FF_OOP_SGL_IN_SGL_OUT |
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RTE_CRYPTODEV_FF_SYM_SESSIONLESS |
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RTE_CRYPTODEV_FF_DIGEST_ENCRYPTED;
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@ -511,6 +511,327 @@ cpt_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
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return 0;
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}
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static __rte_always_inline int
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cpt_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
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struct roc_se_fc_params *fc_params, struct cpt_inst_s *inst)
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{
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uint32_t iv_offset = 0, size;
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int32_t inputlen, outputlen, enc_dlen, auth_dlen;
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struct roc_se_ctx *se_ctx;
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int32_t hash_type, mac_len;
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uint8_t iv_len = 16;
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struct roc_se_buf_ptr *aad_buf = NULL;
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uint32_t encr_offset, auth_offset;
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uint32_t encr_data_len, auth_data_len, aad_len = 0;
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uint32_t passthrough_len = 0;
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union cpt_inst_w4 cpt_inst_w4;
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void *offset_vaddr;
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uint8_t op_minor;
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encr_offset = ROC_SE_ENCR_OFFSET(d_offs);
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auth_offset = ROC_SE_AUTH_OFFSET(d_offs);
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encr_data_len = ROC_SE_ENCR_DLEN(d_lens);
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auth_data_len = ROC_SE_AUTH_DLEN(d_lens);
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if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
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/* We don't support both AAD and auth data separately */
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auth_data_len = 0;
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auth_offset = 0;
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aad_len = fc_params->aad_buf.size;
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aad_buf = &fc_params->aad_buf;
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}
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se_ctx = fc_params->ctx_buf.vaddr;
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hash_type = se_ctx->hash_type;
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mac_len = se_ctx->mac_len;
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op_minor = se_ctx->template_w4.s.opcode_minor;
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if (unlikely(!(flags & ROC_SE_VALID_IV_BUF))) {
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iv_len = 0;
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iv_offset = ROC_SE_ENCR_IV_OFFSET(d_offs);
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}
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if (unlikely(flags & ROC_SE_VALID_AAD_BUF)) {
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/*
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* When AAD is given, data above encr_offset is pass through
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* Since AAD is given as separate pointer and not as offset,
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* this is a special case as we need to fragment input data
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* into passthrough + encr_data and then insert AAD in between.
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*/
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if (hash_type != ROC_SE_GMAC_TYPE) {
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passthrough_len = encr_offset;
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auth_offset = passthrough_len + iv_len;
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encr_offset = passthrough_len + aad_len + iv_len;
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auth_data_len = aad_len + encr_data_len;
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} else {
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passthrough_len = 16 + aad_len;
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auth_offset = passthrough_len + iv_len;
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auth_data_len = aad_len;
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}
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} else {
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encr_offset += iv_len;
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auth_offset += iv_len;
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}
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/* Decryption */
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cpt_inst_w4.s.opcode_major = ROC_SE_MAJOR_OP_FC;
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cpt_inst_w4.s.opcode_minor = ROC_SE_FC_MINOR_OP_DECRYPT;
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cpt_inst_w4.s.opcode_minor |= (uint64_t)op_minor;
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if (hash_type == ROC_SE_GMAC_TYPE) {
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encr_offset = 0;
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encr_data_len = 0;
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}
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enc_dlen = encr_offset + encr_data_len;
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auth_dlen = auth_offset + auth_data_len;
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if (auth_dlen > enc_dlen) {
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inputlen = auth_dlen + mac_len;
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outputlen = auth_dlen;
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} else {
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inputlen = enc_dlen + mac_len;
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outputlen = enc_dlen;
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}
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if (op_minor & ROC_SE_FC_MINOR_OP_HMAC_FIRST)
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outputlen = inputlen = enc_dlen;
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cpt_inst_w4.s.param1 = encr_data_len;
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cpt_inst_w4.s.param2 = auth_data_len;
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/*
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* In cn9k, cn10k since we have a limitation of
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* IV & Offset control word not part of instruction
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* and need to be part of Data Buffer, we check if
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* head room is there and then only do the Direct mode processing
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*/
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if (likely((flags & ROC_SE_SINGLE_BUF_INPLACE) &&
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(flags & ROC_SE_SINGLE_BUF_HEADROOM))) {
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void *dm_vaddr = fc_params->bufs[0].vaddr;
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/* Use Direct mode */
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offset_vaddr =
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(uint8_t *)dm_vaddr - ROC_SE_OFF_CTRL_LEN - iv_len;
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inst->dptr = (uint64_t)offset_vaddr;
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/* RPTR should just exclude offset control word */
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inst->rptr = (uint64_t)dm_vaddr - iv_len;
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cpt_inst_w4.s.dlen = inputlen + ROC_SE_OFF_CTRL_LEN;
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if (likely(iv_len)) {
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uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
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ROC_SE_OFF_CTRL_LEN);
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uint64_t *src = fc_params->iv_buf;
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dest[0] = src[0];
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dest[1] = src[1];
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}
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} else {
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void *m_vaddr = fc_params->meta_buf.vaddr;
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uint32_t g_size_bytes, s_size_bytes;
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struct roc_se_sglist_comp *gather_comp;
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struct roc_se_sglist_comp *scatter_comp;
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uint8_t *in_buffer;
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uint8_t i = 0;
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/* This falls under strict SG mode */
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offset_vaddr = m_vaddr;
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size = ROC_SE_OFF_CTRL_LEN + iv_len;
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m_vaddr = (uint8_t *)m_vaddr + size;
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cpt_inst_w4.s.opcode_major |= (uint64_t)ROC_SE_DMA_MODE;
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if (likely(iv_len)) {
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uint64_t *dest = (uint64_t *)((uint8_t *)offset_vaddr +
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ROC_SE_OFF_CTRL_LEN);
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uint64_t *src = fc_params->iv_buf;
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dest[0] = src[0];
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dest[1] = src[1];
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}
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/* DPTR has SG list */
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in_buffer = m_vaddr;
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((uint16_t *)in_buffer)[0] = 0;
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((uint16_t *)in_buffer)[1] = 0;
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/* TODO Add error check if space will be sufficient */
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gather_comp =
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(struct roc_se_sglist_comp *)((uint8_t *)m_vaddr + 8);
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/*
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* Input Gather List
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*/
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i = 0;
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/* Offset control word that includes iv */
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i = fill_sg_comp(gather_comp, i, (uint64_t)offset_vaddr,
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ROC_SE_OFF_CTRL_LEN + iv_len);
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/* Add input data */
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if (flags & ROC_SE_VALID_MAC_BUF) {
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size = inputlen - iv_len - mac_len;
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if (size) {
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/* input data only */
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if (unlikely(flags &
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ROC_SE_SINGLE_BUF_INPLACE)) {
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i = fill_sg_comp_from_buf_min(
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gather_comp, i, fc_params->bufs,
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&size);
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} else {
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uint32_t aad_offset =
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aad_len ? passthrough_len : 0;
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i = fill_sg_comp_from_iov(
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gather_comp, i,
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fc_params->src_iov, 0, &size,
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aad_buf, aad_offset);
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}
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if (unlikely(size)) {
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plt_dp_err("Insufficient buffer"
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" space, size %d needed",
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size);
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return -1;
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}
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}
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/* mac data */
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if (mac_len) {
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i = fill_sg_comp_from_buf(gather_comp, i,
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&fc_params->mac_buf);
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}
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} else {
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/* input data + mac */
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size = inputlen - iv_len;
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if (size) {
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if (unlikely(flags &
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ROC_SE_SINGLE_BUF_INPLACE)) {
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i = fill_sg_comp_from_buf_min(
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gather_comp, i, fc_params->bufs,
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&size);
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} else {
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uint32_t aad_offset =
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aad_len ? passthrough_len : 0;
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if (unlikely(!fc_params->src_iov)) {
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plt_dp_err("Bad input args");
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return -1;
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}
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i = fill_sg_comp_from_iov(
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gather_comp, i,
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fc_params->src_iov, 0, &size,
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aad_buf, aad_offset);
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}
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if (unlikely(size)) {
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plt_dp_err("Insufficient buffer"
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" space, size %d needed",
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size);
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return -1;
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}
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}
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}
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((uint16_t *)in_buffer)[2] = rte_cpu_to_be_16(i);
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g_size_bytes =
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((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
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/*
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* Output Scatter List
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*/
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i = 0;
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scatter_comp =
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(struct roc_se_sglist_comp *)((uint8_t *)gather_comp +
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g_size_bytes);
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/* Add iv */
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if (iv_len) {
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i = fill_sg_comp(scatter_comp, i,
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(uint64_t)offset_vaddr +
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ROC_SE_OFF_CTRL_LEN,
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iv_len);
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}
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/* Add output data */
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size = outputlen - iv_len;
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if (size) {
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if (unlikely(flags & ROC_SE_SINGLE_BUF_INPLACE)) {
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/* handle single buffer here */
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i = fill_sg_comp_from_buf_min(scatter_comp, i,
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fc_params->bufs,
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&size);
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} else {
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uint32_t aad_offset =
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aad_len ? passthrough_len : 0;
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if (unlikely(!fc_params->dst_iov)) {
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plt_dp_err("Bad input args");
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return -1;
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}
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i = fill_sg_comp_from_iov(
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scatter_comp, i, fc_params->dst_iov, 0,
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&size, aad_buf, aad_offset);
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}
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if (unlikely(size)) {
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plt_dp_err("Insufficient buffer space,"
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" size %d needed",
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size);
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return -1;
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}
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}
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((uint16_t *)in_buffer)[3] = rte_cpu_to_be_16(i);
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s_size_bytes =
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((i + 3) / 4) * sizeof(struct roc_se_sglist_comp);
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size = g_size_bytes + s_size_bytes + ROC_SE_SG_LIST_HDR_SIZE;
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/* This is DPTR len in case of SG mode */
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cpt_inst_w4.s.dlen = size;
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inst->dptr = (uint64_t)in_buffer;
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}
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if (unlikely((encr_offset >> 16) || (iv_offset >> 8) ||
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(auth_offset >> 8))) {
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plt_dp_err("Offset not supported");
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plt_dp_err("enc_offset: %d", encr_offset);
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plt_dp_err("iv_offset : %d", iv_offset);
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plt_dp_err("auth_offset: %d", auth_offset);
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return -1;
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}
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*(uint64_t *)offset_vaddr = rte_cpu_to_be_64(
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((uint64_t)encr_offset << 16) | ((uint64_t)iv_offset << 8) |
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((uint64_t)auth_offset));
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inst->w4.u64 = cpt_inst_w4.u64;
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return 0;
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}
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static __rte_always_inline int
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cpt_fc_dec_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
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struct roc_se_fc_params *fc_params,
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struct cpt_inst_s *inst)
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{
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struct roc_se_ctx *ctx = fc_params->ctx_buf.vaddr;
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uint8_t fc_type;
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int ret = -1;
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fc_type = ctx->fc_type;
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if (likely(fc_type == ROC_SE_FC_GEN))
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ret = cpt_dec_hmac_prep(flags, d_offs, d_lens, fc_params, inst);
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return ret;
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}
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static __rte_always_inline int
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cpt_fc_enc_hmac_prep(uint32_t flags, uint64_t d_offs, uint64_t d_lens,
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struct roc_se_fc_params *fc_params,
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@ -1192,7 +1513,8 @@ fill_fc_params(struct rte_crypto_op *cop, struct cnxk_se_sess *sess,
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ret = cpt_fc_enc_hmac_prep(flags, d_offs, d_lens, &fc_params,
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inst);
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else
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ret = ENOTSUP;
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ret = cpt_fc_dec_hmac_prep(flags, d_offs, d_lens, &fc_params,
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inst);
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if (unlikely(ret)) {
|
||||
plt_dp_err("Preparing request failed due to bad input arg");
|
||||
|
||||
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Reference in New Issue
Block a user