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eal/arm64: change barrier definitions to macros

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Change rte_*wb definitions to macros in order to
keep consistent with other barrier definitions in
the file.

Suggested-by: Jianbo Liu <jianbo.liu@linaro.org>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This commit is contained in:
Jerin Jacob 2017-01-18 06:51:27 +05:30 committed by Thomas Monjalon
parent e783b81d44
commit b15740bd43
1 changed files with 3 additions and 33 deletions
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36
lib/librte_eal/common/include/arch/arm/rte_atomic_64.h
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@ -46,41 +46,11 @@ extern "C" {
#define dsb(opt) { asm volatile("dsb " #opt : : : "memory"); }
#define dmb(opt) { asm volatile("dmb " #opt : : : "memory"); }
/**
* General memory barrier.
*
* Guarantees that the LOAD and STORE operations generated before the
* barrier occur before the LOAD and STORE operations generated after.
* This function is architecture dependent.
*/
static inline void rte_mb(void)
{
dsb(sy);
}
#define rte_mb() dsb(sy)
/**
* Write memory barrier.
*
* Guarantees that the STORE operations generated before the barrier
* occur before the STORE operations generated after.
* This function is architecture dependent.
*/
static inline void rte_wmb(void)
{
dsb(st);
}
#define rte_wmb() dsb(st)
/**
* Read memory barrier.
*
* Guarantees that the LOAD operations generated before the barrier
* occur before the LOAD operations generated after.
* This function is architecture dependent.
*/
static inline void rte_rmb(void)
{
dsb(ld);
}
#define rte_rmb() dsb(ld)
#define rte_smp_mb() dmb(ish)