compress/qat: revert change in GEN3 marketing name
The patch reverts the commit that updated Intel QuickAssist GEN3
marketing name. The change was not backported and has to be withdrawn.
This reverts commit 9cd9d3e702
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
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@ -23,7 +23,7 @@ poll mode crypto driver support for the following hardware accelerator devices:
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* ``Intel QuickAssist Technology C62x``
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* ``Intel QuickAssist Technology C3xxx``
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* ``Intel QuickAssist Technology D15xx``
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* ``Intel QuickAssist Technology P5xxx``
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* ``Intel QuickAssist Technology C4xxx``
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Features
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@ -163,7 +163,7 @@ poll mode crypto driver support for the following hardware accelerator devices:
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* ``Intel QuickAssist Technology C62x``
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* ``Intel QuickAssist Technology C3xxx``
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* ``Intel QuickAssist Technology D15xx``
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* ``Intel QuickAssist Technology P5xxx``
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* ``Intel QuickAssist Technology C4xxx``
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The QAT ASYM PMD has support for:
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@ -393,7 +393,7 @@ to see the full table)
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+-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
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| Yes | No | No | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 |
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+-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
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| Yes | No | No | 3 | P5xxx | p | qat_p5xxx | p5xxx | 18a0 | 1 | 18a1 | 128 |
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| Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 |
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+-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+
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* Note: Symmetric mixed crypto algorithms feature on Gen 2 works only with 01.org driver version 4.9.0+
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@ -658,7 +658,7 @@ qat_comp_dev_create(struct qat_pci_device *qat_pci_dev,
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struct qat_device_info *qat_dev_instance =
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&qat_pci_devs[qat_pci_dev->qat_dev_id];
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if (qat_pci_dev->qat_dev_gen == QAT_GEN3) {
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QAT_LOG(ERR, "Compression PMD not supported on QAT P5xxx");
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QAT_LOG(ERR, "Compression PMD not supported on QAT c4xxx");
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return 0;
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}
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