igb: add VF support
Signed-off-by: Intel
This commit is contained in:
Intel
Thomas Monjalon
parent
8206ad5055
commit
d82170d279
@ -113,4 +113,8 @@ uint16_t eth_igb_recv_pkts(struct igb_rx_queue *rxq, struct rte_mbuf **rx_pkts,
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uint16_t eth_igb_recv_scattered_pkts(struct igb_rx_queue *rxq,
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struct rte_mbuf **rx_pkts, uint16_t nb_pkts);
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int eth_igbvf_rx_init(struct rte_eth_dev *dev);
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void eth_igbvf_tx_init(struct rte_eth_dev *dev);
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#endif /* _E1000_ETHDEV_H_ */
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@ -100,6 +100,30 @@ static void eth_igb_rar_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr
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uint32_t index, uint32_t pool);
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static void eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index);
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static void igbvf_intr_disable(struct e1000_hw *hw);
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static int igbvf_dev_configure(struct rte_eth_dev *dev);
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static int igbvf_dev_start(struct rte_eth_dev *dev);
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static void igbvf_dev_stop(struct rte_eth_dev *dev);
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static void igbvf_dev_close(struct rte_eth_dev *dev);
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static int eth_igbvf_link_update(struct e1000_hw *hw);
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static void eth_igbvf_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *rte_stats);
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static void eth_igbvf_stats_reset(struct rte_eth_dev *dev);
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static int igbvf_vlan_filter_set(struct rte_eth_dev *dev,
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uint16_t vlan_id, int on);
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static int igbvf_set_vfta(struct e1000_hw *hw, uint16_t vid, bool on);
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static void igbvf_set_vfta_all(struct rte_eth_dev *dev, bool on);
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/*
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* Define VF Stats MACRO for Non "cleared on read" register
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*/
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#define UPDATE_VF_STAT(reg, last, cur) \
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{ \
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u32 latest = E1000_READ_REG(hw, reg); \
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cur += latest - last; \
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last = latest; \
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}
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#define IGB_FC_PAUSE_TIME 0x0680
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#define IGB_LINK_UPDATE_CHECK_TIMEOUT 90 /* 9s */
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#define IGB_LINK_UPDATE_CHECK_INTERVAL 100 /* ms */
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@ -111,8 +135,18 @@ static enum e1000_fc_mode igb_fc_setting = e1000_fc_full;
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*/
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static struct rte_pci_id pci_id_igb_map[] = {
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#undef RTE_LIBRTE_IXGBE_PMD
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#define RTE_PCI_DEV_ID_DECL(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
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#define RTE_PCI_DEV_ID_DECL_IGB(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
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#include "rte_pci_dev_ids.h"
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{.device_id = 0},
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};
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/*
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* The set of PCI devices this driver supports (for 82576&I350 VF)
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*/
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static struct rte_pci_id pci_id_igbvf_map[] = {
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#define RTE_PCI_DEV_ID_DECL_IGBVF(vend, dev) {RTE_PCI_DEVICE(vend, dev)},
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#include "rte_pci_dev_ids.h"
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{.device_id = 0},
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@ -141,6 +175,26 @@ static struct eth_dev_ops eth_igb_ops = {
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.mac_addr_remove = eth_igb_rar_clear,
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};
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/*
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* dev_ops for virtual function, bare necessities for basic vf
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* operation have been implemented
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*/
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static struct eth_dev_ops igbvf_eth_dev_ops = {
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.dev_configure = igbvf_dev_configure,
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.dev_start = igbvf_dev_start,
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.dev_stop = igbvf_dev_stop,
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.dev_close = igbvf_dev_close,
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.link_update = eth_igb_link_update,
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.stats_get = eth_igbvf_stats_get,
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.stats_reset = eth_igbvf_stats_reset,
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.vlan_filter_set = igbvf_vlan_filter_set,
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.dev_infos_get = eth_igb_infos_get,
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.rx_queue_setup = eth_igb_rx_queue_setup,
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.rx_queue_release = eth_igb_rx_queue_release,
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.tx_queue_setup = eth_igb_tx_queue_setup,
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.tx_queue_release = eth_igb_tx_queue_release,
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};
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/**
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* Atomically reads the link status information from global
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* structure rte_eth_dev.
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@ -331,6 +385,66 @@ eth_igb_dev_init(__attribute__((unused)) struct eth_driver *eth_drv,
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return (error);
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}
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/*
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* Virtual Function device init
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*/
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static int
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eth_igbvf_dev_init(__attribute__((unused)) struct eth_driver *eth_drv,
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struct rte_eth_dev *eth_dev)
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{
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struct rte_pci_device *pci_dev;
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struct e1000_hw *hw =
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E1000_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
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int diag;
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PMD_INIT_LOG(DEBUG, "eth_igbvf_dev_init");
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eth_dev->dev_ops = &igbvf_eth_dev_ops;
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pci_dev = eth_dev->pci_dev;
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hw->device_id = pci_dev->id.device_id;
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hw->vendor_id = pci_dev->id.vendor_id;
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hw->hw_addr = (void *)pci_dev->mem_resource.addr;
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/* Initialize the shared code */
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diag = e1000_setup_init_funcs(hw, TRUE);
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if (diag != 0) {
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PMD_INIT_LOG(ERR, "Shared code init failed for igbvf: %d",
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diag);
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return -EIO;
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}
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/* init_mailbox_params */
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hw->mbx.ops.init_params(hw);
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/* Disable the interrupts for VF */
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igbvf_intr_disable(hw);
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diag = hw->mac.ops.reset_hw(hw);
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/* Allocate memory for storing MAC addresses */
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eth_dev->data->mac_addrs = rte_zmalloc("igbvf", ETHER_ADDR_LEN *
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hw->mac.rar_entry_count, 0);
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if (eth_dev->data->mac_addrs == NULL) {
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PMD_INIT_LOG(ERR,
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"Failed to allocate %d bytes needed to store MAC "
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"addresses",
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ETHER_ADDR_LEN * hw->mac.rar_entry_count);
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return -ENOMEM;
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}
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/* Copy the permanent MAC address */
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ether_addr_copy((struct ether_addr *) hw->mac.perm_addr,
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ð_dev->data->mac_addrs[0]);
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PMD_INIT_LOG(DEBUG, "\nport %d vendorID=0x%x deviceID=0x%x "
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"mac.type=%s\n",
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eth_dev->data->port_id, pci_dev->id.vendor_id,
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pci_dev->id.device_id,
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"igb_mac_82576_vf");
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return 0;
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}
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static struct eth_driver rte_igb_pmd = {
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{
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.name = "rte_igb_pmd",
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@ -341,6 +455,19 @@ static struct eth_driver rte_igb_pmd = {
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.dev_private_size = sizeof(struct e1000_adapter),
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};
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/*
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* virtual function driver struct
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*/
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static struct eth_driver rte_igbvf_pmd = {
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{
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.name = "rte_igbvf_pmd",
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.id_table = pci_id_igbvf_map,
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.drv_flags = RTE_PCI_DRV_NEED_IGB_UIO,
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},
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.eth_dev_init = eth_igbvf_dev_init,
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.dev_private_size = sizeof(struct e1000_adapter),
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};
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int
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rte_igb_pmd_init(void)
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{
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@ -348,6 +475,20 @@ rte_igb_pmd_init(void)
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return 0;
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}
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/*
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* VF Driver initialization routine.
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* Invoked one at EAL init time.
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* Register itself as the [Virtual Poll Mode] Driver of PCI IGB devices.
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*/
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int
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rte_igbvf_pmd_init(void)
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{
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DEBUGFUNC("rte_igbvf_pmd_init");
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rte_eth_driver_register(&rte_igbvf_pmd);
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return (0);
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}
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static int
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eth_igb_configure(struct rte_eth_dev *dev, uint16_t nb_rx_q, uint16_t nb_tx_q)
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{
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@ -795,6 +936,80 @@ eth_igb_stats_reset(struct rte_eth_dev *dev)
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memset(hw_stats, 0, sizeof(*hw_stats));
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}
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static void
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eth_igbvf_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *rte_stats)
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{
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struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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struct e1000_vf_stats *hw_stats = (struct e1000_vf_stats*)
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E1000_DEV_PRIVATE_TO_STATS(dev->data->dev_private);
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/* Good Rx packets, include VF loopback */
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UPDATE_VF_STAT(E1000_VFGPRC,
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hw_stats->last_gprc, hw_stats->gprc);
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/* Good Rx octets, include VF loopback */
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UPDATE_VF_STAT(E1000_VFGORC,
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hw_stats->last_gorc, hw_stats->gorc);
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/* Good Tx packets, include VF loopback */
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UPDATE_VF_STAT(E1000_VFGPTC,
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hw_stats->last_gptc, hw_stats->gptc);
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/* Good Tx octets, include VF loopback */
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UPDATE_VF_STAT(E1000_VFGOTC,
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hw_stats->last_gotc, hw_stats->gotc);
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/* Rx Multicst packets */
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UPDATE_VF_STAT(E1000_VFMPRC,
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hw_stats->last_mprc, hw_stats->mprc);
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/* Good Rx loopback packets */
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UPDATE_VF_STAT(E1000_VFGPRLBC,
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hw_stats->last_gprlbc, hw_stats->gprlbc);
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/* Good Rx loopback octets */
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UPDATE_VF_STAT(E1000_VFGORLBC,
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hw_stats->last_gorlbc, hw_stats->gorlbc);
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/* Good Tx loopback packets */
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UPDATE_VF_STAT(E1000_VFGPTLBC,
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hw_stats->last_gptlbc, hw_stats->gptlbc);
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/* Good Tx loopback octets */
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UPDATE_VF_STAT(E1000_VFGOTLBC,
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hw_stats->last_gotlbc, hw_stats->gotlbc);
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if (rte_stats == NULL)
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return;
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memset(rte_stats, 0, sizeof(*rte_stats));
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rte_stats->ipackets = hw_stats->gprc;
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rte_stats->ibytes = hw_stats->gorc;
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rte_stats->opackets = hw_stats->gptc;
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rte_stats->obytes = hw_stats->gotc;
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rte_stats->imcasts = hw_stats->mprc;
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rte_stats->ilbpackets = hw_stats->gprlbc;
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rte_stats->ilbbytes = hw_stats->gorlbc;
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rte_stats->olbpackets = hw_stats->gptlbc;
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rte_stats->olbbytes = hw_stats->gotlbc;
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}
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static void
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eth_igbvf_stats_reset(struct rte_eth_dev *dev)
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{
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struct e1000_vf_stats *hw_stats = (struct e1000_vf_stats*)
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E1000_DEV_PRIVATE_TO_STATS(dev->data->dev_private);
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/* Sync HW register to the last stats */
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eth_igbvf_stats_get(dev, NULL);
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/* reset HW current stats*/
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memset(&hw_stats->gprc, 0, sizeof(*hw_stats) -
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offsetof(struct e1000_vf_stats, gprc));
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}
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static void
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eth_igb_infos_get(struct rte_eth_dev *dev,
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struct rte_eth_dev_info *dev_info)
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@ -881,8 +1096,13 @@ eth_igb_link_update(struct rte_eth_dev *dev, int wait_to_complete)
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link_check = hw->mac.serdes_has_link;
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break;
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default:
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/* VF device is type_unknown */
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case e1000_media_type_unknown:
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eth_igbvf_link_update(hw);
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link_check = !hw->mac.get_link_status;
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break;
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default:
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break;
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}
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if (link_check || wait_to_complete == 0)
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@ -1333,3 +1553,233 @@ eth_igb_rar_clear(struct rte_eth_dev *dev, uint32_t index)
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e1000_rar_set(hw, addr, index);
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}
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/*
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* Virtual Function operations
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*/
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static void
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igbvf_intr_disable(struct e1000_hw *hw)
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{
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PMD_INIT_LOG(DEBUG, "igbvf_intr_disable");
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/* Clear interrupt mask to stop from interrupts being generated */
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E1000_WRITE_REG(hw, E1000_EIMC, ~0);
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E1000_WRITE_FLUSH(hw);
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}
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static void
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igbvf_stop_adapter(struct rte_eth_dev *dev)
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{
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u32 reg_val;
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u16 i;
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struct rte_eth_dev_info dev_info;
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struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
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memset(&dev_info, 0, sizeof(dev_info));
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eth_igb_infos_get(dev, &dev_info);
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/* Clear interrupt mask to stop from interrupts being generated */
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E1000_WRITE_REG(hw, E1000_EIMC, ~0);
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/* Clear any pending interrupts, flush previous writes */
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E1000_READ_REG(hw, E1000_EICR);
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/* Disable the transmit unit. Each queue must be disabled. */
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for (i = 0; i < dev_info.max_tx_queues; i++)
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E1000_WRITE_REG(hw, E1000_TXDCTL(i), E1000_TXDCTL_SWFLSH);
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/* Disable the receive unit by stopping each queue */
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for (i = 0; i < dev_info.max_rx_queues; i++) {
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reg_val = E1000_READ_REG(hw, E1000_RXDCTL(i));
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reg_val &= ~E1000_RXDCTL_QUEUE_ENABLE;
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E1000_WRITE_REG(hw, E1000_RXDCTL(i), reg_val);
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while (E1000_READ_REG(hw, E1000_RXDCTL(i)) & E1000_RXDCTL_QUEUE_ENABLE)
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;
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}
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/* flush all queues disables */
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E1000_WRITE_FLUSH(hw);
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msec_delay(2);
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}
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static int eth_igbvf_link_update(struct e1000_hw *hw)
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{
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struct e1000_mbx_info *mbx = &hw->mbx;
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struct e1000_mac_info *mac = &hw->mac;
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int ret_val = E1000_SUCCESS;
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PMD_INIT_LOG(DEBUG, "e1000_check_for_link_vf");
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/*
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* We only want to run this if there has been a rst asserted.
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* in this case that could mean a link change, device reset,
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* or a virtual function reset
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*/
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/* If we were hit with a reset or timeout drop the link */
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if (!e1000_check_for_rst(hw, 0) || !mbx->timeout)
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mac->get_link_status = TRUE;
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if (!mac->get_link_status)
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goto out;
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/* if link status is down no point in checking to see if pf is up */
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if (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU))
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goto out;
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/* if we passed all the tests above then the link is up and we no
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* longer need to check for link */
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mac->get_link_status = FALSE;
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out:
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return ret_val;
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}
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static int
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igbvf_dev_configure(struct rte_eth_dev *dev)
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{
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struct rte_eth_conf* conf = &dev->data->dev_conf;
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PMD_INIT_LOG(DEBUG, "\nConfigured Virtual Function port id: %d\n",
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dev->data->port_id);
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/*
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* VF has no ability to enable/disable HW CRC
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* Keep the persistent behavior the same as Host PF
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*/
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#ifndef RTE_LIBRTE_E1000_PF_DISABLE_STRIP_CRC
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if (!conf->rxmode.hw_strip_crc) {
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PMD_INIT_LOG(INFO, "VF can't disable HW CRC Strip\n");
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conf->rxmode.hw_strip_crc = 1;
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}
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#else
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if (conf->rxmode.hw_strip_crc) {
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PMD_INIT_LOG(INFO, "VF can't enable HW CRC Strip\n");
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conf->rxmode.hw_strip_crc = 0;
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}
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#endif
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return 0;
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}
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static int
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igbvf_dev_start(struct rte_eth_dev *dev)
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{
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int ret;
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PMD_INIT_LOG(DEBUG, "igbvf_dev_start");
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/* Set all vfta */
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igbvf_set_vfta_all(dev,1);
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eth_igbvf_tx_init(dev);
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/* This can fail when allocating mbufs for descriptor rings */
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ret = eth_igbvf_rx_init(dev);
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if (ret) {
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PMD_INIT_LOG(ERR, "Unable to initialize RX hardware");
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igb_dev_clear_queues(dev);
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return ret;
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}
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return 0;
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}
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static void
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igbvf_dev_stop(struct rte_eth_dev *dev)
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{
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PMD_INIT_LOG(DEBUG, "igbvf_dev_stop");
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igbvf_stop_adapter(dev);
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/*
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* Clear what we set, but we still keep shadow_vfta to
|
||||
* restore after device starts
|
||||
*/
|
||||
igbvf_set_vfta_all(dev,0);
|
||||
|
||||
igb_dev_clear_queues(dev);
|
||||
}
|
||||
|
||||
static void
|
||||
igbvf_dev_close(struct rte_eth_dev *dev)
|
||||
{
|
||||
struct e1000_hw *hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
||||
|
||||
PMD_INIT_LOG(DEBUG, "igbvf_dev_close");
|
||||
|
||||
e1000_reset_hw(hw);
|
||||
|
||||
igbvf_dev_stop(dev);
|
||||
}
|
||||
|
||||
static int igbvf_set_vfta(struct e1000_hw *hw, uint16_t vid, bool on)
|
||||
{
|
||||
struct e1000_mbx_info *mbx = &hw->mbx;
|
||||
uint32_t msgbuf[2];
|
||||
|
||||
/* After set vlan, vlan strip will also be enabled in igb driver*/
|
||||
msgbuf[0] = E1000_VF_SET_VLAN;
|
||||
msgbuf[1] = vid;
|
||||
/* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
|
||||
if (on)
|
||||
msgbuf[0] |= E1000_VF_SET_VLAN_ADD;
|
||||
|
||||
return (mbx->ops.write_posted(hw, msgbuf, 2, 0));
|
||||
}
|
||||
|
||||
static void igbvf_set_vfta_all(struct rte_eth_dev *dev, bool on)
|
||||
{
|
||||
struct e1000_hw *hw =
|
||||
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
||||
struct e1000_vfta * shadow_vfta =
|
||||
E1000_DEV_PRIVATE_TO_VFTA(dev->data->dev_private);
|
||||
int i = 0, j = 0, vfta = 0, mask = 1;
|
||||
|
||||
for (i = 0; i < IGB_VFTA_SIZE; i++){
|
||||
vfta = shadow_vfta->vfta[i];
|
||||
if(vfta){
|
||||
mask = 1;
|
||||
for (j = 0; j < 32; j++){
|
||||
if(vfta & mask)
|
||||
igbvf_set_vfta(hw, (i<<5)+j, on);
|
||||
mask<<=1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
static int
|
||||
igbvf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
|
||||
{
|
||||
struct e1000_hw *hw =
|
||||
E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
||||
struct e1000_vfta * shadow_vfta =
|
||||
E1000_DEV_PRIVATE_TO_VFTA(dev->data->dev_private);
|
||||
uint32_t vid_idx = 0;
|
||||
uint32_t vid_bit = 0;
|
||||
int ret = 0;
|
||||
|
||||
PMD_INIT_LOG(DEBUG, "igbvf_vlan_filter_set");
|
||||
|
||||
/*vind is not used in VF driver, set to 0, check ixgbe_set_vfta_vf*/
|
||||
ret = igbvf_set_vfta(hw, vlan_id, !!on);
|
||||
if(ret){
|
||||
PMD_INIT_LOG(ERR, "Unable to set VF vlan");
|
||||
return ret;
|
||||
}
|
||||
vid_idx = (uint32_t) ((vlan_id >> 5) & 0x7F);
|
||||
vid_bit = (uint32_t) (1 << (vlan_id & 0x1F));
|
||||
|
||||
/*Save what we set and retore it after device reset*/
|
||||
if (on)
|
||||
shadow_vfta->vfta[vid_idx] |= vid_bit;
|
||||
else
|
||||
shadow_vfta->vfta[vid_idx] &= ~vid_bit;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@ -1856,3 +1856,173 @@ eth_igb_tx_init(struct rte_eth_dev *dev)
|
||||
E1000_WRITE_REG(hw, E1000_TCTL, tctl);
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Enable VF receive unit.
|
||||
*
|
||||
**********************************************************************/
|
||||
int
|
||||
eth_igbvf_rx_init(struct rte_eth_dev *dev)
|
||||
{
|
||||
struct e1000_hw *hw;
|
||||
struct igb_rx_queue *rxq;
|
||||
struct rte_pktmbuf_pool_private *mbp_priv;
|
||||
uint32_t srrctl;
|
||||
uint16_t buf_size;
|
||||
uint16_t rctl_bsize;
|
||||
uint16_t i;
|
||||
int ret;
|
||||
|
||||
hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
||||
|
||||
/* Configure and enable each RX queue. */
|
||||
rctl_bsize = 0;
|
||||
dev->rx_pkt_burst = eth_igb_recv_pkts;
|
||||
for (i = 0; i < dev->data->nb_rx_queues; i++) {
|
||||
uint64_t bus_addr;
|
||||
uint32_t rxdctl;
|
||||
|
||||
rxq = dev->data->rx_queues[i];
|
||||
|
||||
/* Allocate buffers for descriptor rings and set up queue */
|
||||
ret = igb_alloc_rx_queue_mbufs(rxq);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
bus_addr = rxq->rx_ring_phys_addr;
|
||||
E1000_WRITE_REG(hw, E1000_RDLEN(i),
|
||||
rxq->nb_rx_desc *
|
||||
sizeof(union e1000_adv_rx_desc));
|
||||
E1000_WRITE_REG(hw, E1000_RDBAH(i),
|
||||
(uint32_t)(bus_addr >> 32));
|
||||
E1000_WRITE_REG(hw, E1000_RDBAL(i), (uint32_t)bus_addr);
|
||||
|
||||
srrctl = E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
|
||||
|
||||
/*
|
||||
* Configure RX buffer size.
|
||||
*/
|
||||
mbp_priv = (struct rte_pktmbuf_pool_private *)
|
||||
((char *)rxq->mb_pool + sizeof(struct rte_mempool));
|
||||
buf_size = (uint16_t) (mbp_priv->mbuf_data_room_size -
|
||||
RTE_PKTMBUF_HEADROOM);
|
||||
if (buf_size >= 1024) {
|
||||
/*
|
||||
* Configure the BSIZEPACKET field of the SRRCTL
|
||||
* register of the queue.
|
||||
* Value is in 1 KB resolution, from 1 KB to 127 KB.
|
||||
* If this field is equal to 0b, then RCTL.BSIZE
|
||||
* determines the RX packet buffer size.
|
||||
*/
|
||||
srrctl |= ((buf_size >> E1000_SRRCTL_BSIZEPKT_SHIFT) &
|
||||
E1000_SRRCTL_BSIZEPKT_MASK);
|
||||
buf_size = (uint16_t) ((srrctl &
|
||||
E1000_SRRCTL_BSIZEPKT_MASK) <<
|
||||
E1000_SRRCTL_BSIZEPKT_SHIFT);
|
||||
|
||||
if (dev->data->dev_conf.rxmode.max_rx_pkt_len > buf_size){
|
||||
dev->rx_pkt_burst = eth_igb_recv_scattered_pkts;
|
||||
dev->data->scattered_rx = 1;
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* Use BSIZE field of the device RCTL register.
|
||||
*/
|
||||
if ((rctl_bsize == 0) || (rctl_bsize > buf_size))
|
||||
rctl_bsize = buf_size;
|
||||
dev->rx_pkt_burst = eth_igb_recv_scattered_pkts;
|
||||
dev->data->scattered_rx = 1;
|
||||
}
|
||||
|
||||
/* Set if packets are dropped when no descriptors available */
|
||||
if (rxq->drop_en)
|
||||
srrctl |= E1000_SRRCTL_DROP_EN;
|
||||
|
||||
E1000_WRITE_REG(hw, E1000_SRRCTL(i), srrctl);
|
||||
|
||||
/* Enable this RX queue. */
|
||||
rxdctl = E1000_READ_REG(hw, E1000_RXDCTL(i));
|
||||
rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
|
||||
rxdctl &= 0xFFF00000;
|
||||
rxdctl |= (rxq->pthresh & 0x1F);
|
||||
rxdctl |= ((rxq->hthresh & 0x1F) << 8);
|
||||
if (hw->mac.type == e1000_82576) {
|
||||
/*
|
||||
* Workaround of 82576 VF Erratum
|
||||
* force set WTHRESH to 1
|
||||
* to avoid Write-Back not triggered sometimes
|
||||
*/
|
||||
rxdctl |= 0x10000;
|
||||
PMD_INIT_LOG(DEBUG, "Force set RX WTHRESH to 1 !\n");
|
||||
}
|
||||
else
|
||||
rxdctl |= ((rxq->wthresh & 0x1F) << 16);
|
||||
E1000_WRITE_REG(hw, E1000_RXDCTL(i), rxdctl);
|
||||
}
|
||||
|
||||
/*
|
||||
* Setup the HW Rx Head and Tail Descriptor Pointers.
|
||||
* This needs to be done after enable.
|
||||
*/
|
||||
for (i = 0; i < dev->data->nb_rx_queues; i++) {
|
||||
rxq = dev->data->rx_queues[i];
|
||||
E1000_WRITE_REG(hw, E1000_RDH(i), 0);
|
||||
E1000_WRITE_REG(hw, E1000_RDT(i), rxq->nb_rx_desc - 1);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* Enable VF transmit unit.
|
||||
*
|
||||
**********************************************************************/
|
||||
void
|
||||
eth_igbvf_tx_init(struct rte_eth_dev *dev)
|
||||
{
|
||||
struct e1000_hw *hw;
|
||||
struct igb_tx_queue *txq;
|
||||
uint32_t txdctl;
|
||||
uint16_t i;
|
||||
|
||||
hw = E1000_DEV_PRIVATE_TO_HW(dev->data->dev_private);
|
||||
|
||||
/* Setup the Base and Length of the Tx Descriptor Rings. */
|
||||
for (i = 0; i < dev->data->nb_tx_queues; i++) {
|
||||
uint64_t bus_addr;
|
||||
|
||||
txq = dev->data->tx_queues[i];
|
||||
bus_addr = txq->tx_ring_phys_addr;
|
||||
E1000_WRITE_REG(hw, E1000_TDLEN(i),
|
||||
txq->nb_tx_desc *
|
||||
sizeof(union e1000_adv_tx_desc));
|
||||
E1000_WRITE_REG(hw, E1000_TDBAH(i),
|
||||
(uint32_t)(bus_addr >> 32));
|
||||
E1000_WRITE_REG(hw, E1000_TDBAL(i), (uint32_t)bus_addr);
|
||||
|
||||
/* Setup the HW Tx Head and Tail descriptor pointers. */
|
||||
E1000_WRITE_REG(hw, E1000_TDT(i), 0);
|
||||
E1000_WRITE_REG(hw, E1000_TDH(i), 0);
|
||||
|
||||
/* Setup Transmit threshold registers. */
|
||||
txdctl = E1000_READ_REG(hw, E1000_TXDCTL(i));
|
||||
txdctl |= txq->pthresh & 0x1F;
|
||||
txdctl |= ((txq->hthresh & 0x1F) << 8);
|
||||
if (hw->mac.type == e1000_82576) {
|
||||
/*
|
||||
* Workaround of 82576 VF Erratum
|
||||
* force set WTHRESH to 1
|
||||
* to avoid Write-Back not triggered sometimes
|
||||
*/
|
||||
txdctl |= 0x10000;
|
||||
PMD_INIT_LOG(DEBUG, "Force set TX WTHRESH to 1 !\n");
|
||||
}
|
||||
else
|
||||
txdctl |= ((txq->wthresh & 0x1F) << 16);
|
||||
txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
|
||||
E1000_WRITE_REG(hw, E1000_TXDCTL(i), txdctl);
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user