With symbols going though experimental/stable stages, we accumulated
a lot of discrepancies about inclusion of the rte_compat.h header.
Some headers are including it where unneeded, while others rely on
implicit inclusion.
Fix unneeded inclusions:
$ git grep -l include..rte_compat.h |
xargs grep -LE '__rte_(internal|experimental)' |
xargs sed -i -e '/#include..rte_compat.h/d'
Fix missing inclusion, by inserting rte_compat.h before the first
inclusion of a DPDK header:
$ git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h |
xargs sed -i -e \
'0,/#include..\(rte_\|.*pmd.h.$\)/{
s/\(#include..\(rte_\|.*pmd.h.$\)\)/#include <rte_compat.h>\n\1/
}'
Fix missing inclusion, by inserting rte_compat.h after the last
inclusion of a non DPDK header:
$ for file in $(git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h); do
tac $file > $file.$$
sed -i -e \
'0,/#include../{
s/\(#include..*$\)/#include <rte_compat.h>\n\n\1/
}' $file.$$
tac $file.$$ > $file
rm $file.$$
done
Fix missing inclusion, by inserting rte_compat.h after the header guard:
$ git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h |
xargs sed -i -e \
'0,/#define/{
s/\(#define .*$\)/\1\n\n#include <rte_compat.h>/
}'
And finally, exclude rte_compat.h itself.
$ git checkout lib/eal/include/rte_compat.h
At the end of all this, we have a clean tree:
$ git grep -lE '__rte_(internal|experimental)' |
xargs grep -L include..rte_compat.h
buildtools/check-symbols.sh
devtools/checkpatches.sh
doc/guides/contributing/abi_policy.rst
doc/guides/rel_notes/release_20_11.rst
lib/eal/include/rte_compat.h
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
"meson setup" fails when '-Werror' compiler flag is enabled [1].
This is not a build error in the driver but a build error in meson
during "meson setup" stage.
This issue exists for a while but meson takes it as a warning and
ignores it unless '-Werror' compiler flag is provided.
Although it doesn't cause build error without '-Werror', relevant code
should be broken functionally, this patch fixes that too.
Build file using a variable to detect if macro defined, but that
variable is not set, looks like copy/paste error.
Replacing variable with hardcoded macro name.
[1]
Reproduced via `meson -Dc_args='-Werror' build`
in file 'build/meson-logs/meson-log.txt'
``
Running compile:
Working directory: /tmp/tmpfrnw2x8z
Command line: ccache cc /tmp/tmpfrnw2x8z/testfile.c -pipe -E -P
-Werror -D_FILE_OFFSET_BITS=64 -P -O0 -march=native
Code:
#ifndef dev/qat_crypto_pmd_gen4.c
# define dev/qat_crypto_pmd_gen4.c
#endif
"MESON_GET_DEFINE_DELIMITER"
dev/qat_crypto_pmd_gen4.c
Compiler stdout:
"MESON_GET_DEFINE_DELIMITER"
/qat_crypto_pmd_gen4.c/qat_crypto_pmd_gen4.c
Compiler stderr:
/tmp/tmpfrnw2x8z/testfile.c:3:20:
error: extra tokens at end of #ifndef directive [-Werror]
3 | #ifndef dev/qat_crypto_pmd_gen4.c
| ^
/tmp/tmpfrnw2x8z/testfile.c:4:18:
error: ISO C99 requires whitespace after the macro name [-Werror]
4 | # define dev/qat_crypto_pmd_gen4.c
| ^~~
cc1: all warnings being treated as errors
drivers/event/dlb2/meson.build:41:10:
ERROR: Could not get define 'dev/qat_crypto_pmd_gen4.c'
``
Fixes: d0ce87e41c ("event/dlb2: support single 512B write of 4 QEs")
Cc: stable@dpdk.org
Reported-by: Luca Boccassi <bluca@debian.org>
Signed-off-by: Ferruh Yigit <ferruh.yigit@amd.com>
Fix the allocation of port COS when the application requested port
COS exceeds (e.g. beyond 0-15) the number of LDB ports for
the domain.
Driver limits application specified ports from a COS to the
max ports allocated for the COS so that the rest of the
ports can be allocated from default(best) COS.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Increase xstats ID width from 32 to 64 bits. This also
fixes the xstats ID datatype discrepancy between reset and
rest of the xstats family.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
Reviewed-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Fix the calculation error of the total number of LDB ports
during port COS override from dlb2 event structure.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Since COS is now per port specific only and supported through
port_cos in dev_args, there is no need to have a COS
argument in dev_args.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Add checks during port probing for validating producer
core masks if they are a subset of EAL coremask.
Error is returned if producer coremask is not a subset
of EAL coremask.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Remove COS (class of service) from port probing criteria and
apply enhancements for selection of ports from best
COS when default COS (255) is used.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
This patch addresses an issue of enqueuing more than
max_enq_depth and not able to dequeuing events equal
to max_cq_depth in a single call of rte_event_enqueue_burst
and rte_event_dequeue_burst.
Apply fix for restricting enqueue of events to max_enq_depth
so that in a single rte_event_enqueue_burst() call at most
max_enq_depth events are enqueued.
Also set per port and domain history list sizes based on
cq_depth. This results in dequeuing correct number of
events as set by max_cq_depth.
Fixes: f3cad285bb ("event/dlb2: add infos get and configure")
Cc: stable@dpdk.org
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
This commit implements the changes required for using suggested
port type hint feature. Each port uses different credit quanta
based on port type specified using port configuration flags.
Each port has separate quanta defined in dlb2_priv.h
Producer and consumer ports will need larger quanta value to reduce number
of credit calls they make. Workers can use small quanta as they mostly
work out of locally cached credits and don't request/return credits often.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
If producer thread is only acting as a bridge between NIC and DLB, then
performance can be greatly improved by bypassing the fence instruction.
DLB enqueue API calls memory fence once per enqueue burst. If producer
thread is just reading from NIC and sending to DLB without updating
the read buffers or buffer headers OR producer is not writing
to data structures with dependencies on the enqueue write order, then
fencing can be safely disabled.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
For best performance, applications running on certain cores should use
the DLB device locally available on the same tile along with other
resources. To allocate optimal resources, probing is done for each
producer port (PP) for a given CPU and the best performing ports are
allocated to producers. The CPU used for probing is either the first
core of producer coremask (if present) or the second core of EAL
coremask. This will be extended later to probe for all CPUs in the
producer coremask or EAL coremask.
Producer coremask can be passed along with the BDF of the DLB devices.
"-a xx:y.z,producer_coremask=<core_mask>"
Applications also need to pass RTE_EVENT_PORT_CFG_HINT_PRODUCER during
rte_event_port_setup() for producer ports for optimal port allocation.
For optimal load balancing ports that map to one or more QIDs in common
should not be in numerical sequence. The port->QID mapping is application
dependent, but the driver interleaves port IDs as much as possible to
reduce the likelihood of sequential ports mapping to the same QID(s).
Hence, DLB uses an initial allocation of Port IDs to maximize the
average distance between an ID and its immediate neighbors. Using
the initialport allocation option can be passed through devarg
"default_port_allocation=y(or Y)".
When events are dropped by workers or consumers that use LDB ports,
completions are sent which are just ENQs and may impact the latency.
To address this, probing is done for LDB ports as well. Probing is
done on ports per 'cos'. When default cos is used, ports will be
allocated from best ports from the best 'cos', else from best ports of
the specific cos.
Signed-off-by: Abdullah Sevincer <abdullah.sevincer@intel.com>
Make rte_driver opaque for non internal users.
This will make extending this object possible without breaking the ABI.
Introduce a new driver header and move rte_driver definition.
Update drivers and library to use the internal header.
Some applications may have been dereferencing rte_driver objects, mark
this object's accessors as stable.
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
The pci bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.
While at it, cleanup the code:
- fix indentation,
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and fix the code that relied on implicit
inclusion,
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Start a new release cycle with empty release notes.
The ABI version becomes 23.0.
The map files are updated to the new ABI major number (23).
The ABI exceptions are dropped and CI ABI checks are disabled because
compatibility is not preserved.
Special handling of removed drivers is also dropped in check-abi.sh and
a note has been added in libabigail.abignore as a reminder.
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
This commit changes 2 error messages to better
describe cq_weight related errors, should one occur.
Fixes: ffa46fc4a2 ("event/dlb2: support CQ weight")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
The cq_weight array must be sized for the maximum number
of eventdev ports, not the maximum number of DLB2
load balanced ports.
This commit fixes the above array sizing bug and resultant
coverity warning.
Coverity issue: 379234
Fixes: ffa46fc4a2 ("event/dlb2: support CQ weight")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Fix cos initialization, handling the default case too.
Substitute the semicolon for the comma
that was expected in the cos_bw command line override.
Commas are not allowed within a multi field option.
The new format is cos_bw=%d:%d:%d:%d, where the sum of
the 4 decimal values must be less than or equal to 100.
Corrected probe-time initialization order.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a bug, where we could encounter a credit
deadlock due to changing the CQ depth. To remedy this situation,
the commit reduces the maximum CQ depth from 1024 to 128,
and also allows configuring the maximum enqueue depth. Maximum
enqueue depth must be tuned to the CQ depth, if the CQ depth
is increased.
Fixes: 86fe66d456 ("event/dlb2: allow CQ depths up to 1024")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a bug, where we could assign a CQ depth
of zero, leading to a subsequent divide-by-zero fault.
It also fixes an issue where the original default CQ depth
was returned on a query, instead of the overridden value.
Fixes: 86fe66d456 ("event/dlb2: allow CQ depths up to 1024")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a typo and resultant bug that triggered a
coverity warning.
Coverity issue: 4607286
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
This commit fixes a segfault that resulted from reading
beyond the end of the port_cos array. The root cause was using
the DLB num ports define instead of the eventdev num ports define.
Fixes: bec8901bfe ("event/dlb2: support ldb port specific COS")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
DLB supports 4 class of service domains, to aid in managing the
device bandwidth across ldb ports. This commit allows specifying
which ldb ports will participate in the COS scheme, which class
they are a part of, and the specific bandwidth percentage
associated with each class. The cumulative bandwidth associated
with the 4 classes must not exceed 100%. This feature is enabled
on the command line, and will be documented in the DLB2 programmers
guide.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Enabling the weight limit on a CQ allows the enqueued QEs' 2-bit weight
value (representing weights of 1, 2, 4, and 8) to factor into whether a
CQ is full. If the sum of the weights of the QEs in the CQ meet or exceed
its weight limit, DLB will stop scheduling QEs to it (until software pops
enough QEs from the CQ to reverse that).
CQ weight support is enabled via the command line, and applies to
DLB 2.5 (and above) load balanced ports. The DLB2 documentation will
be updated with further details.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
On Xeon, 512b accesses are available, so movdir64 instruction is able to
perform 512b read and write to DLB producer port. In order for movdir64
to be able to pull its data from store buffers (store-buffer-forwarding)
(before actual write), data should be in single 512b write format.
This commit add change when code is built for Xeon with 512b AVX support
to make single 512b write of all 4 QEs instead of 4x64b writes.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Acked-by: Kent Wires <kent.wires@intel.com>
This commit corrects the advertized capabilities reported by the DLB2 PMD.
Previously DLB2 reported supporting RTE_EVENT_DEV_CAP_QUEUE_QOS, but the
DLB2 hardware does not support such capability. This commit removes that
feature from the reported capabilities feature set.
Additionally, two capabilities that DLB2 does support were not being
reported in the capabilities feature set. This commit adds those.
RTE_EVENT_DEV_CAP_MULTIPLE_QUEUE_PORT = Event device is capable of
setting up the link between multiple queues and a single port. If the
flag is not set, the eventdev can only map a single queue to each
port or map a single queue to many port
RTE_EVENT_DEV_CAP_RUNTIME_PORT_LINK = Event device is capable of
configuring the queue/port link at runtime. If the flag is not set,
the eventdev queue/port link is only can be configured during
initialization
Finally, the file doc/guides/eventdevs/features/dlb2.ini has been updated
to match the capabilities actually reported by the PMD.
Fixes: e7c9971a85 ("event/dlb2: add probe-time hardware init")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
If QID inflights is set to an invalid value, it can cause the
PMD to hang. This commit adds checks to make sure that the
value is valid before programming the hardware.
Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Previously, anything that prevented the CQs from being drained
would hang the PMD for an unacceptably long time. This commit updates
the drain logic to be resource and time based, thus eliminating
the potential for a long hang when draining the queues in preparation
for a reset.
Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
If user tried to send 64 events, it will take 64 credits. Enqueue API
only gets 32 credits each time. If it does not have sufficient credits,
it just fails and returns. Enqueue API does not retry. On next enqueue,
it will get 32 more and send will work. This results in alternate
enqueues failing.
Add check to make sure DLB2_MAX_ENQUEUE_DEPTH <=
both DLB2_SW_CREDIT_QUANTA_DEFAULT and DLB2_SW_CREDIT_BATCH_SZ.
Add enough retires in the driver to satisfy max enqueue depth credits
based on set quanta. Note the credit quanta size is different for each
port. Retry count = Max enqueue depth / credit quanta in driver before
returning no credit.
Fixes: 3a6d0c04e7 ("event/dlb2: add port setup")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Updated to allow overriding the default CQ depth of 32. Since there are
only 2048 DLB history list entries, increasing the CQ depth decreases
the number of available LDB ports to 2048/max_cq_depth. Resource query
will take this into account and return the correct maximum number of
LDB ports.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Add a check to ensure that all shift counts are valid.
Shifting by more than 63 bits may result in undefined behavior, as
noted during coverity scan.
Coverity issue: 376527
Fixes: e697f35dbd ("event/dlb2: update rolling mask used for dequeue")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
When attempting to link a port and queue immediately after unlinking,
the CQ inflights may not all be processed. Poll the h/w register for
outstanding inflights instead of reading once, in case the inflights
are still being processed. Also return EBUSY if the inflight
processing is not completed in a suitable amount of time.
Fixes: 1857f1922c ("event/dlb2: use new implementation of resource file")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Update the rolling mask used in dequeue operations to
fix the vector optimized dequeue.
Fixes: 000a7b8e75 ("event/dlb2: optimize dequeue operation")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Number of events scheduled and available for dequeue
after token pop was set to dequeue_depth-1 instead of
dequeue_depth in test_delayed_pop. The expectation is
that all dequeue_depth number of events can be dequeued
once the last event is released.
Fixes: 07d55c418d ("event/dlb2: add delayed token pop logic")
Cc: stable@dpdk.org
Signed-off-by: Rashmi Shetty <rashmi.shetty@intel.com>
Reviewed-by: Mike Ximing Chen <mike.ximing.chen@intel.com>
Replace RTE_EVENT_DEV_CAP_REQUIRES_MAINT, which signaled the need
for the application to call rte_event_maintain(), with
RTE_EVENT_DEV_CAP_MAINTENANCE_FREE, which does the opposite (i.e.,
signifies that the event device does not require maintenance).
This approach is more in line with how other eventdev hardware and/or
software limitations are handled in the Eventdev API.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
This commit implements the changes required for using suggested
port type hint feature. Each port uses different credit quanta
based on port type specified using port configuration flags.
Each port has separate quanta defined in dlb2_priv.h
Producer and consumer ports will need larger quanta value to reduce number
of credit calls they make. Workers can use small quanta as they mostly
work out of locally cached credits and don't request/return credits often.
Signed-off-by: Pravin Pathak <pravin.pathak@intel.com>
Mark all the driver specific functions as internal, remove
`rte` prefix from `struct rte_eventdev_ops`.
Remove experimental tag from internal functions.
Remove `eventdev_pmd.h` from non-internal header files.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Start a new release cycle with empty release notes.
The ABI version becomes 22.0.
The map files are updated to the new ABI major number (22).
The ABI exceptions are dropped and CI ABI checks are disabled because
compatibility is not preserved.
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
Previously, the semantics of power monitor were such that we were
checking current value against the expected value, and if they matched,
then the sleep was aborted. This is somewhat inflexible, because it only
allowed us to check for a specific value in a specific way.
This commit replaces the comparison with a user callback mechanism, so
that any PMD (or other code) using `rte_power_monitor()` can define
their own comparison semantics and decision making on how to detect the
need to abort the entering of power optimized state.
Existing implementations are adjusted to follow the new semantics.
Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Tested-by: David Hunt <david.hunt@intel.com>
Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Optimized dequeue using x86 vector instructions was added
in 21.05, but due to limited testing the default has been
changed back to the scalar mode implementation. The vector mode
implementation can be enabled via the devargs option
"vector_opts_enabled=<y/Y>".
Fixes: 000a7b8e75 ("event/dlb2: optimize dequeue operation")
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
The HW scheduling type was not being extracted properly
in the vector optimized dequeue path. It was also not
being recorded in the xstats.
Fixes: 000a7b8e75 ("event/dlb2: optimize dequeue operation")
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Deferred scheduling is a DLB v1.0 feature, and is not valid for
DLB v2.0 or v2.5.
Fixes: bc62748bd7 ("event/dlb2: add private data structures and constants")
Fixes: a2e4f1f5e7 ("event/dlb2: add dequeue and its burst variants")
Cc: stable@dpdk.org
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Let's try to enforce the convention where most drivers use a pmd. logtype
with their class reflected in it, and libraries use a lib. logtype.
Introduce two new macros:
- RTE_LOG_REGISTER_DEFAULT can be used when a single logtype is
used in a component. It is associated to the default name provided
by the build system,
- RTE_LOG_REGISTER_SUFFIX can be used when multiple logtypes are used,
and then the passed name is appended to the default name,
RTE_LOG_REGISTER is left untouched for existing external users
and for components that do not comply with the convention.
There is a new Meson variable log_prefix to adapt the default name
for baseband (pmd.bb.), bus (no pmd.) and mempool (no pmd.) classes.
Note: achieved with below commands + reverted change on net/bonding +
edits on crypto/virtio, compress/mlx5, regex/mlx5
$ git grep -l RTE_LOG_REGISTER drivers/ |
while read file; do
pattern=${file##drivers/};
class=${pattern%%/*};
pattern=${pattern#$class/};
drv=${pattern%%/*};
case "$class" in
baseband) pattern=pmd.bb.$drv;;
bus) pattern=bus.$drv;;
mempool) pattern=mempool.$drv;;
*) pattern=pmd.$class.$drv;;
esac
sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern',/RTE_LOG_REGISTER_DEFAULT(\1,/' $file;
sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern'\.\(.*\),/RTE_LOG_REGISTER_SUFFIX(\1, \2,/' $file;
done
$ git grep -l RTE_LOG_REGISTER lib/ |
while read file; do
pattern=${file##lib/};
pattern=lib.${pattern%%/*};
sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern',/RTE_LOG_REGISTER_DEFAULT(\1,/' $file;
sed -i -e 's/RTE_LOG_REGISTER(\(.*\), '$pattern'\.\(.*\),/RTE_LOG_REGISTER_SUFFIX(\1, \2,/' $file;
done
Signed-off-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Convert code to use x86 vector instructions, thereby significantly
improving dequeue performance.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
The new devarg names and their default values
are listed below. The defaults have not changed, and
none of these parameters are accessed in the fast path.
poll_interval=1000
sw_credit_quantai=32
default_depth_thresh=256
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
All references to the old register map have been removed,
so it is safe to rename the new combined file that supports
both DLB v2.0 and DLB v2.5. Also fixed all places where this
file is included.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
As support for DLB v2.5 was added, modifications were made to
dlb_hw_types_new.h, but the old file needed to be preserved during
the port in order to meet the requirement that individual patches in
a series each compile successfully. Since the DLB v2.5 support is
completely integrated, it is now safe to remove the old (original)
file, as well as the DLB2_USE_NEW_HEADERS define that was used to
control which version of the file was to be included in certain
source files.
It is now safe to rename the new file, and use it unconditionally
in all DLB source files.
Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
