Commit Graph

29 Commits

Author SHA1 Message Date
Ashwin Sekhar T K
3af7276eaf mempool/cnxk: fix destroying empty pool
In scenarios where rte_mempool_free() is called immediately
after rte_mempool_create_empty(), the NPA pool will not be
created. In such cases the free path should not call
roc_npa_pool_destroy().

Fixes: bbf19e89b8 ("mempool/cnxk: add generic operations")
Cc: stable@dpdk.org

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2022-11-15 04:24:36 +01:00
Abdullah Ömer Yamaç
7dde9c844a drivers: omit symbol map when unneeded
In this patch, we removed the necessity of the version files and
you don't need to update these files for each release, you can just
remove them.

Suggested-by: Ferruh Yigit <ferruh.yigit@amd.com>
Signed-off-by: Abdullah Ömer Yamaç <omer.yamac@ceng.metu.edu.tr>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Tested-by: Ferruh Yigit <ferruh.yigit@amd.com>
2022-11-14 15:22:46 +01:00
Shijith Thotton
6771216c2f drivers: mark cnxk to support disabling IOVA as PA
Enabled the flag pmd_supports_disable_iova_as_pa in cnxk driver build
files as they work with IOVA as VA. Updated cn9k and cn10k soc build
configurations to disable the IOVA as PA build by default.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2022-10-09 13:14:57 +02:00
Nithin Dabilpuram
8e5a4adb4f common/cnxk: reserve AURA zero on CN10KA NPA
Reserve AURA id 0 on cn10k and provide mechanism to specifically
allocate it and free it via roc_npa_* API's.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:04 +02:00
David Marchand
1f37cb2bb4 bus/pci: make driver-only headers private
The pci bus interface is for drivers only.
Mark as internal and move the header in the driver headers list.

While at it, cleanup the code:
- fix indentation,
- remove unneeded reference to bus specific singleton object,
- remove unneeded list head structure type,
- reorder the definitions and macro manipulating the bus singleton object,
- remove inclusion of rte_bus.h and fix the code that relied on implicit
  inclusion,

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
2022-09-23 16:14:34 +02:00
Harman Kalra
d41b53c5be common/cnxk: support CNF10KB SoC
Support for CNF10KB SoC by adding its PCI device ID.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-06-17 14:18:33 +02:00
Ashwin Sekhar T K
2d807166e1 mempool/cnxk: support optional wait when counting
When counting the batch allocated pointers in cnxk mempool driver,
currently it always waits for in-flight batch operations to finish.
Add a provision to make this waiting optional.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2022-06-15 21:32:56 +02:00
Ashwin Sekhar T K
7c754f553e mempool/cnxk: avoid batch op free for empty pools
Batch op data is initialized inside mempool alloc. But
in case of empty mempools, the alloc function is not
called and hence the initialization of batch op data is
also not done. So ensure the validity of batch op data
inside mempool free.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2022-06-08 11:11:32 +02:00
Tomasz Duszynski
d1422d107d common/cnxk: support CNF950_A0
Add PCI IDs which match CNF95O_A0 SoC.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
2022-06-01 22:30:32 +02:00
Rahul Bhansali
dd462f68f0 common/cnxk: support CN103XX platform
Added support for CN103XX (cn10kb) platform.

Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-06-01 21:58:38 +02:00
Ashwin Sekhar T K
5582a60eff mempool/cnxk: fix batch allocation failure path
Fix bug in batch alloc issue failure path where it was
enqueuing invalid pointers back to the pool. The code
should rightly be falling back to default dequeue path
in such cases.

Fixes: 91531e63f4 ("mempool/cnxk: add cn10k batch dequeue")
Cc: stable@dpdk.org

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2022-02-23 17:33:53 +01:00
Jerin Jacob
33e71acf3d drivers: remove octeontx2 drivers
As per the deprecation notice,  In the view of enabling unified driver
for octeontx2(cn9k)/octeontx3(cn10k), removing drivers/octeontx2
drivers and replace with drivers/cnxk/ which
supports both octeontx2(cn9k) and octeontx3(cn10k) SoCs.

This patch does the following

- Replace drivers/common/octeontx2/ with drivers/common/cnxk/
- Replace drivers/mempool/octeontx2/ with drivers/mempool/cnxk/
- Replace drivers/net/octeontx2/ with drivers/net/cnxk/
- Replace drivers/event/octeontx2/ with drivers/event/cnxk/
- Replace drivers/crypto/octeontx2/ with drivers/crypto/cnxk/
- Rename config/arm/arm64_octeontx2_linux_gcc as
  config/arm/arm64_cn9k_linux_gcc
- Update the documentation and MAINTAINERS to reflect the same.
- Change the reference to OCTEONTX2 as OCTEON 9. Old release notes and
the kernel related documentation is not accounted for this change.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ruifeng Wang <ruifeng.wang@arm.com>
2022-01-12 15:36:32 +01:00
Volodymyr Fialko
2c3e50237c mempool/cnxk: postpone devargs parsing
Use roc_npa_lf_init_cb_register() scheme to register
callback for max_pools argument parsing.
This will remove the dependency on the order of PCI
devices probed.

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-10-29 16:09:25 +02:00
Volodymyr Fialko
c52dd15813 mempool/cnxk: fix max pools argument parsing
roc_idev_npa_maxpools_set() expects max_pools original value,
not the AURA.

Fixes: 0a50a5aad2 ("mempool/cnxk: add device probe/remove")
Cc: stable@dpdk.org

Signed-off-by: Volodymyr Fialko <vfialko@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-10-29 16:09:21 +02:00
Tomasz Duszynski
77140af0b8 common/cnxk: add new PCI IDs to supported devices
CNF10KA does not differ it terms of RVU resources from
CN10KA platform hence add it to list of devices respective
drivers support.

Otherwise devices on CNF10KA are not probed even though
compatible drivers exist.

Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-10-21 13:43:56 +02:00
Gowrishankar Muthukrishnan
e8c954a369 mempool/cnxk: support telemetry
Adding telemetry endpoints to cnxk mempool driver.

Signed-off-by: Gowrishankar Muthukrishnan <gmuthukrishn@marvell.com>
Reviewed-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-10-19 18:37:15 +02:00
Andrew Rybchenko
cb77b060eb mempool: add namespace to driver register macro
Add RTE_ prefix to macro used to register mempool driver.
The old one is still available but deprecated.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
2021-10-20 10:00:18 +02:00
Bruce Richardson
4ad4b20a79 drivers: change indentation in build files
Switch from using tabs to 4 spaces for meson.build indentation.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-04-21 14:04:09 +02:00
Ashwin Sekhar T K
91531e63f4 mempool/cnxk: add cn10k batch dequeue
Add the implementation for Marvell CN10k mempool batch dequeue op.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
8f2cd79460 mempool/cnxk: add cn10k get count
Add the implementation for Marvell CN10k get count op.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
ecbc731a22 mempool/cnxk: add cn10k batch enqueue
Add the implementation for Marvell CN10k mempool batch enqueue op.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
db2a347a50 mempool/cnxk: add batch operation init
Marvell CN10k mempool supports batch enqueue/dequeue which can
dequeue up to 512 pointers and enqueue up to 15 pointers using
a single instruction.

These batch operations require a DMA memory to enqueue/dequeue
pointers. This patch adds the initialization of this DMA memory.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
89627db18f mempool/cnxk: add cn10k mempool operations
Add Marvell CN10k mempool ops and implement CN10k mempool alloc.

CN10k has 64 bytes L1D cache line size. Hence the CN10k mempool
alloc does not make the element size an odd multiple L1D cache
line size as NPA requires the element sizes to be multiples of
128 bytes.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
2655241a7e mempool/cnxk: add cn9k optimized enqueue/dequeue
Add Marvell CN9k mempool enqueue/dequeue. Marvell CN9k
supports burst dequeue which allows to dequeue up to 32
pointers using pipelined casp instructions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
e43b51fec3 mempool/cnxk: add cn9k mempool operations
Add Marvell CN9k mempool ops and implement CN9k mempool
alloc which makes sure that the element size always occupy
odd number of cachelines to ensure even distribution among
of elements among L1D cache sets.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
0ad49b2083 mempool/cnxk: register plt init callback
Register the CNXk mempool plt init callback which will set the
appropriate mempool ops to be used for the platform.

Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
bbf19e89b8 mempool/cnxk: add generic operations
Add generic CNXk mempool ops which will enqueue/dequeue
from pool one element at a time.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
0a50a5aad2 mempool/cnxk: add device probe/remove
Add the implementation for CNXk mempool device
probe and remove.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00
Ashwin Sekhar T K
2da3159197 mempool/cnxk: add build infra and doc
Add the meson based build infrastructure for Marvell
CNXK mempool driver along with stub implementations
for mempool device probe.

Also add Marvell CNXK mempool base documentation.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Ashwin Sekhar T K <asekhar@marvell.com>
2021-04-09 08:32:24 +02:00