data value could have been garbage if VPD access timed out for VPD read
request could not been issued.
Found with clang static analysis:
drivers/net/cxgbe/base/t4_hw.c:1577:22:
warning: The left operand of '&' is a garbage value
} while ((stats_reg & 0x1) && --max_poll);
~~~~~~~~~ ^
Fixes: fe0bd9ee5d ("net/cxgbe: support EEPROM access")
Cc: stable@dpdk.org
Signed-off-by: Emmanuel Roullit <emmanuel.roullit@gmail.com>
Replace the raw I/O device memory read/write access with eal
abstraction for I/O device memory read/write access to fix
portability issues across different architectures.
CC: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Program the PCIe completion timeout to 4 sec to give enough time
to allow completions to be received successfully in some older systems.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
The speed numbers ETH_LINK_SPEED_ are renamed ETH_SPEED_NUM_.
The prefix ETH_LINK_SPEED_ is kept for AUTONEG and will be used
for bit flags in next patch.
Signed-off-by: Marc Sune <marcdevel@gmail.com>
CXGBE PMD depends on an alarm to periodically transmit any pending
coalesced packets and hence spins for a lock for each tx queue in the
alarm callback.
A better solution is to try to get a lock whenever possible, instead
of spinning for it.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Update sge initialization with respect to free-list manager configuration
and ingress arbiter. Also update refill logic to refill mbufs only after
a certain threshold for rx. Optimize tx packet prefetch.
Approx. 3 MPPS improvement seen in forwarding performance after the
optimization.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Fix "MACRO redefined" and "function redefined" compilation errors in FreeBSD
by adding CXGBE prefix to them. Also remove reference to a linux header
linux/if_ether.h and use DPDK macros directly. Finally, enable CXGBE PMD
for FreeBSD.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Update pci id table to include more supported Chelsio T5 devices.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
CXGBE PMD rx allocates a new mbuf everytime, which could lead to performance
hit. Instead, do bulk allocation of mbufs and re-use them.
Also, simplify the overall rx-handler, and update its logic to fix rx perf.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
Adds hardware specific api for all the Chelsio T5 adapters under
drivers/net/cxgbe/base directory.
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
Signed-off-by: Kumar Sanghvi <kumaras@chelsio.com>
