Commit Graph

7 Commits

Author SHA1 Message Date
Jerin Jacob
45892df069 mk: use SPDX tag for Cavium copyright files
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-01-09 16:19:01 +01:00
Jerin Jacob
3abcd29f2d update Cavium Inc copyright headers
Replace the incorrect reference to "Cavium Networks", "Cavium Ltd"
company name with correct the "Cavium, Inc" company name in
copyright headers.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-07-08 17:43:49 +02:00
Ashwin Sekhar T K
34e5913067 mk: add crypto capability for armv8a and thunderx
armv8-a has optional CRYPTO extension which adds the
AES, PMULL, SHA1 and SHA2 capabilities. -march=armv8-a+crypto
enables code generation for the ARMv8-A architecture together
with the optional CRYPTO extensions.

Added the following flags to detect the corresponding
capability at compile time.
 * RTE_MACHINE_CPUFLAG_AES
 * RTE_MACHINE_CPUFLAG_PMULL
 * RTE_MACHINE_CPUFLAG_SHA1
 * RTE_MACHINE_CPUFLAG_SHA2

At run-time, the following flags can be used to detect the
capabilities.
 * RTE_CPUFLAG_AES
 * RTE_CPUFLAG_PMULL
 * RTE_CPUFLAG_SHA1
 * RTE_CPUFLAG_SHA2

Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com>
Reviewed-by: Jan Viktorin <viktorin@rehivetech.com>
2017-07-04 15:56:58 +02:00
Thomas Monjalon
9759f4cc5a mk: remove default toolchain prefix for ThunderX
The environment variable CROSS must be set when using a cross-toolchain.
However it is counter intuitive to set a default value, considering
the toolchain required to build this architecture is well known.
It is especially weird when using a native toolchain and requiring to
unset this variable on the command line.

Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-29 15:48:11 +01:00
Jerin Jacob
6e757e6942 config: clean cache line size selection scheme
by default, all the targets will be configured with the 64-byte cache line
size, targets which have different cache line size can be overridden
through target specific config file.

Selected ThunderX and power8 as CONFIG_RTE_CACHE_LINE_SIZE=128 targets
based on existing configuration.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-02-11 12:45:35 +01:00
Jerin Jacob
da8dcc27f6 hash: use armv8-a CRC32 instructions
armv8-a has optional CRC32 extension, march=armv8-a+crc enables code
generation for the ARMv8-A architecture together with
the optional CRC32 extensions.

added RTE_MACHINE_CPUFLAG_CRC32 to detect the availability of
CRC32  extension in compile time. At run-time, The RTE_CPUFLAG_CRC32
can be used to find the availability.

armv8-a+crc target support added in GCC 4.9,
Used inline assembly and emulated __ARM_FEATURE_CRC32 to work
with tool-chain < 4.9

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-25 22:13:15 +01:00
Jerin Jacob
f4f4b99f2b mk: add thunderx machine target based on armv8-a
Created the new thunderx machine target to address difference
in "cache line size" and "-mcpu=thunderx" vs default armv8-a machine target

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-18 22:44:01 +01:00