This patch adds max_link_up_time parameter to mac structure.
This parameter is used to control maximum link polling time in
ixgbe_check_mac_link functions. It is required to prevent long wait
time on x550 PHY that have no external link.
Since x550 is handled by software, we have to reset internal (PHY to
PHY) link when external link changes, and after reset, we have to wait for
this link to be established. As a result of not having interrupts, we have
to poll for link state, and we know that this link comes up much faster
than default 9 seconds. This parameter is added to prevent waiting 9
seconds for link when external link is not established.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Since this 82599 device supports WoL(Wake on LAN), driver needs
a define for the sub device ID.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch adds support for new x550 PHY IDs:
0x0154 0x0223
0x0154 0x0221
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Add new values that vary by MAC type that are introduced in
x540, x550.
And remove some meaningless comments BTW.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Add a const u32 *mvals pointer to the ixgbe_hw struct to point to an
array of mac-type-dependent values. These can include register
offsets, masks, whatever can be in a u32. When the ixgbe_hw struct
is initialized, a pointer to the appropriate array must be set.
The IXGBE_I2CCTL register references are changed to use it.
Use the mvals array to hold differing values used for
IXGBE_I2C_* symbols.
Use the mvals array to hold differing values used for
IXGBE_*_GPI* symbols.
Use the mvals array to hold differing values use for CIAA and
CIAD symbols.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
According to the hardware, the LINE side of the cs4227 needs to be
set to 10 Gbps SR mode regardless of the configuration of the link.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
The code in the if statement is specific to the KR PHY. However,
the conditional was only checking for backplane. If the driver
was using the KX4 backplane PHY, this code would execute but
would write to the wrong PHY.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch disables SW LPLU on x557 V2. It also sets the
enter_lplu function pointer to NULL on x557 V2. LPLU will be
implemented in FW for all x557 V2 interfaces. The SW LPLU
implementation must be disabled on V2 to avoid conflicts with
FW. SW LPLU support is still required for x557 V1.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch implements ixgbe_led_on_t_X550em and ixgbe_led_off_t_X550em
function for turning on and off LEDs on X557 external PHY.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
The MDIO clock needs to be configured for a specific speed for
x550em. We expected this to be done automatically, but in
the early days of the project this was not happening. We put
code in to do this ourselves.
Eventually, we decided that there is no harm in having SW do
this all the time, so we may not remove this code in the future.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Ensure link is still up after getting the speed, to ensure that the
speed read is valid.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch removes the clearing of the FEC(Forward Error Correction)
bits in ixgbe_setup_kr_speed_x550em. FEC default enablement is
configured via the NVM and SW should not be overriding these defaults
in this function.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch adds support for x550em KR/iXFI internal link modes. The initial
x550em-10GBASET and x550em-SFP designs use iXFI internal link mode between
the internal PHY and the external PHY.
However future designs will use a KR internal link. This patch is intended
to future proof the driver by adding the KR internal link support in the
driver now.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
EEE(Energy Efficient Ethernet) is not supported on the initial revision
of IXGBE_DEV_ID_X550EM_X_KR. We determine the revision by reading a fuse
register.
Also, the requirements for FEC(Forward Error Correction) have changed
slightly. Now, we don't change the "request" bit at all. When EEE is
enabled, we advertise that we are capable. When EEE is disabled, we do
not advertise that we are capable. This change makes us consistent with
the power-on defaults that are in the NVM.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
The FEC(Forward Error Correction) feature had been disabled
because it increases power consumption. However, some customers
want to use it. This patch enables FEC when EEE(Energy Efficient
Ethernet) is disabled; FEC was already being disabled when EEE
was enabled, but now both are done in the same function. The two
features are not allowed to be enabled at the same time. The two
features cannot both be disabled. If this ability is ever
determined to be needed, we will need to define a new user parameter
to control FEC independently of EEE.
Fixes: d4c9ffd4fe ("ixgbe/base: disable X550em FEC to save power")
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
During init, check the ucode running in the CS4227. If
it is not responding correctly, reset the part. This is
a global reset so it must only be done the first time a
driver loads after power-on.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Because each IOSF access requires the use of multiple registers,
use a semaphore to serialize those accesses.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Add a helper function to wait for IOSF accesses to complete. Also
perform this wait before each access, as specified in the datasheet.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
x550em has two different bus speeds, 300 MHz and 400 MHz.
A bit in a fuse register tells which it is, with a 1 meaning
the bus is running at 300 MHz.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
In UniPHY we have 2 IOSF targets that are UniPHY related. We can
write to PHY and PCS. In earlier times I've been told that there
were 2 separate PCS targets for IOSF commands and that's why I
implemented it with 2 defines and adding hw->bus.lan_id, but lately
I confirmed with HW that FW takes care of which PCS "slice" we are
talking to and is directing writes to correct one, so KX4_PCS1
target is dead now and we cannot use it.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch powers down the x550em PHY on over-temp events. The
PHY firmware is supposed to do this autonomously but that isn't
implemented. The short-term stop-gap solution is for SW to power
down the PHY when it reports an overtemp event.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch adds identify SFP module support for x550em. x550em
support returns an error for SFP module types not supported by
x550em design.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch updates the x550em SFP link setup by adding
ixgbe_sfp_type_unknown and ixgbe_sfp_type_not_present case expression
to the ixgbe_setup_mac_link_sfp_x550em SFP type switch statement. This
handles the case when no module is present.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Fix the warning caused by an uninitialized variable which might have
been used.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Configure the CS4227 correctly for both 1G and 10G operation,
by moving the code to ixgbe_setup_mac_link_sfp_x550em(). It
needs to be in this function because we need both the module
type and the speed, and this is the only function in the init
flow that knows the speed. In contrast,
ixgbe_setup_sfp_modules_X550em() does not know the speed, so we
can't do anything useful here. This is a fundamental difference
from the 82599 flow.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
On systems that support LPLU in the firmware, the driver wouldn't be
aware of the LPLU speed change, and it wouldn't cache the new value when
the driver resumes. This patch emulates the same behavior by restoring
the previous autoneg settings to autoneg_advertised.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch updates x550em LPLU (Low Power Link Up) to use the
MAC ops setup_link function pointer.
This removes redundant code and provides iXFI and KR support
between internal and external PHY.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Because we acquire two semaphore bits before setting the SWFW_SYNC
register, we should release them in the reverse order that they
were acquired.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch skips the PCI transactions pending check in
ixgbe_disable_pcie_master. The PCI transactions pending bit sticks high
when there were pending transactions, we should wait and then continue
with our reset flow.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch fixes comment description for setting 2.5G and 5G speeds in
ixgbe_setup_phy_link_generic.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Adds define for the number of bits needed to shift the EEE_SU register
in order to get the value of TEEE_DLY.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This path changes ((P == 0) ? (<value for port 0>) : (<value for port 1>))
register definition into ((P) ? <value for port 1> : <value for port 0>)
style.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Update readme file to show the version of the base code.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch simply applies the transform previously committed in
scripts/cocci/mtod-offset.cocci. No other modifications have been
made here.
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
On machines that are strict on pointer alignment, current code breaks
on GCC's -Wcast-align checks on casts from narrower to wider types.
This patch introduces new unaligned_uint(16|32|64)_t types, which
correctly retain alignment in such cases. Strict alignment
architectures will need to define CONFIG_RTE_ARCH_STRICT_ALIGN in
order to effect these new types.
Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
Acked-by: Olivier Matz <olivier.matz@6wind.com>
The rte_eth_from_rings API allowed the creation of an ethdev port at
runtime using rte_rings as the underlying storage. However, the return
value from this function was either 0 or -1, and these values were never
actually documented in the API documentation. Unfortunately, the programmers
guide doc examples for this API implied that the return value from this
function was the port id of the newly created ethdev.
Since this latter behaviour is more useful - and already implied by the
documentation, this patch changes the return 0 to "return
data->port_id". It also adds in doxygen comments for the function so it
can be correctly documented in the API reference.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
This patch includes 3 changes related to MAC/VLAN address table
when the system (e.g. testpmd) is started and closed:
- remove default MAC address with fixed VLAN 0 which was for the
debug purpose before the MAC/VLAN filter function was implemented.
- enable VF MAC/VLAN filter for the first valid MAC address
and first valid VLAN ID. This is needed for system (e.g. testpmd)
to setup default MAC address and default VLAN for VF.
Later attempt to change these default value will be refused by
under layer shared code and PF host functions.
- un-register any combination of VLAN and MAC address from fm10k
switch side MAC table when the system (e.g. testpmd) is closed.
Signed-off-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
Tested-by: Michael Qiu <michael.qiu@intel.com>
Fm10k PF/VF does not support QinQ; VLAN strip and filter are always on
for PF/VF ports.
Signed-off-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
MAC filter function was newly added, each PF and VF can have up to
64 MAC addresses.
VF filter needs support from PF host, which is not available now.
Signed-off-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
VLAN filter was updated to add/delete one static entry in MAC table for
each combination of VLAN and MAC address. More sanity checks were added.
Signed-off-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Jing Chen <jing.d.chen@intel.com>
Since the communication between PF/Switch Manager, VF/PF is
asynchronous through mailbox, it's hard to determine when Switch
Manager/PF host will send the default vlan to PF/VF. So, it's
necessary to set default vlan until the device is started.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
After acquiring MAC address from HW, it's necessary to validate
MAC address before use.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Tested-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
In fm10k, PF driver needs to communicate with switch through
mailbox if it needs to add/delete MAC address.
This fix will validate if switch is ready before going forward.
Then, it is necessary to acquire LPORT_MAP info after issuing
MAC addr request to switch.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Tested-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
In TX side, bit FM10K_TXD_FLAG_LAST in TX descriptor only is set
in the last descriptor for multi-segment packets. But current
implementation didn't set all the fields of TX descriptor, which
will cause descriptors processed now to re-use fields set in last
scroll. If FM10K_TXD_FLAG_LAST bit was set in the last round and
it happened this is not the last descriptor of a multi-segnment
packet, HW will send out the incomplete packet out and leads to
data intergrity issue.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Tested-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
fm10k can't receive frame greater than 1536 and Scatter RX
function can't work correctly. The root cause is
SRRCTL.FM10K_SRRCTL_BUFFER_CHAINING_EN bit is not enabled.
Test report: http://dpdk.org/ml/archives/dev/2015-June/019242.html
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Tested-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
As RX buffer is aligned to 512B within mbuf, some bytes are reserved
for this purpose, and the worst case could be 511B. But SRR reg
assumes all buffers have the same size. In order to fill the gap,
we'll have to consider the worst case and assume 512B is reserved.
If we don't do so, it's possible for HW to overwrite data to next
mbuf.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Shaopeng He <shaopeng.he@intel.com>
Tested-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
Both PF and VF shared code in function fm10k_stats_get().
The function works well with PF, but has problem with VF since
VF has less queues than PF.
Fixes: a6061d9e70 ("fm10k: register PF driver")
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
Original implementation required mbuf size should be greater than
ETHER_MAX_VLAN_FRAME_LEN, which is not necessary. If it's less
than that value, scatter function will be selected and incoming
packets greater than mbuf size will be filled into several mbufs.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
Add functions to support promiscuous/allmulticast enable and
disable.
Signed-off-by: Chen Jing D(Mark) <jing.d.chen@intel.com>
Tested-by: Michael Qiu <michael.qiu@intel.com>
Acked-by: Michael Qiu <michael.qiu@intel.com>
For there're only laser ports on x550 before, we only considered laser
ports for the testpmd CLIs "port start/stop ...". Now we have new x550
devices which have copper ports. Use the API for copper to enable/disable
these ports.
And also let the testpmd CLI "set link-up/down ..." support copper
ports.
Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
