1223 Commits

Author SHA1 Message Date
Suanming Mou
4a73c86ff6 net/mlx5: fix crash on GRE flow rule parsing
When set the GRE item, GRE key should follow after GRE header, or the
header gre_item pointer used by the key will be invalid.

Currently in the mlx5_flow_validate_item_gre_key() function, the header
gre_item pointer is access before checking if the key is after the
header or not. Once the key item is before the header, invalid gre_item
pointer access happens.

Move the gre_item pointer access after the GRE header check to avoid the
crash issue.

Fixes: a7a0365565a4 ("net/mlx5: match GRE key and present bits")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2019-11-26 18:22:27 +01:00
Suanming Mou
4acb96fd52 net/mlx5: add GENEVE in tunnel offloads capabilities
GENEVE is available in tunnel offloads. Add it as the default support
option.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2019-11-26 18:22:27 +01:00
Ali Alnubani
373c6114f5 net/mlx5: fix build with dlopen linkage
The header mlx5_glue.h includes rte_byteorder.h, which isn't
pulled by global_inc. This patch adds the missing include directory
and fixes the build error:

  In file included from drivers/net/mlx5/mlx5_glue.c:31:
  drivers/net/mlx5/mlx5_glue.h:12:10: fatal error:
  rte_byteorder.h: No such file or directory

The build failure can be triggered with:
  meson -Dibverbs_link=dlopen build && ninja -C build

Fixes: 400d985eb586 ("net/mlx5: add VLAN push/pop DR commands to glue")

Signed-off-by: Ali Alnubani <alialnu@mellanox.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-11-26 18:22:27 +01:00
Viacheslav Ovsiienko
82e75f8323 net/mlx5: fix legacy multi-packet Tx descriptors
ConnectX-4LX supports multiple packets within the single Tx
descriptor. This feature is named as "Legacy Multi-Packet Write"
and imposes a lot of limitations:

  - no ACLs, it means no NIC Tx Flows are supported and Tx metadata
    become meaningless
  - the required minimal inline data must be zero
  - no SR-IOV, it means no support in E-Switch configurations,
  - no priority and dscp forcing
  - no VLAN insertion
  - no TSO
  - all packets within MPW session must have the same size

This legacy MPW feature is mainly intended for test purposes.
To explicitly engage the feature on ConnectX-4LX the devargs
should be specified:

  - txq_mpw_en=1

This feature was dropped in 19.08, this patch reverts it back.

Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-26 18:22:27 +01:00
Dekel Peled
0adf23adcb net/mlx5: fix flow engine choice
Commit in fixes line sets the DV (Direct Verbs) flow engine as default.
Newer versions of DV flow engine use the DR (Direct Rules) features.
DR is supported from RDMA Core library version rdma-core-24.0.
This cause failure to start port when using older rdma-core version,
without DR support.

This patch selects DV flow engine if rdma-core version is v24.0 or
higher. Verbs flow engine is selected otherwise.

Fixes: cd4569d2bf3c ("net/mlx5: change default flow engine to DV")

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2019-11-26 18:05:15 +01:00
Viacheslav Ovsiienko
8723061aa6 net/mlx5: fix getting metadata register for E-Switch domain
The metadata register used for META item/action within E-Switch
steering domain should be altered depending on dv_xmeta_en
devarg value.

Fixes: 3e8edd0ef848 ("net/mlx5: update metadata register ID query")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-26 18:05:15 +01:00
Suanming Mou
7c1852e48f net/mlx5: fix chosen L3/L4 layer with tunnel
For tunnel mode, there may be two L3/L4 layer match pattern items, one
for inner and one for outer layers. The L3 TTL and L4 port header
modify actions should handle the outermost layer items.

Currently flow_dv_attr_init() doesn't distinguish between outer and
inner layers, since inner layer comes later than the outer layer, this
may cause inner layer values also set to the flow attributes and may
lead actions to use inner L3/L4 pattern items.

Adding a check in flow_dv_attr_init() to prevent inner layer to set the
flow attribute if the previous L3/L4 outer pattern exist.

Fixes: 4bb14c83df95 ("net/mlx5: support modify header using Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-26 18:05:15 +01:00
Ori Kam
9e0d81c1a1 net/mlx5: fix selection between encap and decap
The current raw_encap function selects if to decap or encap
based on the egress/ingress attribute. This concepts doesn't work
in case of FDB since all flows are considered ingress.

To solve this issue we moved to check the encap size.
if the encap size is larger then eth + ipv4 it means we are
trying to encap.

Fixes: 8ba9eee4ce32 ("net/mlx5: add raw data encap/decap to Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-26 18:05:15 +01:00
Matan Azrad
1ef4cdef26 net/mlx5: fix flow tag hash list conversion
When DR is not supported and DV is supported, tag action still can be
used by the metadata feature.

Wrongly, the tag hash list was not created what caused failure in
metadata action creation.

Create the tag hash list for each DV case.

Fixes: 860897d2895a ("net/mlx5: reorganize flow tables with hash list")

Signed-off-by: Matan Azrad <matan@mellanox.com>
2019-11-26 18:05:15 +01:00
Pawel Modrak
85ff364f3b build: align symbols with global ABI version
Merge all versions in linker version script files to DPDK_20.0.

This commit was generated by running the following command:

:~/DPDK$ buildtools/update-abi.sh 20.0

Signed-off-by: Pawel Modrak <pawelx.modrak@intel.com>
Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-11-20 23:05:39 +01:00
Anatoly Burakov
fbaf943887 build: remove individual library versions
Since the library versioning for both stable and experimental ABI's is
now managed globally, the LIBABIVER and version variables no longer
serve any useful purpose, and can be removed.

The replacement in Makefiles was done using the following regex:

	^(#.*\n)?LIBABIVER\s*:=\s*\d+\n(\s*\n)?

(LIBABIVER := numbers, optionally preceded by a comment and optionally
succeeded by an empty line)

The replacement for meson files was done using the following regex:

	^(#.*\n)?version\s*=\s*\d+\n(\s*\n)?

(version = numbers, optionally preceded by a comment and optionally
succeeded by an empty line)

[David]: those variables are manually removed for the files:
- drivers/common/qat/Makefile
- lib/librte_eal/meson.build
[David]: the LIBABIVER is restored for the external ethtool example
library.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-11-20 23:05:39 +01:00
Matan Azrad
e7f4fbb301 net/mlx5: fix Rx queue release assertions
In debug mode, there is assertion to validate the CQ object before the
release.

Wrongly, the assertion is done for any type of RX queue even if it
doesn't use CQ at all, for example in hairpin Rx queue.

Ignore CQ assertion when hairpin queue is released.

Fixes: e79c9be91515 ("net/mlx5: support Rx hairpin queues")

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2019-11-20 17:36:06 +01:00
Matan Azrad
36e5527573 net/mlx5: fix L3 encapsulation flow validation
In order to configure L3 encapsulation\decapsulation flow to mlx5
devices, 2 actions should be added to the flow actions list:
RTE_FLOW_ACTION_TYPE_RAW_DECAP and RTE_FLOW_ACTION_TYPE_RAW_ENCAP.

One of the validations for this scenario is to check that modify actions
is not done before the L3 decapsulation, because it doesn't make sense
to decapsulate a modified data.

Wrongly, this check was done for the case of L3 encapsulation what
causes a validation failure in modify + L3 encapsulation flow.

Ignore this check in case of L3 encapsulation.

Fixes: 4bb14c83df95 ("net/mlx5: support modify header using Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Matan Azrad <matan@mellanox.com>
2019-11-20 17:36:06 +01:00
Ori Kam
2e715e53de net/mlx5: fix hairpin split detection
When creating a flow, the flow is checked if it should be split into
2 flows based on the queue/rss acton.

If the RSS action with given without any queues, it will result in crash
due to the fact that the function checks the queue type.

This commit fixes this issue by checking if the rss action is not empty,
and at least one queue.

Fixes: d85c7b5ea59f ("net/mlx5: split hairpin flows")

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:06 +01:00
Viacheslav Ovsiienko
c4d314a352 net/mlx5: fix assert in Tx inline settings
Assert condition is fixed to not alert for the case
when multi-packet write is not supported/engaged at all.

Fixes: b53cd86965a1 ("net/mlx5: adjust inline setting for large Tx queue sizes")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:06 +01:00
Viacheslav Ovsiienko
6cfe84fbe7 net/mlx5: fix port action for LAG
To support LAG configurations the mlx5dv_dr_action_create_dest_ib_port()
should be called instead of mlx5dv_dr_action_create_dest_vport().

Fixes: f07341e7aed3 ("net/mlx5: update source and destination vport translations")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2019-11-20 17:36:06 +01:00
Viacheslav Ovsiienko
f078ceb6ae net/mlx5: fix Tx doorbell write memory barrier
As the result of testing it was found that some hosts have
the performance penalty imposed by required write memory barrier
after doorbell writing. Before 19.08 release there was some
heuristics to decide whether write memory barrier should be
performed. For the bursts of recommended size (or multiple)
it was supposed there were some extra ongoing packets in the
next burst and write memory barrier may be skipped (supposed
to be performed in the next burst, at least after descriptor
writing).

This patch restores that behaviour, the devargs tx_db_nc=2
must be specified to engage this performance tuning feature.

Fixes: 8409a28573d3 ("net/mlx5: control transmit doorbell register mapping")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:06 +01:00
Dekel Peled
cd4569d2bf net/mlx5: change default flow engine to DV
The default flow engine is Verbs flow engine, for legacy reasons.
This patch changes the default to DV flow engine (dv_flow_en = 1).
Documentation is updated accordingly.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:06 +01:00
Viacheslav Ovsiienko
85c4bcbcc5 net/mlx5: fix vport index in port action
The rdma_core routine mlx5dv_dr_create_flow_action_dest_vport()
requires the vport id parameter to create port action.
The register c[0] value was used to deduce the port id value
and it fails in bonding configuration. The correct way is
to apply vport_num value queried from the rdma_core library.

Fixes: f07341e7aed3 ("net/mlx5: update source and destination vport translations")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:06 +01:00
Matan Azrad
54534725d2 net/mlx5: fix flow table hash list conversion
For the case when DR is not supported and DV is supported:
	multi-tables feature is off.
	In this case, only table 0 is supported.
	Table 0 structure wrongly was not created what prevented any
	matcher object to be created and even caused crashes.

Create the table hash list in DV case too.
Create table zero empty structure for each domain when DR is not
supported.
Allow NULL DR internal table object to be used.

Fixes: 860897d2895a ("net/mlx5: reorganize flow tables with hash list")

Signed-off-by: Matan Azrad <matan@mellanox.com>
2019-11-20 17:36:06 +01:00
Andrew Rybchenko
73fb89dd6a drivers/net: fix RSS hash offload flag if no RSS
By default RSS hash delivery (offload) is bound to RSS mode and
it is incorrect to advertise it as enabled if Rx multi-queue mode
has no RSS.

Fixes: 8b945a7f7dcb ("drivers/net: update Rx RSS hash offload capabilities")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-11-20 17:36:06 +01:00
Viacheslav Ovsiienko
99eafd1b7a net/mlx5: fix vport id in port id action
The kernel driver (starting from OFED 4.7.3.1.3) uses the upper half
of metadata register C0 to provide VHCA and vport id's. The mlx5 PMD
should check the actual mask of register C0 and shift the vport id
value for port actions appropriately.

Fixes: f07341e7aed3 ("net/mlx5: update source and destination vport translations")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-20 17:36:05 +01:00
Viacheslav Ovsiienko
06f78b5ebc net/mlx5: fix environment variable recovery
The state of environment variable MLX5_BF_SHUT_UP was not
recovered correctly if there was no tx_db_nc devarg specified.

Fixes: 8409a28573d3 ("net/mlx5: control transmit doorbell register mapping")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:05 +01:00
Xiaoyu Min
20ac796641 net/mlx5: fix layer bits to be unique
The layer bits should be unique otherwise layer info will be
interpreted wrongly.

Fixes: 70d84dc797b7 ("net/mlx5: add internal tag item and action")
Fixes: 55deee1715f0 ("net/mlx5: extend flow mark support")

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:05 +01:00
Dekel Peled
50d23b9ace net/mlx5: fix verbs flow counter query
Function flow_verbs_counter_query() was recently modified.
The new 'if' condition uses a pointer to flow counter-set.
This pointer is valid only if flow contains a count action.

This patch adds check to verify the pointer is valid.

Fixes: d85c7b5ea59f ("net/mlx5: split hairpin flows")

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:05 +01:00
Dekel Peled
6b7af102d0 net/mlx5: fix getting Rx queue type
Function mlx5_rxq_get_type() uses the input queue index, without
checking it, as index to the Rx queues array.
If this value is too high, it will result in pointer to memory out
of Rx queues array bounds.

This patch adds check of the input queue index, to verify it is valid.

Fixes: d85c7b5ea59f ("net/mlx5: split hairpin flows")

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-20 17:36:05 +01:00
Viacheslav Ovsiienko
cec19a342f net/mlx5: fix suffix flow creation in metadata split
The variable cleanup was erroneously done before pointer usage.
The cleanup is moved to appropriate place, comment is clarified.

Fixes: 8d72fa668964 ("net/mlx5: share tag between meter and metadata")

Reported-by: Eli Britstein <elibr@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-20 17:36:05 +01:00
Matan Azrad
7f1517012b net/mlx5: revert default rules amount optimization
This reverts commit 304ffe576f239e5405228c0feec04b6138d525b7.

It tried to optimize the amount of the default flow
rules and created it only once on top of the PF representor.

For each FDB rule, the default port ID to match on is like of the port
that triggers the flow.

Hence, the single default rule will not be matched on the VF traffic.

As a result, all the traffic of the VFs will not match to the jump flow
in the root table and will always be forwarded to the representor port.

Revert the commit.

Fixes: 304ffe576f23 ("net/mlx5: fix condition to create default rule")

Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-20 17:36:05 +01:00
Dekel Peled
97127d4298 net/mlx5: fix check of RSS queue index
RSS action validation function checks the queues included in RSS
to make sure they are valid.
A Queue is considered valid if the pointer to the queue (item at
location queue-index of RxQ array) is not a null value.
The queue indices are not checked. If a large value is entered as
queue index, using it as an index in RxQ array will result in a
pointer to memory out of array bounds. If this memory contains a
value which is not null, this queue will be wrongly considered valid.

This patch updates function mlx5_flow_validate_action_rss() with
check of the input queue indices, as done in function
mlx5_flow_validate_action_queue().

Fixes: 23c1d42c7138 ("net/mlx5: split flow validation to dedicated function")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-20 17:36:05 +01:00
Viacheslav Ovsiienko
dcd1b653e9 net/mlx5: fix query host adapter attributes
Host adapter attributes are queried from kernel via multiple
DevX calls. The retrieved data were erroneously overwritten,
the order of querying is fixed.

Fixes: 6bc327b94fe8 ("net/mlx5: fill meter capabilities using DevX")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-20 17:36:05 +01:00
Dekel Peled
1c7e57f9bd net/mlx5: set maximum LRO packet size
This patch implements use of the API for LRO aggregated packet
max size.
Rx queue create is updated to use the relevant configuration.
Documentation is updated accordingly.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-12 01:43:47 +01:00
Raslan Darawsheh
0d1d731708 net/mlx5: set VF MAC address from host
Allow to configure the default MAC address of a VF
via its representor port in the host.

An API was proposed to specify explicitly the VF as a
target: https://patches.dpdk.org/patch/62176/

It has been rejected by the technical board in order to
keep compatibility with behavior in Intel PMDs.
http://mails.dpdk.org/archives/dev/2019-November/150588.html

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 16:47:17 +01:00
Pavan Nikhilesh
8b945a7f7d drivers/net: update Rx RSS hash offload capabilities
Add DEV_RX_OFFLOAD_RSS_HASH flag for all PMDs that support RSS hash
delivery.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-11-11 16:15:37 +01:00
Bing Zhao
e484e40323 net/mlx5: optimize tag traversal with hash list
Tag action for flow mark/flag could be reused by different flows.
When creating a new flow with mark, the existing tag resources will
be traversed in order to confirm if the action is already created.
If only one linked list is used, the searching rate will drop
significantly with the number of tag actions increasing.
By using a hash lists table, it will speed up the searching process
and in the meanwhile, the memory consumption won't be large if only
a small number tag action resources are created(compared to other
hash table implementations). The list heads array size could be
optimized with some extendable hash table in the future.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 14:23:02 +01:00
Bing Zhao
e9e36e52ee net/mlx5: reorganize flow matcher resources
Matchers are created on the specific table. If a single linked list
is used to store these, then the finding process might be the
bottleneck when there are a lot of different flow matchers on a
huge amount of tables. The matchers could be move into the table
data resource structure in order to reduce the comparison times
when finding.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 14:23:02 +01:00
Bing Zhao
6c1d9a642e net/mlx5: reorganize jump table resources
Jump object is associated with table object, so there is no need to
use a single linked list to store it. All the jump objects could be
put together with related flow tables.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 14:23:02 +01:00
Bing Zhao
860897d289 net/mlx5: reorganize flow tables with hash list
In the current flow tables organization, arrays are used. This is
fast for searching, creating related object that will be used in
flow creation. But it introduces some limitation to the table index.
Then we can reorganize the flow tables information with hash list.
When using hash list, there is no need to maintain three arrays for
NIC TX, RX and FDB tables object information.
This attribute could be used together with the table ID to generate
a 64-bits key that is unique for the hash list insertion, lookup and
deletion.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
8409a28573 net/mlx5: control transmit doorbell register mapping
The rdma core library can map doorbell register in two ways,
depending on the environment variable "MLX5_SHUT_UP_BF":

  - as regular cached memory, the variable is either missing or
    set to zero. This type of mapping may cause the significant
    doorbell register writing latency and requires explicit
    memory write barrier to mitigate this issue and prevent
    write combining.

  - as non-cached memory, the variable is present and set to
    not "0" value. This type of mapping may cause performance
    impact under heavy loading conditions but the explicit write
    memory barrier is not required and it may improve core
    performance.

The new devarg is introduced "tx_db_nc", if this parameter is
set to zero, the doorbell register is forced to be mapped to
cached memory and requires explicit memory barrier after
writing to. If "tx_db_nc" is set to non-zero value the doorbell
will be mapped as non-cached memory, not requiring the memory
barrier. If "tx_db_nc" is missing the behaviour will be defined
by presence of "MLX5_SHUT_UP_BF" in environment. If variable
is missed the default value zero will be set for ARM64 hosts
and one for others.

In run time the code checks the mapping type and provides the
memory barrier after writing to tx doorbell register if it is
needed. The mapping type is extracted directly from the
uar_mmap_offset field in the queue properties.

Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
2d2c2efeda net/mlx5: fix asserts for multi-segment Tx offload misconfig
To support multi-segment packet sending the Tx datapath
DEV_TX_OFFLOAD_MULTI_SEGS offload must be configured.
In debug configuration the asserts arise if the multi-segment
packet is being sent and no DEV_TX_OFFLOAD_MULTI_SEGS is set.
It was found that in some execution paths asserts were missed,
this patch adds ones.

Fixes: 18a1c20044c0 ("net/mlx5: implement Tx burst template")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
02e7646818 net/mlx5: clean meter resources
When the port is closed or program exits ungraceful, the meter rulers
should be flushed after the flow destroyed.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
8d72fa6689 net/mlx5: share tag between meter and metadata
In the meter flow split, metadata flow will be as the sub flow of meter
suffix flow. In meter suffix flow, there is already a unique id tag
exist as for the meter prefix and suffix flow match.

Make metadata feature and meter both share the unique id tag for match.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
9ea9b049a9 net/mlx5: split meter flow
The flow with meter action will be divided to three sub flows, the
prefix flow, the meter flow and the suffix flow.

For these three sub flows, as the prefix flow and meter flow have the
meter color match. In order the make the packet from prefix flow to
match with the suffix flow, an extra metadata register is allocated.
The prefix flow will add a unique id to the register and the suffix
flow matches on that unique id.

As RSS will also divided the flow to several sub flows, flow with meter
will be divided as the sub flow of the RSS sub flows if have as below:

Original flow ->
	RSS sub flow 1 ->
		Meter sub flow 1 (Contain three sub flows.)
	RSS sub flow 2 ->
		Meter sub flow 2 (Contain three sub flows.)
	......
	RSS sub flow n ->
		Meter sub flow n (Contain three sub flows.)

The metadata feature flow will be split as the sub flow of the meter
suffix flow.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
f46bf74887 net/mlx5: support meter flow action
Add meter flow action support in flow validate and translate.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
266e9f3d36 net/mlx5: add meter attach and detach
Add the meter attach and detach for the flow create.

When create the flow with meter, first try to find any created meter
action matches the flow meter id. If the meter action is already
created, just attach to it and increase the ref_cnt. If not, create
one.

For the dettach, decrease the ref_cnt, destroy the meter action while
the ref_cnt decreased to zero.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
fab7f7d450 net/mlx5: add meter statistics read and update
This commit add the meter statistics read and update to check the meter
statistics.

New internal functions in rte_mtr_ops callback:
1. stats_update()
2. stats_read()

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
4dedc7c639 net/mlx5: add count action to meter
Add count action to meter for metering packet statistics. All the
packets be colored and dropped will be recorded.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
e189f55cd2 net/mlx5: expose flow counters management
Expose the flow counter management mechanism for other components to
use.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
63ffeb2ff2 net/mlx5: support meter profile update
This commit add the meter profile update support.

New internal function in rte_mtr_ops callback:
1. meter_profile_update()

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
33e01809f8 net/mlx5: support meter modification operations
This commit add meter enable and disable supoort.

New internal functions in rte_mtr_ops callback:
1. meter_enable()
2. meter_disable()

The meter_enable() enables the meter action and the meter_disable()
disables the meter action.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
1b346cc63d net/mlx5: add meter action creation to the glue
This commit add the meter action creation to the glue code.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00