Add device arguments to lock NPA aura and pool contexts in NDC cache.
The device args take hexadecimal bitmask where each bit represent the
corresponding aura/pool id.
Example:
-w 0002:02:00.0,npa_lock_mask=0xf // Lock first 4 aura/pool ctx
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Removed the typing error in doc/guides/eventdevs/index.rst,
drivers/net/mlx5/mlx5.c and in lib/librte_vhost/rte_vhost.h
Bugzilla ID: 477
Fixes: 0857b9421138 ("doc: add event device and software eventdev")
Fixes: 039253166a57 ("vhost: add device op when notification to guest is sent")
Fixes: ad74bc619504 ("net/mlx5: support multiport IB device during probing")
Cc: stable@dpdk.org
Signed-off-by: Muhammad Bilal <m.bilal@emumba.com>
Sync mail box data structures to version 1.1.3.
Add mail box version verification and defer initializing octeontx
devices if mail box version mismatches.
Update OCTEON TX limitaion with max mempool size used.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Jerin Jacob <jerinj@marvell.com>
This patch bump the supported SDK and MC firmware version
to the latest.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
dpaa and dpaa2 config have evolved to be same. The same binary
can now work across the platforms. So, there is no need to maintain
two different build configs.
The dpaa config shall work for both generation of dpaa platforms.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.
Example:
--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.
Example:
--dev "0002:0e:00.0,tim_rings_lmt=2"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.
Example:
--dev "0002:0e:00.0,tim_stats_ena=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.
Example:
--dev "0002:0e:00.0,tim_chnk_slots=511"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.
Example:
--dev "0002:0e:00.0,tim_disable_npa=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:
Example:
--dev "0002:0e:00.0,selftest=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.
Example:
--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]
Qx -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.
The values need to be expressed in terms of percentages, 0 represents
default.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
--dev "0002:0e:00.0,single_ws=1"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, Octeontx2 SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.
Example:
--dev "0002:0e:00.0,xae_cnt=8192"
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Add the make and meson based build infrastructure along with the
eventdev(SSO) device probe.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Rather than using linuxapp and bsdapp everywhere, we can change things to
use the, more readable, terms "linux" and "freebsd" in our build configs.
Rather than renaming the configs we can just duplicate the existing ones
with the new names using symlinks, and use the new names exclusively
internally. ["make showconfigs" also only shows the new names to keep the
list short] The result is that backward compatibility is kept fully but any
new builds or development can be done using the newer names, i.e. both
"make config T=x86_64-native-linuxapp-gcc" and "T=x86_64-native-linux-gcc"
work.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Trivial pelling errors found by codespell.
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
'OCTEON TX' is the registered name. All other usages need to be fixed.
Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
This patch add support to use select call with qman portal fd
for timeout based dequeue request for eventdev.
If there is a event available qman portal fd will be set
and the function will be awakened. If no event is available,
it will only wait till the given timeout value.
In case of interrupt the timeout ticks are used as usecs.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
The DSW event device is documented in DPDK Programmer's Guide.
The MAINTAINERS file and the 18.11 release notes are updated.
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
When the application requests to create a timer device, Octeontx TIM
create does the following:
- Get the requested TIMvf ring based on adapter_id.
- Verify the config parameters supplied.
- Allocate memory required for
* Buckets based on min and max timeout supplied.
* Allocate the chunk pool based on the number of timers.
- Clear the interrupts.
On Free:
- Free the allocated bucket and chunk memory.
- Free private data used by TIMvf.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
On Octeontx HW, each event timer device is enumerated as separate SRIOV VF
PCIe device.
In order to expose as a event timer device:
On PCIe probe, the driver stores the information associated with the
PCIe device and later when application requests for a event timer device
through `rte_event_timer_adapter_create` the driver infrastructure creates
the timer adapter with earlier probed PCIe VF devices.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Some changes had already been pushed via SHA:72654f090a11 patch. This
patch updates them.
Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
DPAA2 eventdev is named as event_dpaa2 which conflicts with
event_dpaa when both are compiled in together. So event_dpaa
is required to renamed.
Fixes: 1ee9569576f6 ("config: enable dpaaX drivers for generic ARMv8")
Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Add selftest as a device argument that can be enabled by suppling
'self_test=1' as a vdev parameter
--vdev="event_octeontx,self_test=1"
The selftest is run after vdev creation is successfully
complete.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Add the description about opdl pmd
Signed-off-by: Liang Ma <liang.j.ma@intel.com>
Signed-off-by: Peter Mccarthy <peter.mccarthy@intel.com>
Acked-by: Marko Kovacevic <marko.kovacevic@intel.com>
Remove unused debug config options for thunder nicvf and octeontx as they
are now controlled by dynamic logging.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: Stephen Hemminger <stephen@networkplumber.org>
This commit adds a section to the docs listing the platform
guide for the PMDs.
It then adds the octeontx platform guide to the listed platform
devices.
Patch also removes platform specific duplicate setup information from
eventdev/octeontx.rst, nics/octeontx.rst and update to
plaform/octeontx.rst.
Signed-off-by: Santosh Shukla <santosh.shukla@caviumnetworks.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Update software event device documentation to include use of service
cores for event distribution.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Acked-by: John McNamara <john.mcnamara@intel.com>
Add Rx adapter queue add and delete API for both generic eth_devices as
well as HW backed eth_octeontx which supports direct event injection to
event device.
The HW injected event needs to be converted into mbuf, previously this
was done in eth_octeontx during rx_burst now it is moved to
event_octeontx as events from Rx adapter are dequeued directly from
event device.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@caviumnetworks.com>
Reviewed-by: Nikhil Rao <nikhil.rao@intel.com>
This commit shows how easy it is to enable a specific
DPDK component with a service callback, in order to get
CPU cycles for it.
The beauty of this method is that the service is unaware
of how much CPU time it is getting - the application can
decide how to split and slice cores and map them to the
registered services.
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Replace the incorrect reference to "Cavium Networks", "Cavium Ltd"
company name with correct the "Cavium, Inc" company name in
copyright headers.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
