Commit Graph

26696 Commits

Author SHA1 Message Date
Viacheslav Ovsiienko
3ceeed9f78 doc: update flow mark action in mlx5 guide
There some limitations added for the MARK action value range.

Fixes: 2d241515eb ("net/mlx5: add devarg for extensive metadata support")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:08 +01:00
Shiri Kuzin
b6aaaa22ae net/mlx5: refuse empty VLAN in flow pattern
In verbs, an empty VLAN is equivalent to a packet without VLAN layer,
hence, the VLAN item should not be empty and this case is rejected.

However, the case for ether type of VLAN without following VLAN item
was not validated, allowing the creation of a flow with empty
VLAN item.

To fix this issue a validation was added requiring ether type of VLAN
will be followed with VLAN item.

Fixes: 0b1edd21cd ("net/mlx5: refuse empty VLAN flow specification")
Cc: stable@dpdk.org

Signed-off-by: Shiri Kuzin <shirik@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-29 18:16:08 +01:00
Alexander Kozyrev
bd0940a5c4 net/mlx5: fix flow tag decompression
Packets can get a wrong Flow Tag on x86 architecture with the Flow Tag
compression format (rxq_cqe_comp_en=2) enabled inside the SSE Rx burst.
The shuffle mask that extracts a Flow Tag from the pair of compressed
CQEs is reversed. This leads to the wrong Flow Tag assignment.
Correct the shuffle mask to get proper bytes for a Flow Tag from
miniCQEs.

Fixes: 54c2d46b16 ("net/mlx5: support flow tag and packet header miniCQEs")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:08 +01:00
Gregory Etelson
49be011d3c net/mlx5: fix drop action in tunnel offload mode
Tunnel offload mode allows application to restore partially offloaded
tunneled packets to its original state.
The mode was designed to optimize packet recovery. It must not
block flow actions that are allowed by MLX5 PMD.

The patch allows tunnel offload match rules to use drop flow action.

Fixes: 4ec6360de3 ("net/mlx5: implement tunnel offload")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:08 +01:00
Gregory Etelson
31cb857d09 net/mlx5: fix mark action in active tunnel offload
Tunnel offload mode allows application to restore partially offloaded
tunneled packets to its original state.
MLX5 PMD stores internal data required to restore partially offloaded
packet in packet mark section. Therefore MLX5 PMD will not allow
applications to use mark action if tunnel offload mode was activated.
The restriction is applied both to regular and tunnel offload rules.

The patch rejects application rules with mark action while tunnel
offload is active.

Fixes: 4ec6360de3 ("net/mlx5: implement tunnel offload")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:08 +01:00
Liron Himi
701f94a60a net/octeontx2: fix PF flow action for Tx
pf-func is 16bit but the current reserved location
used in tx action is 8bits. Moved it to bits 63-48.

Fixes: 32e6aaa97c ("net/octeontx2: support flow parse actions")
Cc: stable@dpdk.org

Signed-off-by: Liron Himi <lironh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2021-01-29 18:16:08 +01:00
Lance Richardson
c711cc2a98 net/bnxt: fix null termination of Rx mbuf chain
The last mbuf in a multi-segment packet needs to be
NULL-terminated.

Fixes: 0958d8b643 ("net/bnxt: support LRO")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-29 18:16:08 +01:00
Alvin Zhang
b57927702a app/testpmd: fix key for RSS flow rule
Since the patch '1848b117' has initialized the variable 'key' in
'struct rte_flow_action_rss' with 'NULL', the PMD cannot get the
RSS key now. Details as bellow:

testpmd> flow create 0 ingress pattern eth / ipv4 / end actions
         rss types ipv4-other end key
         1234567890123456789012345678901234567890FFFFFFFFFFFF123
         4567890123456789012345678901234567890FFFFFFFFFFFF
         queues end / end
Flow rule #1 created
testpmd> show port 0 rss-hash key
RSS functions:
         all ipv4-other ip
RSS key:
         4439796BB54C5023B675EA5B124F9F30B8A2C03DDFDC4D02A08C9B3
         34AF64A4C05C6FA343958D8557D99583AE138C92E81150366

This patch sets offset and size of the 'key' variable as the first
parameter of the token 'key'. Later, the address of the RSS key will
be copied to 'key' variable.

Fixes: 1848b117cc ("app/testpmd: fix RSS key for flow API RSS rule")
Cc: stable@dpdk.org

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Tested-by: Jun W Zhou <junx.w.zhou@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-29 18:16:08 +01:00
Yuying Zhang
0c0735ff4f net/ice/base: add ethertype offset for QinQ dummy packet
Add the ethertype offset for QinQ switch rule dummy packet to
allow matching the corresponding field.

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:08 +01:00
Xuan Ding
1132044655 net/ice: fix symmetric rule creation
Only allow to create symmetric rule for L3/L4.

Fixes: 38d632cbdc ("net/ice: refactor PF RSS")

Signed-off-by: Xuan Ding <xuan.ding@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:07 +01:00
Haiyue Wang
5d4ca9b0a2 net/ice: drain out DCF AdminQ command queue
The virtchnl message is handled one by one by checking opcode to match
the response for the request.

The DCF AdminQ command with buffer needs two virtchnl commands, one is
to handle the AdminQ descriptor, the other is to the handle AdminQ
buffer. If both of them are sent to PF successfully, it needs to wait
two responses from PF, even if the AdminQ descriptor command gets the
failure response. Since PF will handle them one by one, and send back
the response for each.

If not wait for the buffer message response until timeout to drain out
the virtchnl command queue, it will cause the next AdminQ command with
buffer to get the stall buffer response from previous.

Fixes: daa714d55c ("net/ice: handle AdminQ command by DCF")
Cc: stable@dpdk.org

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:07 +01:00
Somnath Kotur
7db2f5eddd net/bnxt: fix lock handling in stop and close
err_recovery_lock needs to be released before returning in
stop and close_op if FW_RESET flag is set.

Fixes: 6f5f3b9982 ("net/bnxt: check chip reset in stop and close")

Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-29 18:16:07 +01:00
Somnath Kotur
3127f99274 net/bnxt: refactor init/uninit
Move all the individual driver fields allocation routines to one
routine - bnxt_drv_init(). This houses all such routines where
memory needs to be allocated once during the driver's lifetime
and does not need to be torn down during error recovery.

Rename some function names in accordance with their functionality.
bnxt_init_board() is doing nothing more than mapping the PCI bars,
so rename it as such.

Given that there is a bnxt_shutdown_nic that is called in dev_stop_op,
rename it's counterpart - bnxt_init_chip() that is called in
dev_start_op, to bnxt_start_nic. Also helps avoid confusion with some of
the other bnxt_init_xxx routines.
Rename bnxt_init_fw() to bnxt_get_config() as that is what that routine
is doing mostly functionality wise.

Cc: stable@dpdk.org

Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-29 18:16:07 +01:00
Lance Richardson
5b4279b50f net/bnxt: fix packet type index calculation
Fix mask to include all four bits of hardware packet type
field.

Fixes: 97b1db288d ("net/bnxt: use table based packet type translation")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-29 18:16:07 +01:00
Kalesh AP
51a7d36272 net/bnxt: fix FW version log
Driver is not logging the complete FW version along with HSI version.
Fix it to indicate complete FW version string.

Fixes: 9a891c1764 ("net/bnxt: update HWRM to version 1.9.2")
Cc: stable@dpdk.org

Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-01-29 18:16:07 +01:00
Michael Baum
bcf58b64da net/mlx4: fix handling of probing failure
In mlx4 PCI probing, there are some validations for the Ethernet device
configuration.
From each PCI device the function creates one or two Ethernet devices.

When one of validations fails during the creation of the second device,
the first device is not freed what caused a memory leak.

Free it.

Fixes: 7fae69eeff ("mlx4: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: David Marchand <david.marchand@redhat.com>
2021-01-29 18:16:07 +01:00
Michael Baum
8e1630e0f1 net/mlx4: fix device detach
When mlx4 device is probed, 2 different ethdev ports may be created for
the 2 physical ports of the device.

Wrongly, when the device is removed, the created ports are not released.

Close and release the ethdev ports in remove process.

Bugzilla ID: 488
Fixes: 7fae69eeff ("mlx4: new poll mode driver")
Cc: stable@dpdk.org

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Tested-by: David Marchand <david.marchand@redhat.com>
2021-01-29 18:16:07 +01:00
Dekel Peled
14ccfd2ed1 net/mlx5: fix flow split combined with age action
Currently, for a flow containing an age action, if flow is split to
sub-flows, a new age action will be created for each sub-flow.
However only the action created for the last sub-flow will be queried
on flow query and cleared on flow removal.

This behavior is wrong, causing a leak of resources.
Need to create just one action per flow, and use it for all sub-flows.

This patch adds the required check to make sure an age action is
created just once per flow, and used by all sub-flows.

Fixes: f935ed4b64 ("net/mlx5: support flow hit action for aging")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-29 18:16:07 +01:00
Dekel Peled
63f4d5693e net/mlx5: fix flow split combined with counter
Currently, for a flow containing a count action, if flow is split to
sub-flows, a new counter will be created for each sub-flow.
However only the counter created for the last sub-flow will be queried
on flow query and cleared on flow removal.

This behavior is wrong, causing a leak of resources.
Need to create just one counter per flow, and use it for all sub-flows.

This patch adds the required check to make sure a counter is
created just once per flow, and used by all sub-flows.

Fixes: fa2d01c87d ("net/mlx5: support flow aging")
Cc: stable@dpdk.org

Signed-off-by: Dekel Peled <dekelp@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-29 18:16:07 +01:00
Dong Zhou
5f8ae44dd4 net/mlx5: enlarge maximal flow priority
Currently, the maximal flow priority in non-root table to user
is 4, it's not enough for user to do some flow match by priority,
such as LPM, for one IPV4 address, we need 32 priorities for each
bit of 32 mask length.

PMD will manage 3 sub-priorities per user priority according to L2,
L3 and L4. The internal priority is 16 bits, user can use priorities
from 0 - 21843.

Those enlarged flow priorities are only used for ingress or egress
flow groups greater than 0 and for any transfer flow group.

Signed-off-by: Dong Zhou <dongzhou@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-01-29 18:16:07 +01:00
Jiawei Wang
07627fbf15 net/mlx5: support E-Switch mirroring with modify action
While there's the modify action and sample action with ratio=1
in the E-Switch flow, and modify action is after the sample
action, means that the modify should only impact on after sample.
MLX5 PMD will monitor the above case and split the E-Switch flow
into two sub flows, similar as sample flow did before:

 - the prefix sub flow with all actions preceding the sample and the
   sample action itself, also append the new jump action after sample
   in the prefix sub flow;
 - the suffix sub flow with the modify action and other actions
   following the sample action.

The flow split as below:

Original flow: items / actions pre / sample / modify / actions sfx
    prefix sub flow -
    items / actions pre / set_tag action / sample / jump
    suffix sub flow -
    tag_item / modify / actions sfx

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:07 +01:00
Jiawei Wang
ae2927cd26 net/mlx5: extend skip scale flag
The sampling feature introduces the scale flow group with factor,
then the scaled table value can be used for the normal path table
due to this table be created implicitly.

But if the input group value already be scaled, for example the
group value of sampling suffix flow, then use 'skip_scale" flag
to skip the scale twice in the translation action.

Consider the flow with jump action and this jump action could be
created implicitly, PMD may only scale the original flow group
value or scale the jump group value or both, so extend the
'skip_scale' flag to two bits:
If bit0 of 'skip_scale' flag is set to 1, then skip the scale the
original flow group;
If bit1 of 'skip_scale' flag is set to 1, then skip the scale the
jump flow group.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:07 +01:00
Jiawei Wang
6a951567c1 net/mlx5: support E-Switch mirroring and jump in one flow
mlx5 E-Switch mirroring is implemented as multiple destination array in
one steering table. The array currently supports only port ID as
destination actions.

This patch adds the jump action support to the array as one of
destination.
The packets can be mirrored to the port and jump to the next table in
the same destination array allowing to continue handling in the new
table.

For example:
    set sample_actions 0 port_id id 1 / end
    flow create 0 ingress transfer pattern eth / end actions
    sample ratio 1 index 0 / jump group 1 / end
    flow create 1 ingress transfer group 1 pattern eth / end actions
    set_mac_dst mac_addr 00:aa:bb:cc:dd:ee / port_id id 2 / end

The flow results all the matched ingress packets are mirrored
to port id 1 and go to group 1. In the group 1, packets are modified
with the destination mac and sent to port id 2.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:07 +01:00
Jiawei Wang
efa6a7e200 common/mlx5: query preserve capability via DevX
Update function mlx5_devx_cmd_query_hca_attr() to add the
reg_c_preserve bit query.

The stored metadata in register C may be lost in NIC Tx and
FDB egress while doing one of the following operations:
 - packet encapsulation.
 - packet mirroring (multiple processing paths).
 - packet sampling (using Flow Sampler).

If the reg_c_preserve bit is set to 1, then the above
limitation is obsolete, the all metadata registers Cx
preserve their values even through the operations mentioned
above.

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-29 18:16:07 +01:00
Qi Zhang
6ad938f326 net/ice: support E823C family devices
Add device ID support for family E823C, also update the base code
BSD version.

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Qi Zhang
14e7a4b37b net/ice/base: support configuring device in double VLAN mode
In order to support configuring the device in Double VLAN Mode (DVM),
the DDP and FW have to support DVM. If both support DVM, the PF
that downloads the package needs to update the default recipes and set
the VLAN mode. This is done in ice_set_dvm().

In order to support updating the default recipes in DVM add support
for updating an existing switch recipe's lkup_idx and mask.
This is done by first calling the get recipe AQ (0x0292) with the
desired recipe ID. Then, if that is successful update one of the lookup
indices (lkup_idx) and its associated mask if the mask is valid
otherwise the already existing mask will be used.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Qi Zhang
a6b975d23c net/ice/base: add VLAN TPID for VLAN filters
Currently VLAN filters via RID4 are only based on VLAN ID. However, with
incoming support for Double VLAN Mode (DVM), the driver needs to be able
to support filtering on VLAN ID + VLAN TPID (i.e. 0x8100, 0x88a8, etc.).
Add support for this by adding two fields to the ice_fltr_info
structure. First, add the tpid_valid field so the code can determine
whether or not to overwrite the default 0x8100 value for programming
packets or use the tpid field.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Qi Zhang
25aa214490 net/ice/base: fix outer VLAN related macro
Fix the wrong value of ICE_AQ_VSI_OUTER_VLAN_PORT_BASED_ACCEPT_HOST

Fixes: 9ea028123a ("net/ice/base: align add VSI and update VSI AQ command buffer")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2021-01-29 18:16:07 +01:00
Wenjun Wu
9f3c2398ae net/e1000: fix flow control mode setting
E1000_CTRL register should be updated according to fc_conf->mode's
value.

Fixes: af75078fec ("first public release")
Cc: stable@dpdk.org

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2021-01-29 18:16:07 +01:00
Yuying Zhang
72592ea624 doc: update release notes for iavf
Add iavf PMD new feature in release notes.

Fixes: 61abc5f611 ("net/iavf: support TCP/UDP flow item without input set")

Signed-off-by: Yuying Zhang <yuying.zhang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:07 +01:00
Haiyue Wang
d01faa340d net/iavf: align to new VLAN offload name
Since the VLAN offload virtchnl message name has been renamed to setting
style, the internal Ethernet type setting name needs be changed to avoid
confusing.

Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2021-01-29 18:16:07 +01:00
Haiyue Wang
6247f281e3 common/iavf: support VLAN filtering
In order to support enable/disable VLAN filtering the VF has to
negotiate the capability via VIRTCHNL_OP_GET_OFFLOAD_VLAN_V2. If
VIRTCHNL_VLAN_TOGGLE is allowed for the VLAN filtering capabilities,
then there needs to be a method to allow this. Make the necessary
changes to support this.

Also, since the virtchnl_vlan_offload message has the desired format,
change the structure name to virtchnl_vlan_setting so it can be used for
VIRTCHNL_OP_ENABLE_VLAN_FILTERING_V2 and
VIRTCHNL_OP_DISABLE_VLAN_FILTERING_V2.

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2021-01-29 18:16:07 +01:00
Jeff Guo
de429906dc net/ice: enable eCPRI tunnel port configure in DCF
Add eCPRI tunnel port add and rm ops to configure eCPRI UDP tunnel port
in "Device Config Function" (DCF).

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-01-29 18:16:07 +01:00
Jiawei Wang
2ce964954b app/testpmd: fix packets dump overlapping
When testpmd enabled the verbosity for the received packets, if two
packets were received at the same time, for example, sampling packet and
normal packet, the dump output of these packets may be overlapping due
to multiple core handling the multiple queues simultaneously.

The patch uses one string buffer that collects all the packet dump
output into this buffer and then printouts it at last, that guarantees
to printout separately the dump output per packet.

Fixes: d862c45b59 ("app/testpmd: move dumping packets to a separate function")
Cc: stable@dpdk.org

Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-01-29 18:16:07 +01:00
Bruce Richardson
b38480dc4e devtools: remove check-includes script
The check-includes script allowed checking header files in a given
directory to ensure that each header compiled alone without requiring
any other header inclusions.

With header checking now being done by the chkincs app in the build
system this script can be removed.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:37 +01:00
Bruce Richardson
727414e20e ci: enable header includes check
For CI builds, turn on the checking of includes.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Aaron Conole <aconole@redhat.com>
2021-01-29 20:59:37 +01:00
Bruce Richardson
05050ac4ce build: add header includes check
To verify that all DPDK headers are ok for inclusion directly in a C file,
and are not missing any other pre-requisite headers, we can auto-generate
for each header an empty C file that includes that header. Compiling these
files will throw errors if any header has unmet dependencies.

For some libraries, there may be some header files which are not for direct
inclusion, but rather are to be included via other header files. To allow
later checking of these files for missing includes, we separate out the
indirect include files from the direct ones.

To ensure ongoing compliance, we enable this build test as part of the
default x86 build in "test-meson-builds.sh".

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:37 +01:00
Bruce Richardson
2518704288 eventdev: make driver-only headers private
The rte_eventdev_pmd*.h files are for drivers only and should be private
to DPDK, and not installed for app use.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
df96fd0d73 ethdev: make driver-only headers private
The rte_ethdev_driver.h, rte_ethdev_vdev.h and rte_ethdev_pci.h files are
for drivers only and should be a private to DPDK and not installed.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Steven Webster <steven.webster@windriver.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
5d1a53130a rib: fix missing header include
The rte_rib6 header was using RTE_MIN macro from rte_common.h but not
including the header file.

Fixes: f7e861e21c ("rib: support IPv6")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Vladimir Medvedkin <vladimir.medvedkin@intel.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
deb6ea1d2d power: fix missing header includes
The rte_power_guest_channel.h file did not include its dependent
headers, so add them.

Fixes: 5f443cc0f9 ("power: create guest channel public header file")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
4ab63cd60c eal: fix internal ABI tag with clang
Clang does not have an "error" attribute for functions, so for marking
internal functions we need to check for the error attribute, and provide
a fallback if it is not present. For clang, we can use "diagnose_if"
attribute, similarly checking for its presence before use.

Fixes: fba5af82ad ("eal: add internal ABI tag definition")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2021-01-29 20:59:09 +01:00
Bruce Richardson
3c2cca6a0d eal: fix MCS lock header include
Include 'rte_branch_prediction.h' to get the likely/unlikely macro
definitions.

Fixes: 2173f3333b ("mcslock: add MCS queued lock implementation")
Cc: stable@dpdk.org

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2021-01-29 20:59:09 +01:00
Gagandeep Singh
9a494a3b90 crypto/dpaa2_sec: fix memory allocation check
When key length is 0, zmalloc will return NULL pointer
and in that case it should not return NOMEM.
So in this patch, adding a check on key length.

Fixes: 8d1f3a5d75 ("crypto/dpaa2_sec: support crypto operation")
Cc: stable@dpdk.org

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2021-01-27 20:58:14 +01:00
Gagandeep Singh
8dda080a09 test/ipsec: fix result code for not supported
During SA creation, if the required algorithm is not supported,
drivers can return ENOTSUP. But in most of the IPsec test cases,
if the SA creation does not success, it just returns
TEST_FAILED.

This patch fixes this issue by returning the actual return values
from the driver to the application, so that it can make decisions
whether the test case is passed, failed or unsupported.

Fixes: 05fe65eb66 ("test/ipsec: introduce functional test")
Cc: stable@dpdk.org

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2021-01-27 20:58:14 +01:00
Matan Azrad
384bac8d65 compress/mlx5: add supported capabilities
Add all the capabilities supported by the device.

Add the driver documentations.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-27 20:40:03 +01:00
Matan Azrad
37862dafcb compress/mlx5: support 32-bit systems
In order to support 32-bit systems, the 8B doorbell write should be
done by 2 4B stores.

The order between the store is important, that's why memory barrier
should be used between them.

The doorbell address is shared between all the queues, that's why a lock
should wrap the 2 stores.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-27 20:40:03 +01:00
Matan Azrad
ccfd891a50 compress/mlx5: add statistics operations
Add support for the next statistics operations:
	- stats_get
	- stats_reset

These statistics are counted by the SW data-path.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-27 20:40:03 +01:00
Matan Azrad
f8c97babc9 compress/mlx5: add data-path functions
Add implementation for the next compress data-path functions:
	- dequeue_burst
	- enqueue_burst

Add the next operation for starting \ stopping data-path:
	- dev_stop
	- dev_close

Each compress API enqueued operation is translated to a WQE.
Once WQE is done, the HW sends CQE to the CQ, when SW see the CQE the
operation will be updated and dequeued.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-27 20:40:03 +01:00
Matan Azrad
0165bccdb4 compress/mlx5: add memory region management
Mellanox user space drivers don't deal with physical addresses, that's
why any mbuf virtual address moved directly to the HW descriptor(WQE).

The mapping between the virtual address to the physical address is saved
in MR configured by the kernel to the HW.

Each MR has a key that should also be moved to the WQE by the SW.

When the SW see address which is not mapped, it extends the address
range and creates a MR using a system call.

Add memory region cache management:
	- 2 level cache per queue-pair - no locks.
	- 1 shared cache between all the queues using a lock.

Using this way, the MR key search per data-path address is optimized.

Signed-off-by: Matan Azrad <matan@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-01-27 20:40:03 +01:00