Commit Graph

20200 Commits

Author SHA1 Message Date
Suanming Mou
46a5e6bc6a net/mlx5: prepare meter flow tables
This commit prepare the meter table and suffix table.

A flow with meter will be split to three flows. The three flows are
created on differnet tables. The packets transfer between the flows
on the tables as below:

Prefix flow -> Meter flow -> Suffix flow

Prefix flow does the user defined match and the meter action. The meter
action colors the packet and set its destination to meter table to be
processed by the meter flow.
The meter flow judges if the packet can be passed or not. If packet can
be passed, it will be transferred to the suffix table.
The suffix flow on the suffix table will apply the left user defined
actions to the packet.

The ingress egress and transfer all have the independent meter and
suffix tables.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
e0583a52b2 net/mlx5: validate meter profile
The add meter profile should be validated if it is valid or has been add
to the list. Invalid and exist profile should not be add to the list.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
3bd26b23ce net/mlx5: support meter profile operations
This commit add the support of meter profile add and delete operations.

New internal functions in rte_mtr_ops callback:
1. meter_profile_add()
2. meter_profile_delete()

Only RTE_MTR_SRTCM_RFC2697 algorithm is supported and can be added. To
add other algorithm will report an error.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
27efd5dead net/mlx5: allocate flow meter registers
Meter need the metadata REG_C to have the color match between the prefix
flow and the meter flow.

As the user define or metadata feature will both use the REG_C in the
suffix flow, the color match register meter uses will not impact the
register use in the later sub flow.

Another case is that tag is add before meter flow. In this case, meter
should not touch the register the tag action is using. To avoid that
case, meter should reserve the REG_C's used by user defined MLX5_APP_TAG.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
6bc327b94f net/mlx5: fill meter capabilities using DevX
This commit add the support of fill and get the meter capabilities
from DevX.

Support items:
1. The srTCM color bind mode.
2. Meter share with multiple flows.
3. Action drop.

The color aware mode and multiple meter chaining in a flow are not
supported.

New internal function in rte_mtr_ops callback:
1. capabilities_get()

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Suanming Mou
d740eb5018 net/mlx5: add meter operation callback
Add the new mlx5_flow_meter.c file for metering support.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Dekel Peled
304ffe576f net/mlx5: fix condition to create default rule
Previous patch added creation of a default flow rule on port start.
Rule is created under the condition that device is in eswitch mode,
and is not a VF, to make sure rule is created only once.
In Bluefield, where PF representor is used, this condition is not
sufficient. Rule is created twice, causing loss of traffic.

This patch updates this condition, adding check that device is also
not a representor.

Fixes: b67b4ecbde ("net/mlx5: skip table zero to improve insertion rate")

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 14:23:02 +01:00
Dekel Peled
f78f747f41 net/mlx5: allow jump to group lower than current
In current implementation, jump action is allowed only if target
group is higher than the current flow group,

This patch updates function flow_dv_validate_action_jump() to allow
jump action if target group is higher or lower than the current flow
group.
Target group equal to current flow group is still rejected.

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
dd3c774f6f net/mlx5: add metadata register copy table
While reg_c[meta] can be copied to reg_b simply by modify-header
action (it is supported by hardware), it is not possible to copy
reg_c[mark] to the STE flow_tag as flow_tag is not a metadata
register and this is not supported by hardware. Instead, it
should be manually set by a flow per each unique MARK ID. For
this purpose, there should be a dedicated flow table -
RX_CP_TBL and all the Rx flow should pass by the table
to properly copy values from the register to flow tag field.

And for each MARK action, a copy flow should be added
to RX_CP_TBL according to the MARK ID like:
  (if reg_c[mark] == mark_id),
    flow_tag := mark_id / reg_b := reg_c[meta] / jump to RX_ACT_TBL

For SET_META action, there can be only one default flow like:
  reg_b := reg_c[meta] / jump to RX_ACT_TBL

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
71e254bc02 net/mlx5: split Rx flows to provide metadata copy
Values set by MARK and SET_META actions should be carried over
to the VF representor in case of flow miss on Tx path. However,
as not all metadata registers are preserved across the different
domains (NIC Rx/Tx and E-Switch FDB), as a workaround, those
values should be carried by reg_c's which are preserved across
domains and copied to STE flow_tag (MARK) and reg_b (META) fields
in the last stage of flow steering, in order to scatter those
values to flow_tag and flow_table_metadata of CQE.

While reg_c[meta] can be copied to reg_b simply by modify-header
action (it is supported by hardware), it is not possible to copy
reg_c[mark] to the STE flow_tag as flow_tag is not a metadata
register and this is not supported by hardware. Instead, it should
be manually set by a flow per MARK ID. For this purpose, there
should be a dedicated flow table - RX_CP_TBL and all the Rx flow
should pass by the table to properly copy values.

As the last action of Rx flow steering must be a terminal action
such as QUEUE, RSS or DROP, if a user flow has Q/RSS action, the
flow must be split in order to pass by the RX_CP_TBL. And the
remained Q/RSS action will be performed by another dedicated
action table - RX_ACT_TBL.

For example, for an ingress flow:
    pattern,
    actions_having_QRSS
it must be split into two flows. The first one is,
    pattern,
    actions_except_QRSS / copy (reg_c[2] := flow_id) / jump to RX_CP_TBL
and the second one in RX_ACT_TBL.
    (if reg_c[2] == flow_id),
    action_QRSS
where flow_id is uniquely allocated and managed identifier.

This patch implements the Rx flow splitting and build the RX_ACT_TBL.
Also, per each egress flow on NIC Tx, a copy action (reg_c[]= reg_a)
should be added in order to transfer metadata from WQE.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
59c5779daf net/mlx5: introduce flow splitters chain
The mlx5 hardware has some limitations and flow might
require to be split into multiple internal subflows.
For example this is needed to provide the meter object
sharing between multiple flows or to provide metadata
register copying before final queue/rss action.

The multiple features might require several level of
splitting. For example, hairpin feature splits the
original flow into two ones - rx and tx parts. Then
RSS feature should split rx part into multiple subflows
with extended item sets. Then, metering feature might
require splitting each RSS subflow into meter jump
chain, and then metadata extensive support might
require the final subflows splitting. So, we have
to organize the chain of splitting subroutines to
abstract each level of splitting.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
a18ac61133 net/mlx5: add metadata support to Rx datapath
This patch moves metadata from completion descriptor
to appropriate dynamic mbuf field.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
fcc8d2f716 net/mlx5: extend flow metadata support
META item is supported on both Rx and Tx. 'transfer' attribute
is also supported. SET_META action is also added.

Due to restriction on reg_c[meta], various bit width might be
available. If devarg parameter dv_xmeta_en=1, the META uses
metadata register reg_c[0], which may be required for internal
kernel or firmware needs. In this case PMD queries kernel about
available fields in reg_c[0] and restricts the register usage
accordingly. If devarg parameter dv_xmeta_en=2, the META feature
uses reg_c[1], there should be no limitations on the data width.

However, extensive MEAT feature is currently disabled until
register copy on loopback is supported by forthcoming patches.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
55deee1715 net/mlx5: extend flow mark support
Flow MARK item is newly supported along with MARK action. MARK
action and item are supported on both Rx and Tx. It works on the
metadata reg_c[] only if extensive flow metadata register is
supported. Without the support, MARK action behaves same as
before - valid only on Rx and no MARK item is valid.

FLAG action is also modified accordingly. FLAG action is
supported on both Rx and Tx via reg_c[] if extensive flow
metadata register is supported.

However, the new MARK/FLAG item and action are currently
disabled until register copy on loopback is supported by
forthcoming patches.

The actual index of engaged metadata reg_c[] register to
support FLAG/MARK actions depends on dv_xmeta_en devarg value.

For extensive metadata mode 1 the reg_c[1] is used and
transitive MARK data width is 24. For extensive metadata mode 2
the reg_c[0] is used and transitive MARK data width might be
restricted to 0 or 16 bits, depending on kernel usage of reg_c[0].
The actual supported width can be discovered by series of trials
with rte_flow_validate().

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
e554b672aa net/mlx5: support flow tag
Add support of new rte_flow item and action - TAG and SET_TAG. TAG is
a transient value which can be kept during flow matching.

This is supported through device metadata register reg_c[]. Although
there are 8 registers are available on the current mlx5 device,
some of them can be reserved for firmware or kernel purposes.
The availability should be queried by iterative trial-and-error
mlx5_flow_discover_mreg_c() routine.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
3e8edd0ef8 net/mlx5: update metadata register ID query
The NIC might support up to 8 extensive metadata registers.
These registers are supposed to be used by multiple features.
There is register id query routine to allow determine which
register is actually used by specified feature.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
0e9d000276 net/mlx5: check maximum modify actions number
If the extensive metadata registers are supported,
it can be regarded inclusively that the extensive
metadata support is possible. E.g. metadata register
copy action, supporting 16 modify header actions,
reserving register across different steering domain
(FDB and NIC) and so on.

This patch handles the maximal amount of header modify
actions depending on discovered metadata registers
support.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
3913937151 net/mlx5: adjust shared register according to mask
The metadata register reg_c[0] might be used by kernel or
firmware for their internal purposes. The actual used mask
can be queried from the kernel. The remaining bits can be
used by PMD to provide META or MARK feature. The code queries
the mask of reg_c[0] and adjust the resource usage dynamically.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
2d241515eb net/mlx5: add devarg for extensive metadata support
The PMD parameter dv_xmeta_en is added to control extensive
metadata support. A nonzero value enables extensive flow
metadata support if device is capable and driver supports it.
This can enable extensive support of MARK and META item of
rte_flow. The newly introduced SET_TAG and SET_META actions
do not depend on dv_xmeta_en parameter, because there is
no compatibility issue for new entities. The dv_xmeta_en is
disabled by default.

There are some possible configurations, depending on parameter
value:

- 0, this is default value, defines the legacy mode, the MARK
  and META related actions and items operate only within NIC Tx
  and NIC Rx steering domains, no MARK and META information
  crosses the domain boundaries. The MARK item is 24 bits wide,
  the META item is 32 bits wide.

- 1, this engages extensive metadata mode, the MARK and META
  related actions and items operate within all supported steering
  domains, including FDB, MARK and META information may cross
  the domain boundaries. The ``MARK`` item is 24 bits wide, the
  META item width depends on kernel and firmware configurations
  and might be 0, 16 or 32 bits. Within NIC Tx domain META data
  width is 32 bits for compatibility, the actual width of data
  transferred to the FDB domain depends on kernel configuration
  and may be vary. The actual supported width can be retrieved
  in runtime by series of rte_flow_validate() trials.

- 2, this engages extensive metadata mode, the MARK and META
  related actions and items operate within all supported steering
  domains, including FDB, MARK and META information may cross
  the domain boundaries. The META item is 32 bits wide, the MARK
  item width depends on kernel and firmware configurations and
  might be 0, 16 or 24 bits. The actual supported width can be
  retrieved in runtime by series of rte_flow_validate() trials.

If there is no E-Switch configuration the ``dv_xmeta_en`` parameter is
ignored and the device is configured to operate in legacy mode (0).

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:02 +01:00
Viacheslav Ovsiienko
5e61bcdd24 net/mlx5: check metadata registers availability
The metadata registers reg_c provide support for TAG and
SET_TAG features. Although there are 8 registers are available
on the current mlx5 devices, some of them can be reserved.
The availability should be queried by iterative trial-and-error
implemented by mlx5_flow_discover_mreg_c() routine.

If reg_c is available, it can be regarded inclusively that
the extensive metadata support is possible. E.g. metadata
register copy action, supporting 16 modify header actions
(instead of 8 by default) preserving register across
different domains (FDB and NIC) and so on.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Viacheslav Ovsiienko
e2bb15f761 net/mlx5: rename structure and function
There are some renaming:
- in the DV flow engine overall: flow_d_* -> flow_dv_*
- in flow_dv_translate(): res -> mhdr_res

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Viacheslav Ovsiienko
acfcd5c52f net/mlx5: update meta register matcher set
Introduce the dedicated matcher register field setup routine.
Update the code to use this unified one.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Viacheslav Ovsiienko
123e69b025 net/mlx5: update flow functions
Update flow creation/destroy functions for future reuse.
List operations can be skipped inside functions and done
separately out of flow creation.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Viacheslav Ovsiienko
e205c95f74 net/mlx5: refactor flow structure
Some rte_flow fields which are local to subflows have been moved to
mlx5_flow structure. RSS attributes are grouped by mlx5_flow_rss structure.
tag_resource is moved to mlx5_flow_dv structure.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Viacheslav Ovsiienko
baf516be3c net/mlx5: add metadata register copy
Add flow metadata register copy action which is supported through modify
header command. As it is an internal action, not exposed to users, item
type (MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG) is negative value. This can be
used when creating PMD internal subflows.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Viacheslav Ovsiienko
9597330c68 net/mlx5: update modify header action translator
When composing device command for modify header action, provided mask
should be taken more accurate into account thus length and offset
in action should be set accordingly at precise bit-wise boundaries.

For the future use, metadata register copy action is also added.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Viacheslav Ovsiienko
cff811c724 net/mlx5: convert internal tag endianness
Public API RTE_FLOW_ACTION_TYPE_TAG and RTE_FLOW_ITEM_TYPE_TAG
present data in host-endian format, as all metadata related
entities. The internal mlx5 tag related action and item should
use the same endianness to be conformed.

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2019-11-11 14:23:01 +01:00
Bing Zhao
46287eacc1 net/mlx5: introduce hash list
Introduce simple hash list to the mlx5 utilities. User can define
its own data structure containing the mlx5_hlist_entry and create
the hash list table via the creation interface. Then the entry will
be inserted into the table and linked to the corresponding list
head. User should guarantee there is no collision of the key and
provide a callback function to handle all the remaining entries in
the table when destroying the hash list. User should define a proper
number of the list heads in the table in order to get a better
performance. The LSB of the 'key' is used to calculate the index of
the head in the list heads array.
This implementation is not multi-threads safe right now.

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-11 14:23:01 +01:00
Ori Kam
1c69df45f8 app/testpmd: support hairpin
This commit introduce the hairpin queues to the testpmd.
the hairpin queue is configured using --hairpinq=<n>
the hairpin queue adds n queue objects for both the total number
of TX queues and RX queues.
The connection between the queues are 1 to 1, first Rx hairpin queue
will be connected to the first Tx hairpin queue

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2019-11-08 23:15:05 +01:00
Ivan Malov
653b285ff1 net/sfc: fix adapter lock usage on rule creation
The point is that adapter lock has to be held on
list accesses, as well as when talking to the HW.

Fixes: a9825ccf5b ("net/sfc: support flow API filters")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2019-11-08 23:15:05 +01:00
Hyong Youb Kim
8bac78f826 net/enic: re-enable link status change interrupt
When INTx is used, the interrupt handler needs to explicitly re-enable
interrupt in order to receive another one in future. The LSC interrupt
handler currently does not, and the link state never gets updated when
INTx is used (e.g. uio_pci_generic). Call rte_intr_ack() at the end of
the handler, to re-enable INTx.

Fixes: fefed3d1e6 ("enic: new driver")
Cc: stable@dpdk.org

Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
2019-11-08 23:15:05 +01:00
Xiaoyu Min
fc2dd8dd49 ethdev: fix expand RSS flows
rte_flow_expand_rss expands rte_flow item list based on the RSS
types. In another word, some additional rules are added if the user
specified items are not complete enough according to the RSS type,
for example:

  ... pattern eth / end actions rss type tcp end ...

User only provides item eth but want to do RSS on tcp traffic.
The pattern is not complete enough to filter TCP traffic only.
This will be a problem for some HWs.
So some PMDs use rte_flow_expand_rss to expand above user provided
flow to:

  ... pattern eth / end actions rss types tcp
  ... pattern eth / ipv4 / tcp / end actions rss types tcp ...
  ... pattern eth / ipv6 / tcp / end actions rss types tcp ...

in order to filter TCP traffic only and do RSS correctly.

However the current expansion cannot handle pattern as below, which
provides ethertype or ip next proto instead of providing an item:

  ... pattern eth type is 0x86DD / end actions rss types tcp ...

rte_flow_expand_rss will expand above flow to:

  ... pattern eth type is 0x86DD / ipv4 / tcp end ...

which has conflicting values: 0x86DD vs. ipv4 and some HWs will refuse
to create flow.

This patch will fix above by checking the last item's spec and to
expand RSS flows correctly.

Currently only support to complete item list based on ether type or ip
next proto.

Fixes: 4ed05fcd44 ("ethdev: add flow API to expand RSS flows")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2019-11-08 23:15:05 +01:00
Hemant Agrawal
7a75cc615a net/sfc: add SPDX tag in meson file
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
2019-11-08 23:15:05 +01:00
Wisam Jaddo
80be07001e net/mlx5: add missing packet type for GENEVE
HW ptype are missing TUNNEL_GENEVE support

Fixes: e59a5dbcfd ("net/mlx5: add flow match on GENEVE item")

Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-08 23:15:05 +01:00
Xiaoyu Min
0be2fba2f0 net/mlx5: allow pattern start from IP
Some applications, i.e. OVS, have rule like:

[1] pattern ipv4 / end actions ...

which intends to match ipv4 only on non-vlan ethernet and MLX5 NIC
supports this.

So PMD should accept this.

Fixes: 906a2efae8 ("net/mlx5: validate flow rule item order")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-08 23:15:05 +01:00
Xiaoyu Min
fba3213015 net/mlx5: improve flow item IP validation
Currently PMD doesn't check whether the user specified ethernet type is
conflicting with the followed IPv4/IPv6 items, which leads to HW refuse
to create rule, for example:

  ... pattern eth type is 0x86dd / ipv4 / end ...

ethernet type is IPv6 but IPv4 is following, this should be validated
as failure and report corresponding error in detail.

Fixes: 23c1d42c71 ("net/mlx5: split flow validation to dedicated function")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2019-11-08 23:15:05 +01:00
Raslan Darawsheh
5fc66630be net/mlx5: add ConnectX6-DX device ID
This adds new device id to the list of Mellanox devices
that runs mlx5 PMD.
	- ConnectX-6DX device ID
	- ConnectX-6DX SRIOV device ID

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2019-11-08 23:15:05 +01:00
Yahui Cao
228df3edb1 net/ice: fix flow director tunnel profile existence check
If first rule is issued and then the second rule is issued with the same
input set as first rule's, FDIR driver can't find there is an identical
input set.

Fixes: 109e8e0624 ("net/ice: configure HW flow director rule")

Signed-off-by: Yahui Cao <yahui.cao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-11-08 23:15:05 +01:00
Qi Zhang
14c4647517 net/ice/base: add new device IDs
Add device IDs for E810_XXV.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-11-08 23:15:05 +01:00
Subrahmanyam Nilla
c261680cdb net/octeontx2: support SDP interface
System DPI Packet Interface Unit (SDP) is a co-processor
of OCTEON TX2 which provides PCIe endpoint support for a
remote host to DMA packets into and out of the OCTEON TX2 SoC.
SDP interface comes in to live only when it is connected in
EP mode. It exposes input and output queue pairs to remote host
for instruction input and packet output. It can be used as
a communication channel between remote host and OCTEON TX2.
Host machine needs to use corresponding user/kernel mode
driver to communicate with SDP interface on OCTEON TX2 SoC.

SDP interface support is limited to SDP PF device now.
No SDP VF support.

Signed-off-by: Subrahmanyam Nilla <snilla@marvell.com>
Signed-off-by: Venkateshwarlu Nalla <venkatn@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-11-08 23:15:05 +01:00
Marvin Liu
aa74c383d4 vhost: fix batch enqueue only handle few packets
After enqueue function finished, packet index has been increased. Batch
enqueue function should retrieve mbuf structure pointed by that index.

Fixes: 0294211bb6 ("vhost: optimize packed ring enqueue")

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-11-08 23:15:05 +01:00
Marvin Liu
4da3dd4885 vhost: fix dirty page logging missing
Packets data are directly copied when doing batch enqueue, add missed
dirty page logging after memory copy.

Fixes: ef861692c3 ("vhost: add packed ring batch enqueue")

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-11-08 23:15:05 +01:00
Marvin Liu
a76552d48f net/virtio-user: fix setting filters
As doc mentioned, Rx/Mac/vlan filters are all supported by best effort.
These control commands should return success.

Fixes: f9b9d1a557 ("net/virtio-user: add multiple queues in device emulation")
Cc: stable@dpdk.org

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-11-08 23:15:05 +01:00
Marvin Liu
bc42ca1787 vhost: fix virtqueue not accessible
Log feature is disabled in vhost user, so that log address was invalid
when checking. Check whether log address is valid can work around it.
Log address should also be translated in packed ring virtqueue.

Fixes: fbda9f1459 ("vhost: translate incoming log address to GPA")
Cc: stable@dpdk.org

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Adrian Moreno <amorenoz@redhat.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-11-08 23:15:05 +01:00
Jin Yu
201e748267 vhost: fix build dependency on hash lib
Compile librte_vhost/vhost_crypto.c needs the rte_hash.h
So we need the librte_hash to be compiled before vhost.
Add the DEPDIRs to make sure this.

Bugzilla ID: 356
Fixes: 939066d965 ("vhost/crypto: add public function implementation")
Cc: stable@dpdk.org

Signed-off-by: Jin Yu <jin.yu@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-11-08 23:15:05 +01:00
Marvin Liu
3939255eed vhost: do not limit packed ring size
Virtio spec only set rule that packed ring maximum size is up to 2^15
entries. Should not limit packed ring size to power of two.

Fixes: 708e14d8b9 ("vhost: advertize packed ring layout support")
Cc: stable@dpdk.org

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-11-08 23:15:05 +01:00
Marvin Liu
df42dde55b net/virtio: do not limit packed ring size
Virtio spec only set rule that packed ring maximum size is up to 2^15
entries. Should not limit packed ring size to power of two.

Fixes: aea29aa5d3 ("net/virtio: enable packed virtqueues by default")
Cc: stable@dpdk.org

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Tiwei Bie <tiwei.bie@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2019-11-08 23:15:05 +01:00
Xiaoyun Wang
56345ccb44 doc: remove unsupported feature from hinic
This patch removes feature "Free Tx mbuf" on demand from hinic.ini
because pmd driver does not support this feature.

Fixes: 1d09792a27 ("net/hinic: add build and doc files")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
2019-11-08 23:15:05 +01:00
Xiaoyun Wang
5fc7bf4c59 doc: remove flow director feature from hinic
This patch removes deprecated feature Flow Director from hinic.ini,
hinic.rst and release_19_11.rst, because the feature has been
removed from the feature list in the following commit:
Commit 030febb664 ("doc: remove deprecated ethdev features"), and
adds Flow API feature which is for generic filtering to doc files.

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
2019-11-08 23:15:05 +01:00
Xiaoyun Wang
abd41e3d00 net/hinic: optimize mbuf allocation
When port start, driver needs to alloc mbuf resource to fill Rx
queue bd section, replace rte_mbuf_raw_alloc function to
rte_pktmbuf_alloc_bulk with initialized mbuf structure to avoid
some structures being used without initialization.

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
2019-11-08 23:15:05 +01:00