The patch enables rx interrupt support on i40e VF and some necessary
change on PF IOV mode to support VF.
On PF side, running in IOV mode via uio won't allow rx interrupt
which is exclusive with mbox interrupt in single vector competition.
On VF side, one single vector is shared for all the rx queues.
Signed-off-by: Cunming Liang <cunming.liang@intel.com>
The patch enables rx interrupt support on i40e PF non-IOV mode.
Per queue rx interrupt works on vfio, however on uio, all rx queues
share one interrupt vector.
Signed-off-by: Cunming Liang <cunming.liang@intel.com>
The old statistics on i40e only counted the packets on ports.
So the discarding packets on VSI were not counted.
This patch is to make statistics for packets both on ports and VSI.
Also update release notes.
Signed-off-by: Xutao Sun <xutao.sun@intel.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
By default, only first 3 bytes of GRE key will be used for hash or
FD calculation. With these changes, it can select 3 or 4 bytes of
GRE key for hash or FD calculation.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Signed-off-by: Andrey Chilikin <andrey.chilikin@intel.com>
The default input set of fields of a received packet are loaded from
firmware, which cannot be modified even users want to use different
fields for RSS or flow director. Here adds more flexibilities of
selecting packet fields for hash calculation or flow director for
users.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Signed-off-by: Andrey Chilikin <andrey.chilikin@intel.com>
It enlarges the number of supported queues to hardware allowed
maximum. There was a software limitation of 64 per physical port
which is not reasonable.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
It adjusts the number of queues for RSS from power of 2 to any as
long as it does not exceeds the hardware allowed.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Use new function rte_eth_copy_pci_info.
Copy device info for the following pdevs:
bnx2x
cxgbe
e1000
enic
fm10k
i40e
ixgbe
mlx4
mlx5
virtio
vmxnet3
Signed-off-by: Bernard Iremonger <bernard.iremonger@intel.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
It supports both Admin queue based and directly writing registers
based RSS hash key and lookup table configuration, as X722 supports
AQ based configuration.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
It supports both Admin queue based and directly writing registers
based RSS hash key and lookup table configuration, as X722 supports
AQ based configuration.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
In order to provide users early access of X722 and its A0 hardware,
new device IDs are added, and also compilation with those support
in base driver is enabled.
Signed-off-by: Helin Zhang <helin.zhang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Add implementation of xstats() functions in i40evf PMD.
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Maryam Tahhan <maryam.tahhan@intel.com>
Add xstats functions to i40e PMD, allowing extended statistics
to be retrieved from the NIC and exposed to the DPDK.
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
Acked-by: Maryam Tahhan <maryam.tahhan@intel.com>
According to XL710 datasheet:
RX QLEN restrictions: When the PXE_MODE flag in the GLLAN_RCTL_0
register is cleared, the QLEN must be whole number of 32
descriptors.
TX QLEN restrictions: When the PXE_MODE flag in the GLLAN_RCTL_0
register is cleared, the QLEN must be whole number of 32
descriptors.
So make sure that for both RX and TX queues number of HW descriptors is
a multiple of 32.
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Remy Horton <remy.horton@intel.com>
This patch adds one new API to get dcb related info.
rte_eth_dev_get_dcb_info
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Jijiang Liu <jijiang.liu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch enables DCB feature on Intel XL710/X710 NICs. It includes:
Receive queue classification based on traffic class
Round Robin ETS schedule (rx and tx)
Priority flow control
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Jijiang Liu <jijiang.liu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
To support FVL PMD can select which RX and TX function should be used
according to the queue config.
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Cunming Liang <cunming.liang@intel.com>
To support the multiple segments in one packets when the received pkts exceed
one buffer size.
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Cunming Liang <cunming.liang@intel.com>
The way to increase the performance of the vPMD TX is to use some fast mbuf
release method compares to the scalar TX.
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Cunming Liang <cunming.liang@intel.com>
The vPMD RX function uses the multi-buffer and SSE instructions to
accelerate the RX speed, but now the pktype cannot be supported by the vPMD RX,
because it will decrease the performance heavily.
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Cunming Liang <cunming.liang@intel.com>
Feature Add: Rx/Tx flow control support for the i40e
All the Rx/Tx LFC enable/disable operation is done by the F/W,
so PMD driver need to use the Set PHY Config AD command to trigger the PHY
to do the auto-negotiation, after the Tx/Rx pause ability is negotiated,
the F/W will help us to set the related LFC enable/disable registers.
PMD driver also need to configure the related registers to control
how often to send the pause frame and what the value in the pause frame.
Signed-off-by: Zhe Tao <zhe.tao@intel.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
If DPDK is used on VF while the host is using Linux Kernel driver
as PF driver on FVL NIC, then VF Rx is reported only in batches of
4 packets. It is due to the kernel driver assumes VF driver is working
in interrupt mode, but DPDK VF is working in Polling mode.
This patch fixes this issue by using the V1.1 virtual channel with
Linux i40e PF driver.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Cunming Liang <cunming.liang@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
This patch adds a workaround to drop flow control frames from being
transmitted from VSIs.
With this patch in place a malicious VF cannot send flow control or PFC
packets out on the wire.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Fixes a minor definition change in the Rx descriptor.
Also adds FortPark specific changes to the Descriptors.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
Adds support to retrieve and parse WoL/Proxy capabilities from the
device/function list.
Also saves WR_CSR_PROT field from DEV/FUNC capabilities.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
Adds admin q function for "Set Wake on LAN Filter AQ"
and "Get Wake Up Reason AQ".
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
Add AQ functions to handle RSS Key and LUT programming.
This is needed for FortPark RSS support.
FortPark has additional PCTYPES supported for RSS
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
This patch adds registers and bit field definitions specific to FortPark.
Most of these new registers are related to PE (IWARP), Reset, NVM, RSS
and ATR changes.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
This is to allow quick check for FCoE capability is enabled or not
in device function before any SW overrides.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
The i40e_add_pd_table_entry() routine is being modified to handle both
cases where a backing page is passed and where backing page is allocated
in i40e_add_pd_table_entry().
For pble resource management, it is more efficient for it to manage its
backing pages. For VF, pble backing page addresses will be send to PF
driver for pble resource.
The i40e_remove_pd_bp() is also modified to not free pre-allocated pages and
free only ones which were allocated in i40e_add_pd_table_entry().
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
The firmware has added additional status information to allow software
to determine if the APP priority for FCoE/iSCSI/FIP is valid or not in
CEE DCBX mode.
This patch adds to support those additional checks and will only add
applications to the software table that have oper and sync bits set
without any error.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
In order to support some extra Solaris features the Solaris VF drivers need
additional configuration data from the PF that aren't provided with the current
virtual channel commands.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
The struct i40e_aqc_get_cee_dcb_cfg_v1_resp was originally defined with
word boundary layout issues, which most compilers deal with by silently
adding padding, making the actual struct larger than designed.
This patch adds an extra byte in fields reserved3 and reserved4 to directly
acknowledge that padding.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
The assignments of addr_high and addr_low were not only wrong because
they were assigning virtual addresses to a hardware accessed variable,
but they were shortly thereafter overwritten by the send_asq_command
call with a non-NULL third argument (buffer) with correctly formatted
data.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
Use INLINE macro for better cross-platform code management.
Clean up some unnecessary logic jumping and drop a variable.
There was one more __FUNCTION__ reference that wasn't needed.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
Add the new Port link status bit and rename the link status to function
link status.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
The change is to explicitly assign enum index for each VSI type
so that PF and VF always reference to the same VSI type even if the
enum lists are different.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
This will help us avoid a whole bunch of log messages when the driver
is running.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
The Flex10 device/function capability has been upgraded to revision 2
to include information needed to support Flex-10 DCC and DCI
configurations. This patch adds new fields to the i40e_hw_capabilities
structure and updates i40e_parse_discover_capabilities functions to
extract them from the AQ response. Naming convention has changed to use
flex10 mode instead of existing mfp_mode_1.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
This patch adds capability to query and store the CEE DCBX DesiredCfg
and RemoteCfg data from the LLDP MIB.
Added new member "desired_dcbx_config" in the i40e_hw data structure
to hold CEE only DesiredCfg data.
Store the CEE TLV status returned by firmware to allow drivers to dump that
for debug purposes.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
Remove unused members in the PHY structure and add a new member to store
all the capabilities the PHY has as reported by the FW. This information will
help us determine what speeds the device is capable of when link is
down.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
This patch prepares the LLDP MIB in IEEE TLV format based on
the local dcb config.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
This patch adds parsing for CEE DCBX TLVs from the LLDP MIB.
While the driver gets the DCB CEE operational configuration from Firmware
using the "Get CEE DCBX Oper Config" AQ command there is a need to get
the CEE DesiredCfg Tx by firmware and DCB configuration Rx from peer; for
debug and other application purposes.
Also gets rid of unused locals variables.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
Use macros for abstracting (1 << foo) to BIT(foo)
and (1ULL << foo64) to BIT_ULL(foo64) in order to match
better with linux kernel requirements.
Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
Acked-by: Helin Zhang <helin.zhang@intel.com>
Tested-by: Huilong Xu <huilongx.xu@intel.com>
