numam-dpdk

d/numam-dpdk

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Author	SHA1	Message	Date
Jerin Jacob	4c02e453cc	eal: introduce SMP memory barriers This commit introduce rte_smp_mb(), rte_smp_wmb() and rte_smp_rmb(), in order to enable memory barriers between lcores. The patch does not provide any functional change for IA, the goal is to have infrastructure for weakly ordered machines like ARM to work on DPDK. Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>	2015-11-18 22:44:01 +01:00
Cyril Chemparathy	89e0d6f3c6	eal/tile: add initial TILE-Gx support This commit adds support for the TILE-Gx platform, as well as the TILE CPU architecture. This architecture port is fairly simple due to its reliance on generics for most arch stuff. Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com> Signed-off-by: Zhigang Lu <zlu@ezchip.com>	2015-07-13 16:15:52 +02:00

Author

SHA1

Message

Date

Jerin Jacob

4c02e453cc

eal: introduce SMP memory barriers

This commit introduce rte_smp_mb(), rte_smp_wmb() and rte_smp_rmb(), in
order to enable memory barriers between lcores.
The patch does not provide any functional change for IA, the goal is to
have infrastructure for weakly ordered machines like ARM to work on DPDK.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>

2015-11-18 22:44:01 +01:00

Cyril Chemparathy

89e0d6f3c6

eal/tile: add initial TILE-Gx support

This commit adds support for the TILE-Gx platform, as well as the TILE
CPU architecture.  This architecture port is fairly simple due to its
reliance on generics for most arch stuff.

Signed-off-by: Cyril Chemparathy <cchemparathy@ezchip.com>
Signed-off-by: Zhigang Lu <zlu@ezchip.com>

2015-07-13 16:15:52 +02:00

2 Commits