Commit Graph

697 Commits

Author SHA1 Message Date
Ori Kam
509782b35b net/mlx5: add Direct Verbs driver to glue
This commit adds all Direct Verbs required functions to the glue lib.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Ori Kam
d02cb06912 net/mlx5: add Direct Verbs translate actions
In this commit we add the translation of flow actions.
Unlike the Verbs API actions are separeted from the items and are passed
to the API in array structure.
Since the target action like RSS require the QP information those
actions are handled both in the translate action and in the apply.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Ori Kam
fc2c498ccb net/mlx5: add Direct Verbs translate items
This commit handles the translation of the requested flow into Direct
Verbs API.

The Direct Verbs introduce the matcher object which acts as shared mask
for all flows that are using the same mask. So in this commit we
translate the item and get in return a matcher and the value that should
be matched.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Ori Kam
865a0c1567 net/mlx5: add Direct Verbs prepare function
This function allocates the Direct Verbs device flow, and
introduce the relevant PRM structures.

This commit also adds the matcher object. The matcher object acts as a
mask and should be shared between flows. For example all rules that
should match source IP with full mask should use the same matcher. A
flow that should match dest IP or source IP but without full mask should
have a new matcher allocated.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Ori Kam
3d69434113 net/mlx5: add Direct Verbs validation function
This is commit introduce the Direct Verbs driver API.
The Direct Verbs is an API adds new features like encapsulation, match
on metatdata.
In this commit the validation function was added, most of the validation
is done with functions that are also in use for the Verbs API.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Ori Kam
84c406e745 net/mlx5: add flow translate function
This commit modify the conversion of the input parameters into Verbs
spec, in order to support all previous changes.

Some of those changes are:
removing the use of the parser,
storing each flow in its own flow structure.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Ori Kam
4e05a229c5 net/mlx5: add flow prepare function
In current implementation the calculation of the flow size is done
during the validation stage, and the same function is also used to
translate the input parameters into verbs spec.  This is hard to
maintain and error prone.
Another issue is dev-flows (flows that are created implicitly in order
to support the requested flow for example when the user request RSS on
UDP 2 rules need to be created one for IPv4 and one for IPv6).
In current implementation the dev-flows are created on the same
memory allocation. This will be harder to implement in future drivers.

The commits extract the calculation and creation of the dev-flow from
the translation part (the part that converts the parameters into the
format required by the driver). This results in that the prepare
function only function is to allocate the dev-flow.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Ori Kam
23c1d42c71 net/mlx5: split flow validation to dedicated function
In current implementation the validation logic reside in the same
function that calculates the size of the verbs spec and also create the
verbs spec.
This approach results in hard to maintain code which can't be shared.
also in current logic there is a use of parser entity that holds the
information between function calls. The main problem with this parser is
that it assumes the connection between different functions. For example
it assumes that the validation function was called and relevant values
were set.
This may result in an issue if and when we only call the validation
function, or call the apply function without the validation (Currently
according to RTE flow we must call validation before creating flow, but
if we want to change that to save time during flow creation, for example
the user validated some rule and just want to change the IP there is no
true reason the validate the rule again).

This commit address both of those issues by extracting the validation
logic into detected functions and remove the use of the parser object.
The side effect of those changes is that in some cases there will be a
need to traverse the item list again.

Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 18:53:49 +02:00
Anatoly Burakov
5282bb1c36 mem: allow memseg lists to be marked as external
When we allocate and use DPDK memory, we need to be able to
differentiate between DPDK hugepage segments and segments that
were made part of DPDK but are externally allocated. Add such
a property to memseg lists.

This breaks the ABI, so document the change in release notes.
This also breaks a few internal assumptions about memory
contiguousness, so adjust malloc code in a few places.

All current calls for memseg walk functions were adjusted to
ignore external segments where it made sense.

Mempools is a special case, because we may be asked to allocate
a mempool on a specific socket, and we need to ignore all page
sizes on other heaps or other sockets. Previously, this
assumption of knowing all page sizes was not a problem, but it
will be now, so we have to match socket ID with page size when
calculating minimum page size for a mempool.

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-10-11 10:24:29 +02:00
Ori Kam
c322c0e558 net/mlx5: add bluefield VF support
Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-09-28 01:41:01 +02:00
Nelio Laranjeiro
96d7c62a70 net/mlx5: support meson build
Compile Mellanox driver when its external dependencies are met.  A
glue version of the driver can still be requested by using the
-Denable_driver_mlx_glue=true

Meson will try to find the required external libraries.  When they are
not installed system wide, they can be provided though CFLAGS, LDFLAGS
and LD_LIBRARY_PATH environment variables, example (considering
RDMA-Core is installed in /tmp/rdma-core):

 # CLFAGS=-I/tmp/rdma-core/build/include \
   LDFLAGS=-L/tmp/rdma-core/build/lib \
   LD_LIBRARY_PATH=/tmp/rdma-core/build/lib \
   meson output
 # LD_LIBRARY_PATH=/tmp/rdma-core/build/lib \
   ninja -C output install

Note: LD_LIBRARY_PATH before ninja is necessary when the meson
configuration has changed (e.g. meson configure has been called), in
such situation the LD_LIBRARY_PATH is necessary to invoke the
autoconfiguration script.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2018-09-28 01:41:01 +02:00
Ferruh Yigit
323e7b667f ethdev: make default behavior CRC strip on Rx
Removed DEV_RX_OFFLOAD_CRC_STRIP offload flag.
Without any specific Rx offload flag, default behavior by PMDs is to
strip CRC.

PMDs that support keeping CRC should advertise DEV_RX_OFFLOAD_KEEP_CRC
Rx offload capability.

Applications that require keeping CRC should check PMD capability first
and if it is supported can enable this feature by setting
DEV_RX_OFFLOAD_KEEP_CRC in Rx offload flag in rte_eth_dev_configure()

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Tomasz Duszynski <tdu@semihalf.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Jan Remes <remes@netcope.com>
Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Hyong Youb Kim <hyonkim@cisco.com>
2018-09-14 20:08:41 +02:00
Xueming Li
3afdf157fc net/mlx5: fix interrupt completion queue index wrapping
Rxq cq_ci was 16 bits while hardware is expecting to wrap
around 24 bits, this caused interrupt failure after burst of packets.

Fixes: 43e9d9794c ("net/mlx5: support upstream rdma-core")
Cc: stable@dpdk.org

Signed-off-by: Xueming Li <xuemingl@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-09-10 13:59:03 +02:00
Shahaf Shuler
b8ac090835 net/mlx5: fix RSS flow action hash type selection
On the code after the below commits, the criteria to select the IPV4 or
IPV6 hash functions was the existence of some ETH_RSS_IPV4 RSS types on
the flow rule.

The check is wrong. For example ETH_RSS_NONFRAG_IPV4_TCP will not select
the IPV4 hash which will cause the packet to be spread in a bad way.

Fix it by adding the corresponding types needed for each hash selection.

Fixes: 592f05b29a ("net/mlx5: add RSS flow action")
Fixes: fd0b70316b ("net/mlx5: support inner RSS computation")
Cc: stable@dpdk.org

Reported-by: Yaroslav Brustinov <ybrustin@cisco.com>
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-08-28 15:27:39 +02:00
Shahaf Shuler
f9de87187b net/mlx5: disable ConnectX-4 Lx Multi Packet Send by default
On ConnectX-4 Lx the Multi Packet Send (MPW) feature is considered
un-secure, as on some cases were the application provides incorrect mbufs
on the Tx burst the host or NIC can get stuck.

Hence, disabling the feature by default for this specific NIC.
Users can still enable this feature and enjoy the performance gain
(mostly for low number of cores) by using the txq_mpw_en devarg.

This patch will impact the out of the box performance of some application
using ConnectX-4 Lx for the sack of security and robustness.

Since we need different defaults based on the underlying device the mpw
field in the configuration struct was extended to contain also the
MLX5_ARG_UNSET option.

Cc: stable@dpdk.org

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-08-28 15:27:39 +02:00
Adrien Mazarguil
dce1e4c204 net/mlx5: fix artificial L4 limitation on switch flow rules
Partial bit-masks are in fact supported on TCP/UDP source/destination
ports. Remove unnecessary check.

Fixes: 2bfc777e07 ("net/mlx5: add L2-L4 pattern items to switch flow rules")
Cc: stable@dpdk.org

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-08-28 15:27:39 +02:00
Yongseok Koh
4996efd746 net/mlx5: fix minimum size of multi-packet Rx queue
The size of Rx queue is determined by dividing the number of descriptors by
the number of strides. As device can't support single slot queue, if the
number of descriptors is same as the number of strides, MPRQ shouldn't be
enabled. Otherwise, this will cause HW fault. For example, if rxd is set to
512 with testpmd on ConnectX-4 Lx, PMD can't receive more than 512 packets
because the minimum number of strides for ConnectX-4 Lx is 512. Users have
to configure larger number of descriptors in this case.

Fixes: 7d6bf6b866 ("net/mlx5: add Multi-Packet Rx support")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-08-09 00:56:50 +02:00
Yongseok Koh
b85b719ab7 net/mlx5: fix minimum number of Multi-Packet RQ buffers
If MPRQ is enabled, a PMD-private mempool is allocated. For ConnectX-4 Lx,
the minimum number of strides is 512 which ConnectX-5 supports 8. This
results in quite small number of elements for the MPRQ mempool. For
example, if the size of Rx ring is configured as 512, only one MPRQ buffer
can cover the whole ring. If there's only one Rx queue is configured. In
the following code in mlx5_mprq_alloc_mp(), desc is 1 and obj_num will be
36 as a result.

	desc *= 4;
	obj_num = desc + MLX5_MPRQ_MP_CACHE_SZ * priv->rxqs_n;

However, rte_mempool_create_empty() has a sanity check to refuse large
per-lcore cache size compared to the number of elements. Cache flush
threshold should not exceed the number of elements of a mempool. For the
above example, the threshold is 32 * 1.5 = 48 which is larger than 36 and
it fails to create the mempool.

Fixes: 7d6bf6b866 ("net/mlx5: add Multi-Packet Rx support")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-08-05 13:29:34 +02:00
Yongseok Koh
e845e9ceb4 net/mlx5: fix check for MPLS-in-GRE
Multiple tunnel isn't allowed but MPLS over GRE should be accepted.

Fixes: a4a5cd21d2 ("net/mlx5: add flow MPLS item")

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-08-05 13:15:08 +02:00
Yongseok Koh
2547ee7458 net/mlx5: preserve allmulticast flag for flow isolation mode
mlx5_dev_ops_isolate doesn't have APIs for enabling/disabling allmulti
mode as it can't be enabled in flow isolation mode. If the function
pointers are null, librte APIs such as
rte_eth_allmulticast_enable/disable() fail to set the flag
(dev->data->all_multicast). The flag is used when starting traffic by
mlx5_traffic_enable(). When switching out of flow isolation mode, allmulti
mode will not be set even though it has been enabled.

Fixes: 0887aa7f27 ("net/mlx5: add new operations for isolated mode")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-08-05 08:47:41 +02:00
Yongseok Koh
24b068ad71 net/mlx5: preserve promiscuous flag for flow isolation mode
mlx5_dev_ops_isolate doesn't have APIs for enabling/disabling promiscuous
mode as it can't be enabled in flow isolation mode. If the function
pointers are null, librte APIs such as rte_eth_promiscuous_enable/disable()
fail to set the flag (dev->data->promiscuous). The flag is used when
starting traffic by mlx5_traffic_enable(). When switching out of flow
isolation mode, promiscuous mode will not be set even though it has been
enabled.

Fixes: 0887aa7f27 ("net/mlx5: add new operations for isolated mode")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-08-05 08:47:40 +02:00
Adrien Mazarguil
16ed22ba14 net/mlx5: fix VLAN pop action on switch flow rules
TC message for VLAN POP is broken due to an unfinished nested attribute.

Fixes: 7ac6778d50 ("net/mlx5: add VLAN item and actions to switch flow rules")

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-08-02 13:47:57 +02:00
Adrien Mazarguil
eb19f1f6c8 net/mlx5: fix VLAN matching on switch flow rules
VLAN ID is not properly translated to TC due to swapped byte order.

Fixes: 7ac6778d50 ("net/mlx5: add VLAN item and actions to switch flow rules")

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-08-02 13:46:39 +02:00
Moti Haimovsky
dd6eaddff7 net/mlx5: fix RSS flow configuration crash
This commit fixes a segmentation fault observed when configuring
mlx5 with RSS flow rule containing invalid queues indices such as
negative numbers, queue numbers bigger than the number Rx queues the
PMD or has no queues at all.

Fixes: 592f05b29a ("net/mlx5: add RSS flow action")

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
2018-08-02 13:22:35 +02:00
Ophir Munk
09e0fd260e net/mlx5: fix secondary process resource leakage
When running testpmd with an mlx5 device and then executing at testpmd
prompt in a raw: "port start all" followed by "port stop all"
a new file named /var/tmp/net_mlx5_<socket num> is created as a result
of creating a new unix domain socket (used for communication between
the primary and secondary processes).
When the new unix socket file is created the old unix socket file should
have been removed. This commit fixes it by closing the old unix socket
just before creating the new one in function mlx5_socket_init()

Fixes: f8b9a3bad4 ("net/mlx5: install a socket to exchange a file descriptor")
Cc: stable@dpdk.org

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
2018-08-02 13:15:27 +02:00
Shahaf Shuler
9da1db6bbf net/mlx5: fix VLAN filtering
The below commit has added a graph based expansion logic for RSS rule to
satisfy Verbs requirements. With this logic, for example, the rule:

flow create 0 ingress pattern eth / end actions rss queues 0 1 end types
ipv4-tcp ipv6-tcp end / end

will be expanded into the rules:

flow create 0 ingress pattern eth / ipv4 / tcp / end actions rss queues 0 1
end types ipv4-tcp ipv6-tcp end / end

flow create 0 ingress pattern eth / ipv6 / tcp / end actions rss queues 0 1
end types ipv4-tcp ipv6-tcp end / end

flow create 0 ingress pattern eth / end actions queue index 0 / end

The below commit defined two graphs:
1. graph for the tunnel case which starts from the ETH item
2. graph for the non-tunnel case which starts from the ETH item

The graphs are ignoring the VLAN case. Hence rules with VLAN item will
fail to traverse the graph and it will result in flow rule creation error.

Adding the VLAN item to the existing graphs will not work as the flow
engine will reject any VLAN item without a specific vid.

To solve this case two new graphs were added (for the tunnel and
non-tunnel case) which contain the VLAN item and are being used only
when the VLAN item exists in the flow pattern.

Two cases left un-covered for the inner RSS:
1. The case were VLAN exists in the pattern as part of the inner headers
2. The case were VLAN exists in the pattern both in the outer and the
inner headers

Solving those cases will require to add two more graphs.
Holding a VLAN for the overlay network is not common, the subnets are
usually defined by the tunnel protocol, for example the VXLAN vni.
Hence adding those two graphs seems like an overkill at this point.
Based on needs one can add those to provide the full support.

Fixes: 592f05b29a ("net/mlx5: add RSS flow action")

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
2018-08-02 13:15:18 +02:00
Matan Azrad
2d3b832052 net/mlx5: fix packet type offload for tunnels
There are dedicated QP attributes, tunnel offload flag and mask, which
must be configured in order to allow part of the HW tunnel offloads.

So, if a QP is pointed by a tunnel flow, the above QP attributes
should be configured.

The mask configuration is wrongly only performed if an internal RSS was
configured by the user, while there is no reason to condition the
tunnel offloads in RSS configurations.

Consequently, some of the tunnel offloads was not performed by the HW
when a tunnel flow was configured, for example, the packet tunnel
types was not reported to the user.

Replace the internal RSS condition with the tunnel flow condition.

Fixes: df6afd377a ("net/mlx5: remove useless arguments in hrxq API")

Signed-off-by: Matan Azrad <matan@mellanox.com>
2018-08-02 12:34:18 +02:00
Timothy Redaelli
c7684b6be4 net/mlx5: avoid stripping the glue library
Stripping binaries at build time is usually a bad thing since it makes
impossible to generate (split) debug symbols and this can lead to a more
difficult debugging.

Fixes: 59b91bec12 ("net/mlx5: spawn rdma-core dependency plug-in")
Cc: stable@dpdk.org

Signed-off-by: Timothy Redaelli <tredaelli@redhat.com>
Acked-by: Luca Boccassi <bluca@debian.org>
Acked-by: Christian Ehrhardt <christian.ehrhardt@canonical.com>
2018-08-02 12:34:17 +02:00
Shahaf Shuler
ed4c7fd92a net/mlx5: fix flow count action for shared counter
According to commit fb8fd96d42 ("ethdev: add shared counter to flow
API") the counter id should be taken into account only when the shared
flag is set.

Fixes: 60bd8c9747 ("net/mlx5: add count flow action")

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
2018-08-02 12:34:17 +02:00
Yaroslav Brustinov
2854ba22c5 net/mlx5: fix linkage of glue lib with gcc 4.7.2
addressing a gcc 4.7.2 bug that cannot be reproduced with latter
versions:

"bin/ld: Warning: alignment 8 of symbol `mlx5_glue' in
src/dpdk/drivers/net/mlx5/mlx5_glue.c.21.o is smaller than 16 in
src/dpdk/drivers/net/mlx5/mlx5_rxq.c.21.o"

Fix it be forcing the alignment of the glue lib.

Fixes: 0e83b8e536 ("net/mlx5: move rdma-core calls to separate file")
Cc: stable@dpdk.org

Signed-off-by: Yaroslav Brustinov <ybrustin@cisco.com>
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-07-26 14:05:52 +02:00
Adrien Mazarguil
3f8cb05df5 net/mlx5: fix invalid network interface index
Network interface indices being unsigned, an invalid index or error is
normally expressed through a zero value (see if_nametoindex()).

mlx5_ifindex() has a signed return type for negative values in case of
error. Since mlx5_nl.c does not check for errors, these may be fed back as
invalid interfaces indices to subsequent system calls. This usage would
have been correct if mlx5_ifindex() returned a zero value instead.

This patch makes mlx5_ifindex() unsigned for convenience.

Fixes: ccdcba53a3 ("net/mlx5: use Netlink to add/remove MAC addresses")
Cc: stable@dpdk.org

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Nelio Laranjeiro
919d53ad78 net/mlx5: fix count query when flow has not counter
Querying a counters on a flow without counter is ending with a
segmentation fault.

Fixes: 60bd8c9747 ("net/mlx5: add count flow action")

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Yongseok Koh
24f653a7e8 net/mlx5: fix queue rollback when starting device
mlx5_rxq_start() and mlx5_rxq_stop() must be strictly paired because
internal reference counter is increased or decreased inside. Also,
mlx5_rxq_get() must be paired with mlx5_rxq_release().

Fixes: 7d6bf6b866 ("net/mlx5: add Multi-Packet Rx support")
Fixes: a1366b1a2b ("net/mlx5: add reference counter on DPDK Rx queues")
Fixes: 6e78005a9b ("net/mlx5: add reference counter on DPDK Tx queues")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Yongseok Koh
c20d4a70ca net/mlx5: fix endless loop when clearing flow flags
If one of (*priv->rxqs)[] is null, the for loop can iterate infinitely as
idx can't be increased.

Fixes: cd24d52639 ("net/mlx5: add mark/flag flow action")

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
2018-07-26 14:05:52 +02:00
Nelio Laranjeiro
5366074b01 net/mlx5: fix route Netlink message overflow
Route Netlink message socket is wrongly initialized by registering to
the route link group.  This causes the socket to receive all link
message related to routes whereas the PMD do not expect to receive such
information.  In some situation it ends by filling the socket at a point
that any new message cannot be exchanged.
As the PMD is not expected to process such broadcast messages, the
parameter in the nl_group in the function is also remove.

Fixes: ccdcba53a3 ("net/mlx5: use Netlink to add/remove MAC addresses")
Cc: stable@dpdk.org

Signed-off-by: Zijie Pan <zijie.pan@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2018-07-26 14:05:52 +02:00
Yongseok Koh
c618e7e82b net/mlx5: fix assert for Tx completion queue count
There should be at least one Tx CQE remained if Tx WQ and txq->elts[] have
available slots to send a packet because the size of Tx CQ is exactly
calculated from the size of other resources. As it is guaranteed, it is
checked by an assertion.

max_elts is checked after the assertion for Tx CQ. If no slot is available
in txq->elts[], the assertion would be wrong.

Fixes: 2eefbec531 ("net/mlx5: add missing sanity checks for Tx completion queue")
Fixes: 6ce84bd889 ("net/mlx5: add enhanced multi-packet send for ConnectX-5")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Xueming Li <xuemingl@mellanox.com>
2018-07-26 14:05:52 +02:00
Nelio Laranjeiro
f872b4b99d net/mlx5: fix representors detection
On systems where the required Netlink commands are not supported but
Mellanox OFED is installed, representors information must be retrieved
through sysfs.

Fixes: 26c08b979d ("net/mlx5: add port representor awareness")

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
2018-07-26 14:05:52 +02:00
Nelio Laranjeiro
2bc98393ac net/mlx5: fix TCI mask filter
In mlx5_traffic_enable() the TCI mask for the VLAN is wrong causing the
sub flow engine to reject the rule.

Fixes: 272733b5eb ("net/mlx5: use flow to enable unicast traffic")
Cc: stable@dpdk.org

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2018-07-26 14:05:52 +02:00
Moti Haimovsky
79d0989213 net/mlx5: fix build with old kernels
This commit fixes compilation errors due to missing definitions
found when compiling mlx5 PMD from DPDK 17.11-LTS on Ubuntu 12.4
with kernel 3.15.

Fixes: 75ef62a943 ("net/mlx5: fix link speed capability information")
Fixes: 5bfc9fc112 ("net/mlx5: use static assert for compile-time sanity checks")
Cc: stable@dpdk.org

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
2018-07-26 14:05:52 +02:00
Adrien Mazarguil
21174f2a5c net/mlx5: add port ID pattern item to switch flow rules
This enables flow rules to match traffic coming from a different DPDK port
ID associated with the device (PORT_ID pattern item), mainly for the
convenience of applications that want to deal with a single port ID for all
flow rules associated with some physical device.

Testpmd example:

- Creating a flow rule on port ID 1 to consume all traffic from port ID 0
  and direct it to port ID 2:

  flow create 1 ingress transfer pattern port_id id is 0 / end actions
     port_id id 2 / end

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Adrien Mazarguil
7ac6778d50 net/mlx5: add VLAN item and actions to switch flow rules
This enables flow rules to explicitly match VLAN traffic (VLAN pattern
item) and perform various operations on VLAN headers at the switch level
(OF_POP_VLAN, OF_PUSH_VLAN, OF_SET_VLAN_VID and OF_SET_VLAN_PCP actions).

Testpmd examples:

- Directing all VLAN traffic received on port ID 1 to port ID 0:

  flow create 1 ingress transfer pattern eth / vlan / end actions
     port_id id 0 / end

- Adding a VLAN header to IPv6 traffic received on port ID 1 and directing
  it to port ID 0:

  flow create 1 ingress transfer pattern eth / ipv6 / end actions
     of_push_vlan ethertype 0x8100 / of_set_vlan_vid vlan_vid 42 /
     port_id id 0 / end

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Adrien Mazarguil
2bfc777e07 net/mlx5: add L2-L4 pattern items to switch flow rules
This enables flow rules to explicitly match supported combinations of
Ethernet, IPv4, IPv6, TCP and UDP headers at the switch level.

Testpmd example:

- Dropping TCPv4 traffic with a specific destination on port ID 2:

  flow create 2 ingress transfer pattern eth / ipv4 / tcp dst is 42 / end
     actions drop / end

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Adrien Mazarguil
9b33df8e0c net/mlx5: add fate actions to switch flow rules
This patch enables creation of rte_flow rules that direct matching traffic
to a different port (e.g. another VF representor) or drop it directly at
the switch level (PORT_ID and DROP actions).

Testpmd examples:

- Directing all traffic to port ID 0:

  flow create 1 ingress transfer pattern end actions port_id id 0 / end

- Dropping all traffic normally received by port ID 1:

  flow create 1 ingress transfer pattern end actions drop / end

Note the presence of the transfer attribute, which requests them to be
applied at the switch level. All traffic is matched due to empty pattern.

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Adrien Mazarguil
8f9059ccee net/mlx5: add framework for switch flow rules
Because mlx5 switch flow rules are configured through Netlink (TC
interface) and have little in common with Verbs, this patch adds a separate
parser function to handle them.

- mlx5_nl_flow_transpose() converts a rte_flow rule to its TC equivalent
  and stores the result in a buffer.

- mlx5_nl_flow_brand() gives a unique handle to a flow rule buffer.

- mlx5_nl_flow_create() instantiates a flow rule on the device based on
  such a buffer.

- mlx5_nl_flow_destroy() performs the reverse operation.

These functions are called by the existing implementation when encountering
flow rules which must be offloaded to the switch (currently relying on the
transfer attribute).

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Adrien Mazarguil
20b71e92ef net/mlx5: lay groundwork for switch offloads
With mlx5, unlike normal flow rules implemented through Verbs for traffic
emitted and received by the application, those targeting different logical
ports of the device (VF representors for instance) are offloaded at the
switch level and must be configured through Netlink (TC interface).

This patch adds preliminary support to manage such flow rules through the
flow API (rte_flow).

Instead of rewriting tons of Netlink helpers and as previously suggested by
Stephen [1], this patch introduces a new dependency to libmnl [2]
(LGPL-2.1) when compiling mlx5.

[1] https://mails.dpdk.org/archives/dev/2018-March/092676.html
[2] https://netfilter.org/projects/libmnl/

Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
Acked-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-26 14:05:52 +02:00
Moti Haimovsky
6bf10ab69b net/mlx5: support 32-bit systems
This patch adds support for building and running mlx5 PMD on
32bit systems such as i686.

The main issue to tackle was handling the 32bit access to the UAR
as quoted from the mlx5 PRM:
QP and CQ DoorBells require 64-bit writes. For best performance, it
is recommended to execute the QP/CQ DoorBell as a single 64-bit write
operation. For platforms that do not support 64 bit writes, it is
possible to issue the 64 bits DoorBells through two consecutive
writes,
each write 32 bits, as described below:
* The order of writing each of the Dwords is from lower to upper
  addresses.
* No other DoorBell can be rung (or even start ringing) in the midst
 of an on-going write of a DoorBell over a given UAR page.

The last rule implies that in a multi-threaded environment, the access
to a UAR page (which can be accessible by all threads in the process)
must be synchronized (for example, using a semaphore) unless an atomic
write of 64 bits in a single bus operation is guaranteed. Such a
synchronization is not required for when ringing DoorBells on different
UAR pages.

Signed-off-by: Moti Haimovsky <motih@mellanox.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-12 14:34:59 +02:00
Shahaf Shuler
06b1fe3f6d net/mlx5: fix build with rdma-core v19
The flow counter support introduced by
commit 9a761de8ea ("net/mlx5: flow counter support") was intend to
work only with MLNX_OFED_4.3 as the upstream rdma-core
libraries were lack such support.

On rdma-core v19 the support for the flow counters was added but with
different user APIs, hence causing compilation issues on the PMD.

This patch fix the compilation errors by forcing the flow counters
to be enabled only with MLNX_OFED APIs.
Once MLNX_OFED and rdma-core APIs will be aligned, a proper patch to
support the new API will be submitted.

Fixes: 9a761de8ea ("net/mlx5: flow counter support")
Cc: stable@dpdk.org

Reported-by: Stephen Hemminger <stephen@networkplumber.org>
Reported-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2018-07-12 12:53:59 +02:00
Nelio Laranjeiro
60bd8c9747 net/mlx5: add count flow action
This is only supported by Mellanox OFED.

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-12 12:12:27 +02:00
Nelio Laranjeiro
a4a5cd21d2 net/mlx5: add flow MPLS item
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-12 12:12:26 +02:00
Nelio Laranjeiro
f4b901a46a net/mlx5: add flow GRE item
Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Yongseok Koh <yskoh@mellanox.com>
2018-07-12 12:12:26 +02:00