Commit Graph

9421 Commits

Author SHA1 Message Date
Harman Kalra
56a96aa424 event/octeontx: add framework for Rx/Tx offloads
Adding macro based framework to hook dequeue/enqueue function
pointers to the appropriate function based on rx/tx offloads.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-05-03 12:08:31 +02:00
Ophir Munk
0efc99bed3 net/mlx5: fix flow rules with Verbs
The flow_verbs_translate() function accumulates hash fields while
iterating through the flow items (SRC_IPV4, DST_IPV4, SRC_IPV6,
DST_IPV6, SRC_PORT_TCP, DST_PORT_TCP, SRC_PORT_UDP, DST_PORT_UDP).
Before this commit the dev_flow handle structure was reused in each new
flow_verbs_translate() call, however the dev_flow->hash_fields variable
was not reset before each call. As a result hash_fields from previous
calls remained present in the current flow which lead to invalid
combinations (e.g.  simultaneous IPv4 and IPv6 specs). This scenario
happens for example in the next flows sequence, when running in verbs
mode (dv_flow_en=0).

flow create 0 ingress group 0 pattern eth / ipv4 / end <rss actions>
flow create 0 ingress group 0 pattern eth / ipv6 / end <rss actions>

The fix is to reset dev_flow->hash_fields in flow_verbs_prepare().

Fixes: e7bfa3596a ("net/mlx5: separate the flow handle resource")

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-05-05 15:54:27 +02:00
Eli Britstein
6030e1d452 net/mlx5: optimize IPv4/IPv6 matching
The HW is optimized for IPv4/IPv6. For such cases avoid matching on
ethertype, and use ip_version field instead.

Signed-off-by: Eli Britstein <elibr@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-05-05 15:54:27 +02:00
Eli Britstein
dd5374bcf0 net/mlx5: introduce helper to set IP version match
Introduce a helper function to set the ip_version match.

Signed-off-by: Eli Britstein <elibr@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-05-05 15:54:27 +02:00
Kevin Traynor
869ea2e62d net/mlx5: fix gcc 10 enum-conversion warning
gcc 10.0.1 reports warnings when using mlx5_rte_flow enums
with rte_flow type enums. For example:

../drivers/net/mlx5/mlx5_flow.c: In function ‘flow_hairpin_split’:
../drivers/net/mlx5/mlx5_flow.c:3406:19:
warning: implicit conversion from ‘enum mlx5_rtedflow_action_type’ to
         ‘enum rte_flow_action_type’ [-Wenum-conversion]
 3406 |  tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
      |                   ^
../drivers/net/mlx5/mlx5_flow.c:3419:13:
warning: implicit conversion from ‘enum mlx5_rte_flow_item_type’
         to ‘enum rte_flow_item_type’ [-Wenum-conversion]
 3419 |  item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
      |             ^

Fix by casting to the correct enum.

Signed-off-by: Kevin Traynor <ktraynor@redhat.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:27 +02:00
Wisam Jaddo
b756f29807 net/mlx5: fix VLAN ID check
All comparison should be done in CPU endianness, otherwise
it will not give right results.

for example:
255 after converting into RTE_BE16 will be biger than 4096 after
converting into RTE_BE16.

Fixes: a5f2da0b81 ("net/mlx5: support modify VLAN ID on new VLAN header")
Cc: stable@dpdk.org

Signed-off-by: Wisam Jaddo <wisamm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:27 +02:00
Bing Zhao
c8fa92f6c1 net/mlx5: fix assert in modify converting
The assertion was added incorrectly in converting the modify actions
into the format of low layer driver.
There is no mask specified in the rte_flow actions, and PMD driver
will give a mask of all 1s to the field to be modified. For each
field, the mask could not be zero. But for the whole header which
contains this field, the masks of other fields could be zero. The
assertion needs to be removed for debug mode.

Fixes: 72a944dba1 ("net/mlx5: fix header modify action validation")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:27 +02:00
Dong Zhou
fa2d01c87d net/mlx5: support flow aging
Currently, there is no flow aging check and age-out event callback
mechanism for mlx5 driver, this patch implements it. It's included:
- Splitting the current counter container to aged or no-aged container
  since reducing memory consumption. Aged container will allocate extra
  memory to save the aging parameter from user configuration.
- Aging check and age-out event callback mechanism based on current
  counter. When a flow be checked aged-out, RTE_ETH_EVENT_FLOW_AGED
  event will be triggered to applications.
- Implement the new API: rte_flow_get_aged_flows, applications can use
  this API to get aged flows.

Signed-off-by: Dong Zhou <dongz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-05-05 15:54:27 +02:00
Dong Zhou
8d93c830e4 net/mlx5: modify ext-counter memory allocation
Currently, the counter pool needs 512 ext-counter memory for no batch
counters, it's allocated separately by once, behind the 512
basic-counter memory. This is not easy to get ext-counter pointer by
corresponding basic-counter pointer. This is also no easy for expanding
some other potential additional type of counter memory.

So, need allocate every one of ext-counter and basic-counter together,
as a single piece of memory. It's will be same for further additional
type of counter memory. In this case, one piece of memory contains all
type of memory for one counter, it's easy to get each type memory by
using offsetting.

Signed-off-by: Dong Zhou <dongz@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-05-05 15:54:27 +02:00
Xiaoyu Min
0afac6dcca net/mlx5: fix RSS enablement
PMD create some default control rules with RSS action
if it's not isolated mode.

However whether default control rules need to do RSS or not should be
controlled by device configuration, the mq_mode of rxmode configuration
in specific.

In another word, only when mq_mode is configured with ETH_MQ_RX_RSS_FLAG
set, then RSS is needed for default rules.

Fixes: c64ccc0eca ("mlx5: fix overwritten RSS configuration")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyu Min <jackmin@mellanox.com>
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-05-05 15:54:27 +02:00
Kishore Padmanabha
8a32d5c492 net/bnxt: modify mark manager validity checks
The ULP mark manager originally assumed that zero was an invalid
mark and used it for invalidation and deletion.  The mark manager
now supports adding zero as a mark, flags for validity and type,
and adds explicit bounds checking instead of relying on mask.

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2020-05-05 15:54:27 +02:00
Mike Baucom
17b6c8386d net/bnxt: fix mark handling
The current mark handling uses the meta data field of the rxcmp as the
first level check for determining gfid vs lfid.  When the meta data is
zero due to only the lowest 16bits of the gfid being set, the cfa code
is incorrectly interpreted as being an lfid.  Changing code to look at
meta fmt instead of the meta data directly for the determination.

Fixes: b87abb2e55 ("net/bnxt: support marking packet")

Signed-off-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Lance Richardson <lance.richardson@broadcom.com>
2020-05-05 15:54:27 +02:00
Nithin Dabilpuram
542714cc4b net/octeontx2: update red algo for shaper dynamic update
Due to an errata red algo needs to be set to discard instead of stall
for 96XX C0 silicon for two rate shaping. This workaround is being
already handled for newly created hierarchy but not for dynamic
shaper update cases. This patch hence applies the workaround
even when for shaper dynamic update.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2020-05-05 15:54:26 +02:00
Amit Gupta
c600b523c0 net/octeontx2: fix bad L4 checksum detection
On detecting outer L4 checksum as bad, both outer and
inner checksums are marked as bad. No need to explicitly
check inner L4 checksum in this case.

Outer L4 UDP checksum error => PKT_RX_OUTER_L4_CKSUM_BAD
and PKT_RX_L4_CKSUM_BAD

Inner L4 UDP checksum error => PKT_RX_L4_CKSUM_BAD

Fixes: 41fe7a3a11 ("net/octeontx2: offload bad L2/L3/L4 UDP lengths detection")

Signed-off-by: Amit Gupta <agupta3@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2020-05-05 15:54:26 +02:00
Yunjian Wang
5ed5df8073 net/octeontx: fix dangling pointer on init failure
When octeontx_create() is cleaning up, it does not correctly set
the mac_addrs variable to NULL, which will lead to a double free.

Fixes: 9e399b88ce ("net/octeontx: fix memory leak of MAC address table")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Harman Kalra <hkalra@marvell.com>
2020-05-05 15:54:26 +02:00
Rasesh Mody
f97b56f9f1 net/qede: support FW version query
Add support for get firmware version operation.

Get and dump multi boot image (MBI) version as part of get
firmware version string along with Management firmware (MFW) version.
Use qede_fw_version_get() for PMD info logs.

Signed-off-by: Yash Sharma <ysharma@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
2020-05-05 15:54:26 +02:00
Rasesh Mody
5810e43604 net/qede: support flow API flush
This patch adds support to flush the rte flows.

Signed-off-by: Rasesh Mody <rmody@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
2020-05-05 15:54:26 +02:00
Joyce Kong
3fc1d87c2a virtio: use one way barrier for split vring avail index
In case VIRTIO_F_ORDER_PLATFORM(36) is not negotiated, then the frontend
and backend are assumed to be implemented in software, that is they can
run on identical CPUs in an SMP configuration.
Thus a weak form of memory barriers like rte_smp_r/wmb, other than
rte_cio_r/wmb, is sufficient for this case(vq->hw->weak_barriers == 1)
and yields better performance.
For the above case, this patch helps yielding even better performance
by replacing the two-way barriers with C11 one-way barriers for avail
index in split ring.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Joyce Kong
ea5207c158 virtio: use one way barrier for split vring used index
In case VIRTIO_F_ORDER_PLATFORM(36) is not negotiated, then the frontend
and backend are assumed to be implemented in software, that is they can
run on identical CPUs in an SMP configuration.
Thus a weak form of memory barriers like rte_smp_r/wmb, other than
rte_cio_r/wmb, is sufficient for this case(vq->hw->weak_barriers == 1)
and yields better performance.
For the above case, this patch helps yielding even better performance
by replacing the two-way barriers with C11 one-way barriers for used
index in split ring.

Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Wei Hu (Xavier)
68ca93e31c net/hns3: fix return value when clearing statistics
Since the return value of the '.stats_reset' and '.xstats_reset'
callback function is int, when failing to issue command to firmware to
execute clear statistics, the relevant callback function should return
non-zero value.

Fixes: 8839c5e202 ("net/hns3: support device stats")
Cc: stable@dpdk.org

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-05-05 15:54:26 +02:00
Wei Hu (Xavier)
2de74dcfbd net/hns3: fix MSI-X interrupt during initialization
Currently, based on hns3 VF device error may occur during initialization.

The root cause as below:
When the following formula is executed during initialization, the
private variable named hw->tqps_num has not been obtained from PF driver
through mailbox, further causes failure when mapping interrupt and
queues.
  hw->num_msi = (num_msi > hw->tqps_num + 1) ? hw->tqps_num + 1 : num_msi;
We need to use hw->tqp_num after it is correctly assigned.

On the other hand, because the private variable named hw->num_msi, which
represents the number of MSI-x interrupt of hns3 PF/VF device, is used in
the '.get_reg' ops implementation function to dump all interrupt related
registers, it should be obtained from firmware directly and we'd better
not modify it in the driver.

Fixes: ef2e785c36 ("net/hns3: fix Tx interrupt when enabling Rx interrupt")
Fixes: 02a7b55657 ("net/hns3: support Rx interrupt")
Cc: stable@dpdk.org

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Hao Chen <chenhao164@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2020-05-05 15:54:26 +02:00
Min Hu (Connor)
99d673d5d3 net/hns3: fix VLAN PVID when configuring device
In current version, when upper level application calls the
rte_eth_dev_configure API function, if pvid config is not set of the
input parameter which struct type is rte_eth_conf, hns3 pmd driver also
sets the VLAN pvid related configuration to hardware, and this is not
reasonable. For example, As pvid is set to 100 by
rte_eth_dev_set_vlan_pvid, when pvid config is not set in rte_eth_conf,
rte_eth_dev_configure will tell driver to delete pvid 0, and that is
meaningless.

This patch fixes it to ensure that driver does not set VLAN pvid related
configuration to hardware when pvid config is not set in rte_eth_conf.

Fixes: 411d23b9ea ("net/hns3: support VLAN")
Cc: stable@dpdk.org

Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Chengchang Tang <tangchengchang@huawei.com>
2020-05-05 15:54:26 +02:00
Wei Hu (Xavier)
837740cfa3 net/hns3: get PCI revision ID
The hns3 network engine is built-in multiple SoCs, such as kunpeng 920,
kunpeng 930, etc. The PCI revision id is 0x21 in kunpeng 920, and the PCI
revision id is 0x30 in kunpeng 930.

This patch gets PCI revision to identify different version of hardware
network engine.

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-05-05 15:54:26 +02:00
Lijun Ou
8eed8acc81 net/hns3: add error code to some logs
Here adds some prints for return value when the relative function fails
and enter the exception branch.

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-05-05 15:54:26 +02:00
Wei Hu (Xavier)
c4b7d6761d net/hns3: get Tx abnormal errors in xstats
When upper level application calls the rte_eth_tx_burst API function to
send multiple packets at a time with burst mode based on hns3 network
engine, there are some abnormal conditions that cause the driver to fail
to operate the hardware to send packets correctly.

This patch adds some statistic counts for the abnormal errors of Tx data
path to the extend device statistics. The upper level application can
get them by calling the rte_eth_xstats_get API function.

Note: When using burst mode to call the rte_eth_tx_burst API function to
send multiple packets at a time. When the first abnormal error is
detected, add one to the relevant error statistics item, and then exit
the loop of sending multiple packets of the function. That is to say,
even if there are multiple packets in which abnormal errors may be
detected in the burst, the relevant error statistics in the driver will
only be increased by one.

The detail description of the Tx abnormal errors statistic items as
below:
 - TX_OVER_LENGTH_PKT_CNT Total number of greater than
   HNS3_MAX_FRAME_LEN the driver supported.

 - TX_EXCEED_LIMITED_BD_PKT_CNT
     Total number of exceeding the hardware limited bd which process a
     packet needed bd numbers.

 - TX_EXCEED_LIMITED_BD_PKT_REASSEMBLE_FAIL_CNT
     Total number of exceeding the hardware limited bd fail which
     process a packet needed bd numbers and reassemble fail.

 - TX_UNSUPPORTED_TUNNEL_PKT_CNT
     Total number of unsupported tunnel packet. The unsupported tunnel
     type: vxlan_gpe, gtp, ipip and MPLSINUDP, MPLSINUDP is a packet
     with MPLS-in-UDP RFC 7510 header.

 - TX_QUEUE_FULL_CNT
     Total count which the available bd numbers in current bd queue is
     less than the bd numbers with the pkt process needed.

 - TX_SHORT_PKT_PAD_FAIL_CNT
     Total count which the packet length is less than minimum packet
     size HNS3_MIN_PKT_SIZE and fail to be appended with 0.

Signed-off-by: Lijun Ou <oulijun@huawei.com>
Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
Signed-off-by: Huisong Li <lihuisong@huawei.com>
Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Hao Chen <chenhao164@huawei.com>
2020-05-05 15:54:26 +02:00
Jasvinder Singh
c1ea7a5f99 net/softnic: fix resource leak for pipeline
For sending request messages to data plane threads, the
caller invokes pipeline_msg_send_recv() function which never
returns null response. Thus, removed redundant check on
the returned response.

Coverity issue: 357676, 357680, 357681, 357682, 357690, 357693, 357711
Coverity issue: 357722, 357725, 357734, 357739, 357743, 357747, 357762
Coverity issue: 357766, 357787

Fixes: 6d4d054025 ("net/softnic: add command to read stats")
Fixes: 202905f3ee ("net/softnic: add command to create objects")
Fixes: ee19326a4b ("net/softnic: add command for pipeline table entries")
Fixes: 9bc0ce0ad1 ("net/softnic: add command for meter action")
Fixes: 2505030a83 ("net/softnic: add command for TTL action")
Cc: stable@dpdk.org

Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2020-05-05 15:54:26 +02:00
Jasvinder Singh
22335d4348 net/softnic: fix memory leak for thread
For sending request messages to data plane threads, the
caller invokes thread_msg_send_recv() function which never
returns null response. Thus, removed redundant check on
the returned response.

Coverity issue: 357717, 357772
Fixes: 70709c78fd ("net/softnic: add command to enable/disable pipeline")
Cc: stable@dpdk.org

Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2020-05-05 15:54:26 +02:00
Andrew Rybchenko
afff2aa3e3 net/sfc/base: fix build when EVB is enabled
Make local MCDI helper functions static.

Fixes: f0bda0cd68 ("net/sfc/base: add MCDI wrappers for vPort and vSwitch in EVB")
Fixes: ea94d14dbe ("net/sfc/base: provide APIs to configure and reset vPort")
Cc: stable@dpdk.org

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2020-05-05 15:54:26 +02:00
Andrew Rybchenko
dd3d209cb1 net/sfc/base: use simpler EF10 family run-time checks
Fixes: 4625c4f527 ("net/sfc/base: factor out upstream port vAdaptor allocation")
Fixes: 4f12e20c85 ("net/sfc/base: introduce EVB module for SR-IOV")
Fixes: 18c8e84d77 ("net/sfc/base: support proxy auth operations for SR-IOV")
Cc: stable@dpdk.org

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2020-05-05 15:54:26 +02:00
Andrew Rybchenko
f201b886b7 net/sfc/base: use simpler EF10 family conditional check
Fixes: 4f12e20c85 ("net/sfc/base: introduce EVB module for SR-IOV")
Fixes: 18c8e84d77 ("net/sfc/base: support proxy auth operations for SR-IOV")
Cc: stable@dpdk.org

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2020-05-05 15:54:26 +02:00
Bing Zhao
0ba70e439e net/mlx5: fix actions validation on root table
The maximal supported header modifications number of a single modify
context on the root table cannot be queried from firmware directly.
It is a fixed value of 16 in the latest releases. In the validation
stage, PMD driver should ensure that no more than 16 header modify
actions exist in a single context.
In some old firmware releases, the supported value is 8. PMD driver
should try its best to create the flow. Firmware will return error
and refuse to create the flow if the actions number exceeds the
maximal value.

Fixes: 72a944dba1 ("net/mlx5: fix header modify action validation")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:26 +02:00
Suanming Mou
691b3d3ebb net/mlx5: fix indexed pool bitmap initialization
Currently, the indexed memory pool bitmap start address is not aligned
to cacheline size explicitly. The bitmap initialization requires the
address should be cacheline aligned. In that case, the initialization
maybe failed if the address is not cacheline aligned.

Add RTE_CACHE_LINE_ROUNDUP() to the trunk size calculation to make sure
the bitmap offset address will start with cacheline aligned.

Fixes: a3cf59f56c ("net/mlx5: add indexed memory pool")

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Tested-by: Lijian Zhang <lijian.zhang@arm.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2020-05-05 15:54:26 +02:00
Alexander Kozyrev
9a6ea33af9 net/mlx5: fix packet length assert in MPRQ
The assert that checks if there is a enough room for the
whole packet minus headroom data is written incorrectly.
The check should be negated in order to work properly.

Fixes: bd0d5930bf ("net/mlx5: enable MPRQ multi-stride operations")

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:26 +02:00
Alexander Kozyrev
0c55591588 net/mlx5: fix assert in dynamic metadata handling
The assert in dynamic flow metadata handling is wrong after the
fix for the performance degradation. The assert meant to check
the metadata mask but was updated with the metadata offset instead.
Fix this assert and restore proper metadata mask checking.

Fixes: 6c55b622a9 ("net/mlx5: set dynamic flow metadata in Rx queues")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
ccb10995c2 net/virtio: add election for vectorized path
Rewrite vectorized path selection logic. Default setting comes from
vectorized devarg, then checks each criteria.

Packed ring vectorized path need:
    AVX512F and required extensions are supported by compiler and host
    VERSION_1 and IN_ORDER features are negotiated
    mergeable feature is not negotiated
    LRO offloading is disabled

Split ring vectorized rx path need:
    mergeable and IN_ORDER features are not negotiated
    LRO, chksum and vlan strip offloadings are disabled

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
6494b9a9b2 net/virtio: add vectorized packed ring Tx
Optimize packed ring Tx path like Rx path. Split Tx path into batch and
single Tx functions. Batch function is further optimized by AVX512
instructions.

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
77d66da838 net/virtio: add vectorized packed ring Rx
Optimize packed ring Rx path with SIMD instructions. Solution of
optimization is pretty like vhost, is that split path into batch and
single functions. Batch function is further optimized by AVX512
instructions.

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
57f90f8945 net/virtio: reuse packed ring functions
Move offload, xmit cleanup and packed xmit enqueue function to header
file. These functions will be reused by packed ring vectorized path.

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
6b7eefbceb net/virtio-user: add parameter to enable vectorized path
Add new devarg for virtio user device vectorized path selection.
By default vectorized path is disabled.

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
4710e16a4a net/virtio: add parameter to enable vectorized path
Previously, virtio split ring vectorized path was enabled by default.
This is not suitable for everyone because that path does not follow
virtio spec. Add new devarg for virtio vectorized path selection. By
default vectorized path is disabled.

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
f68a6fac2d net/virtio: enable in-order feature if negotiated
Ring initialization is different when inorder feature negotiated. This
action should dependent on negotiated feature bits.

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Marvin Liu
1982462ead net/virtio: add Rx free threshold setting
Introduce free threshold setting in Rx queue, its default value is 32.
Limit the threshold size to multiple of four as only vectorized packed
Rx function will utilize it. Virtio driver will rearm Rx queue when
more than rx_free_thresh descs were dequeued.

Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2020-05-05 15:54:26 +02:00
Suanming Mou
dd76f43612 net/mlx5: save meter index instead of meter id
Currently, while creating the flow with meter, meter id is saved to the
rte flow. While destroying the flow, the meter object will be found by
the meter id, so the meter object will be released accordingly. But as
the meter id is configured by user, while the meter id is set to 0, it
doesn't make any sense to flow destroy since 0 means flow doesn't have
meter. The meter object with id 0 will be leaked.

As meter object is allocated from indexed memory, and the index starts
from 1, save the internal generated index instead of user defined meter
id will never meet the issue as above.

This patch saves meter index instead of meter id in rte flow.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:26 +02:00
Asaf Penso
9b080425e3 net/mlx5: fix assert in doorbell lookup
The asserts makes sure that 'i' doesn't exceed the expected value.
This to prevent an out of bound access to dbr_bitmap.

The current location of the assert protects the assignment of
dbr_bitmap, but not the access to it.

Moved the assert to the correct place, to protect both cases.
Also, used an existing define for the assert.

Fixes: 21cae8580f ("net/mlx5: allocate door-bells via DevX")
Cc: stable@dpdk.org

Signed-off-by: Asaf Penso <asafp@mellanox.com>
Reviewed-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:26 +02:00
Bing Zhao
f21a98196a net/mlx5: fix empty flow error structure
The output flow error parameter is used to indicate the detailed
reason of the failure when calling a rte_flow_* interface. Even
though sometimes the application will not check it or use it, the PMD
must fill it in the failure branch before returning. Or else, some
dirty value in the stack, heap will be accessed as a pointer and then
cause a crash.
In this case, when a port is stopped, it is not allowed to insert a
flow from application. The detailed error information should be
filled. If the application needs to check the detailed error reason,
it will get the information but not result in any crash.

Fixes: 40b9e7f65f ("net/mlx5: check device status before creating flow")

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-05-05 15:54:26 +02:00
Bing Zhao
351b54f5cf net/mlx5: fix Rx queue flags on destroying flow
After inserting an offload flow, the software flag information will
be updated based on the flow. When receiving a packet on this queue,
the hardware packet type bits and the software flag will be used
together to get the inner packet and tunnel header type (if any) from
the global packet type table.
When destroying a flow, the corresponding Rx queue flag needs to be
updated. All flags should be cleared when closing a device because
all control flows and application flows are invalid anymore.
Such behavior is missed when implementing the non-cached mode.

Fixes: 8db7e3b698 ("net/mlx5: change operations for non-cached flows")

Signed-off-by: Bing Zhao <bingz@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-05-05 15:54:26 +02:00
Qi Zhang
a7b645debc net/ice/base: fix DCF switch rule
1. ln_en bit should not be turned on, since we only support Rx VEB.
2. lan_en bit need to be turned on for a DCF switch rule, otherwise
   any Tx packet that hit on a rule will be dropped.

Fixes: fed0c5ca5f ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2020-05-05 15:54:26 +02:00
Simei Su
ada64daa1a net/iavf: fix VF reset for flow director rule
After VF reset, FDIR rule still takes effect. To solve the issue,
this patch adds to flush all flows before flow uninit. VIRTCHNL
sends message to PF by Admin Queue, so flow flush should be implemented
before Admin Queue shut down.

Fixes: ff2d0c345c ("net/iavf: support generic flow API")

Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2020-05-05 15:54:25 +02:00
Wei Zhao
1491f63c75 net/i40e: fix flush of flow director filter
When we flush FDIR filter, we can not call i40e_fdir_teardown()
function as it will free vsi used for FDIR, then the vsi->base_queue
will be freed from pf->qp_pool, but vsi->base_queue can only get
once when do dev init in i40e_pf_setup(). If we free it, it will
never be alloc again.

Bugzilla ID: 404
Fixes: 2e67a7fbf3 ("net/i40e: config flow director automatically")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-05-05 15:54:25 +02:00
Wei Zhao
73cc2f0ab5 net/i40e: fix flow director for ARP packets
Currently, flow "pattern eth type is 0x0806 / end actions mark id
0x86 / rss / end" can't be created successfully. FDIR parser
shouldn't deny RTE_ETHER_TYPE_ARP since ARP packets will be
parsed as PCTYPE_L2_PAYLOAD. This patch fixes the issue.

Bugzilla ID: 402
Fixes: 42044b69c6 ("net/i40e: support input set selection for FDIR")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
2020-05-05 15:54:25 +02:00