3 Commits

Author SHA1 Message Date
Jerin Jacob
6e757e6942 config: clean cache line size selection scheme
by default, all the targets will be configured with the 64-byte cache line
size, targets which have different cache line size can be overridden
through target specific config file.

Selected ThunderX and power8 as CONFIG_RTE_CACHE_LINE_SIZE=128 targets
based on existing configuration.

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-02-11 12:45:35 +01:00
Jerin Jacob
da8dcc27f6 hash: use armv8-a CRC32 instructions
armv8-a has optional CRC32 extension, march=armv8-a+crc enables code
generation for the ARMv8-A architecture together with
the optional CRC32 extensions.

added RTE_MACHINE_CPUFLAG_CRC32 to detect the availability of
CRC32  extension in compile time. At run-time, The RTE_CPUFLAG_CRC32
can be used to find the availability.

armv8-a+crc target support added in GCC 4.9,
Used inline assembly and emulated __ARM_FEATURE_CRC32 to work
with tool-chain < 4.9

Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-25 22:13:15 +01:00
Jerin Jacob
b3ce00e5fe mk: introduce ARMv8 architecture
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-18 22:44:01 +01:00