28058 Commits

Author SHA1 Message Date
Chengwen Feng
40cc23b0f0 net/hns3: remove unused mailbox macro and struct
In hns3_mbx.h, some macro and structure were defined in previous
versions but never used.

Fixes: 463e748964f5 ("net/hns3: support mailbox")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-26 14:50:33 +02:00
Chengwen Feng
4a2f6ab6fb net/hns3: fix processing link status message on PF
The opcode of the link status notification message reported by the
firmware is zero, it will be filtered out because driver treats it as
already processed message. As a result, the PF can't update the link
status in a timely manner.

Because only VF can set opcode to zero when processing mailbox message,
we add a judgment to make sure the PF messages will not be filtered out.

Fixes: dbbbad23e380 ("net/hns3: fix VF handling LSC event in secondary process")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-26 14:50:33 +02:00
Chengwen Feng
871aa63542 net/hns3: fix mailbox error message
The hns3_dev_handle_mbx_msg() could be called under both PF and VF,
but the error messages show VF.

Fixes: 109e4dd1bd7a ("net/hns3: get link state change through mailbox")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-04-26 14:50:33 +02:00
Ferruh Yigit
d345d6c957 drivers/net: fix FW version query
Fixes a few different things:
* Remove 'fw_version' NULL checks, it is allowed if the 'fw_size' is
  zero, 'fw_version' being NULL but 'fw_size' not zero condition checked
  in ethdev layer
* Be sure required buffer size is returned if provided one is not big
  enough, instead of returning success (0)
* Document in doxygen comment the '-EINVAL' is a valid return type
* Take into account that 'snprintf' can return negative value
* Cast length to 'size_t' to compare it with 'fw_size'

Fixes: bb42aa9ffe4e ("net/atlantic: configure device start/stop")
Fixes: ff70acdf4299 ("net/axgbe: support reading FW version")
Fixes: e2652b0a20a0 ("net/bnxt: support get FW version")
Fixes: cf0fab1d2ca5 ("net/dpaa: support firmware version get API")
Fixes: 748eccb97cdc ("net/dpaa2: add support for firmware version get")
Fixes: b883c0644a24 ("net/e1000: add firmware version get")
Fixes: 293430677e9c ("net/enic: add handler to return firmware version")
Fixes: 1f5ca0b460cd ("net/hns3: support some device operations")
Fixes: bd5b86732bc7 ("net/hns3: modify format for firmware version")
Fixes: ed0dfdd0e976 ("net/i40e: add firmware version get")
Fixes: e31cb9a36298 ("net/ice: support FW version getting")
Fixes: 4f09bc55ac3d ("net/igc: implement device base operations")
Fixes: eec10fb0ce6b ("net/ionic: support FW version")
Fixes: 8b0b56574269 ("net/ixgbe: add firmware version get")
Fixes: 4d9f5b8adc02 ("net/octeontx2: add FW version get operation")
Fixes: f97b56f9f12e ("net/qede: support FW version query")
Fixes: 83fef46a22b2 ("net/sfc: add callback to retrieve FW version")
Fixes: bc84ac0fadef ("net/txgbe: support getting FW version")
Fixes: 21913471202f ("ethdev: add firmware version get")
Cc: stable@dpdk.org

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
Acked-by: Jiawen Wu <jiawenwu@trustnetic.com>
Acked-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-04-26 13:50:42 +02:00
Chengwen Feng
e413a12551 net/txgbe: fix flow error message object
This patch fixes parameter misusage when set rte flow action error.

Fixes: b7eeecb17556 ("net/txgbe: parse n-tuple filter")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-26 12:48:17 +02:00
Hongbo Zheng
86f66ff10d net/txgbe: fix memset type
Fix memset type error in function txgbe_parse_rss_filter
while clear rss_conf buffer.

Fixes: 7a6d87fb8398 ("net/txgbe: parse RSS filter")
Cc: stable@dpdk.org

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-26 12:37:23 +02:00
Chengwen Feng
7fa949fd11 net/kni: check init result
This patch adds checking for rte_kni_init() result.

Fixes: 75e2bc54c018 ("net/kni: add KNI PMD")
Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-04-26 12:17:39 +02:00
Chaoyong He
8202309f9f doc: fix multiport syntax in nfp guide
Fix up the suffix of the PCI ID to be consistent with the code.

Fixes: 979f2bae0714 ("doc: improve multiport PF in nfp guide")
Cc: stable@dpdk.org

Signed-off-by: Chaoyong He <chaoyong.he@corigine.com>
Signed-off-by: Heinrich Kuhn <heinrich.kuhn@netronome.com>
2021-04-26 11:39:08 +02:00
Anatoly Burakov
7f15f0fbed power: save original ACPI governor always
Currently, when we set the acpi governor to "userspace", we check if
it is already set to this value, and if it is, we skip setting it.

However, we never save this value anywhere, so that next time we come
back and request the governor to be set to its original value, the
original value is empty.

Fix it by saving the original pstate governor first. While we're at it,
replace `strlcpy` with `rte_strscpy`.

Fixes: 445c6528b55f ("power: common interface for guest and host")
Cc: stable@dpdk.org

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Acked-by: Reshma Pattan <reshma.pattan@intel.com>
2021-05-05 12:29:12 +02:00
Hongbo Zheng
cdcee2ec9b bpf: fix JSLT validation
In function 'eval_jcc', judgment 'op == EBPF_JLT' occurs
twice, as a result, the corresponding second statement
cannot be accessed.

This patch fix this problem.

Fixes: 8021917293d0 ("bpf: add extra validation for input BPF program")
Cc: stable@dpdk.org

Signed-off-by: Hongbo Zheng <zhenghongbo3@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-05-05 12:22:30 +02:00
Konstantin Ananyev
8e2dd74f0a acl: fix build with GCC 11
gcc 11 with '-O2' complains about some variables being used without
being initialized:

In function ‘start_flow_avx512x8’,
    inlined from ‘search_trie_avx512x8.constprop’ at acl_run_avx512_common.h:317:
lib/librte_acl/acl_run_avx512_common.h:210:13: warning:
    ‘pdata’ is used uninitialized [-Wuninitialized]
In function ‘search_trie_avx512x8.constprop’:
lib/librte_acl/acl_run_avx512_common.h:314:32: note: ‘pdata’ declared here
...

Indeed, these variables are not explicitly initialized,
but this is done intentionally.
We rely on constant mask value that we pass to start_flow*() functions
as a parameter to mask out uninitialized values.
Note that '-O3' doesn't produce this warning.
Anyway, to support clean build with gcc-11 this patch adds
explicit initialization for these variables.
I checked the output binary: with '-O3' both clang and gcc 10/11
generate no extra code for it.
Also performance test didn't reveal any regressions.

Bugzilla ID: 673
Fixes: b64c2295f7fc ("acl: add 256-bit AVX512 classify method")
Fixes: 45da22e42ec3 ("acl: add 512-bit AVX512 classify method")
Cc: stable@dpdk.org

Reported-by: Ali Alnubani <alialnu@nvidia.com>
Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
2021-05-05 12:10:15 +02:00
Shijith Thotton
8a3d58c189 event/cnxk: add option to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:1e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:45:52 +02:00
Shijith Thotton
9db9330a71 event/cnxk: add timer adapter start and stop
Add event timer adapter start and stop functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:38:52 +02:00
Shijith Thotton
853623b9e5 event/cnxk: add timer stats
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:1e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:31:48 +02:00
Pavan Nikhilesh
20dc782a32 event/cnxk: add timer cancel
Add function to cancel event timer that has been armed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:24:44 +02:00
Pavan Nikhilesh
5f644e1bd1 event/cnxk: add timer arm timeout burst
Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:17:41 +02:00
Pavan Nikhilesh
300b796262 event/cnxk: add timer arm routine
Add event timer arm routine.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:10:32 +02:00
Pavan Nikhilesh
a353039018 event/cnxk: add TIM bucket operations
Add TIM bucket operations used for event timer arm and cancel.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 08:03:18 +02:00
Shijith Thotton
a66fa85668 event/cnxk: add options for timer chunk size and rings
Add devargs to control default chunk size and max numbers of
timer rings to attach to a given RVU PF.

Example:
	--dev "0002:1e:00.0,tim_chnk_slots=1024"
	--dev "0002:1e:00.0,tim_rings_lmt=4"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:56:05 +02:00
Shijith Thotton
9891f76b60 event/cnxk: add timer adapter info query
Add TIM event timer adapter info get function.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:49:05 +02:00
Pavan Nikhilesh
d9c93f1d9a event/cnxk: allow adapters to resize in-flights
Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:42:03 +02:00
Pavan Nikhilesh
1b06a817b8 event/cnxk: add option to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:35:00 +02:00
Shijith Thotton
0e792433d0 event/cnxk: create and free timer adapter
When the application calls timer adapter create the following is used:
- Allocate a TIM LF based on number of LF's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
	* Buckets based on min and max timeout supplied.
	* Allocate the chunk pool based on the number of timers.

On Free:
	- Free the allocated bucket and chunk memory.
	- Free the TIM lf allocated.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:27:59 +02:00
Shijith Thotton
dd519f83dd event/cnxk: add timer adapter capabilities
Add function to retrieve event timer adapter capabilities.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:20:58 +02:00
Shijith Thotton
3d9a7181e4 event/cnxk: support timer
Add event timer adapter a.k.a TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 07:13:54 +02:00
Pavan Nikhilesh
b5a52c9d97 event/cnxk: add event port and queue xstats
Add support for retrieving statistics from SSO HWS and HWGRP.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 07:06:53 +02:00
Pavan Nikhilesh
2351506401 event/cnxk: add SSO selftest and dump
Add selftest to verify sanity of SSO and also add function to
dump internal state of SSO.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:59:52 +02:00
Shijith Thotton
5b4576e2df event/cnxk: add device stop and close
Add event device stop and close callback functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:52:50 +02:00
Shijith Thotton
910da32c53 event/cnxk: add device start
Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:45:55 +02:00
Pavan Nikhilesh
6c04198af4 event/cnxk: add SSO GWS dequeue fast path
Add SSO GWS event dequeue fastpath functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:38:56 +02:00
Pavan Nikhilesh
47ef22f794 event/cnxk: add SSO GWS enqueue fast path
Add SSO GWS fastpath event device enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:31:42 +02:00
Pavan Nikhilesh
e239e0d3fa event/cnxk: add SSO HW device operations
Add SSO HW device operations used for enqueue/dequeue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:24:26 +02:00
Pavan Nikhilesh
7ffa737996 event/cnxk: add option to configure getwork mode
Add devargs to configure the platform specific getwork mode.

CN9K getwork mode by default is set to use dual workslot mode.
Add option to force single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

CN10K supports multiple getwork prefetch modes, by default the
prefetch mode is set to none.
Add option to select getwork prefetch mode
Example:
	--dev "0002:1e:00.0,gw_mode=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 06:17:19 +02:00
Shijith Thotton
6223ede203 event/cnxk: add event port link and unlink
Add platform specific event port, queue link and unlink APIs.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:10:17 +02:00
Shijith Thotton
97a05c1fe6 event/cnxk: add port config
Add SSO HWS a.k.a event port setup and release functions.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 06:03:17 +02:00
Shijith Thotton
38c2e3240b event/cnxk: add option to control SSO HWGRP QoS
SSO HWGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO HWGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to HWGRPs based on a preconfigured threshold.
We can control the QoS of SSO HWGRP by modifying the above mentioned
thresholds. HWGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
        --dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:56:16 +02:00
Shijith Thotton
e656d40fd1 event/cnxk: add option for in-flight buffer count
The number of events for a *open system* event device is specified
as -1 as per the eventdev specification.
Since, SSO inflight events are only limited by DRAM size, the
xae_cnt devargs parameter is introduced to provide upper limit for
in-flight events.

Example:
        --dev "0002:0e:00.0,xae_cnt=8192"

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:49:19 +02:00
Pavan Nikhilesh
b85105230d event/cnxk: allocate event in-flight buffers
Allocate buffers in DRAM that hold inflight events.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:42:18 +02:00
Shijith Thotton
d3408a33bc event/cnxk: add event queue config
Add setup and release functions for event queues i.e.
SSO HWGRPs.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:35:21 +02:00
Shijith Thotton
b417f23252 event/cnxk: add platform specific device config
Add platform specific event device configuration that attaches the
requested number of SSO HWS(event ports) and HWGRP(event queues) LFs
to the RVU PF/VF.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:28:24 +02:00
Pavan Nikhilesh
5512c7de85 event/cnxk: add common configuration validation
Add configuration validation, port and queue configuration
functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:21:25 +02:00
Pavan Nikhilesh
95f42ef92c event/cnxk: add platform specific device probe
Add platform specific event device probe and remove, also add
event device info get function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
2021-05-04 05:14:24 +02:00
Shijith Thotton
334883ffa5 event/cnxk: add device capabilities
Add the info_get function to return details on the queues, flow,
prioritization capabilities, etc. which this device has.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 05:07:25 +02:00
Pavan Nikhilesh
8558dcaa05 event/cnxk: add build infra and device setup
Add meson build infra structure along with the event device
SSO initialization and teardown functions.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
2021-05-04 05:00:18 +02:00
Pavan Nikhilesh
5787cf0cbb common/cnxk: update inline asm prefix
Update inline asm prefix to prevent overriding cpu type, instead express
the additional extensions required.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 04:53:03 +02:00
Pavan Nikhilesh
da54e60991 common/cnxk: rename deprecated PCI constant
The PCI_ANY_ID constant is deprecated and renamed as RTE_PCI_ANY_ID.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2021-05-04 04:45:53 +02:00
Timothy McDaniel
000a7b8e75 event/dlb2: optimize dequeue operation
Convert code to use x86 vector instructions, thereby significantly
improving dequeue performance.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
Signed-off-by: Harry van Haaren <harry.van.haaren@intel.com>
2021-05-03 14:21:23 +02:00
Timothy McDaniel
7c6cc633fc doc: update guide for DLB v2.5
Update the dlb documentation for v2.5. Notable differences include
the new cobined credit scheme. Also cleaned up a couple of sections,
and removed a duplicate section.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00
Timothy McDaniel
7be66a3b9d event/dlb2: update config defines as runtime options
The new devarg names and their default values
are listed below. The defaults have not changed, and
none of these parameters are accessed in the fast path.

poll_interval=1000
sw_credit_quantai=32
default_depth_thresh=256

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00
Timothy McDaniel
37e741d454 event/dlb2: update xstats for v2.5
Add DLB v2.5 specific information to xstats, such as metrics for the new
credit scheme.

Signed-off-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-05-03 11:46:31 +02:00