Commit Graph

29362 Commits

Author SHA1 Message Date
Qi Zhang
5889905bab net/ice/base: support TC nodes PIR configuration
TC nodes CIR configuration is not supported. In order to configure PIR,
the corresponding adminq command should not include the flag for CIR.
Since the TC node info has this flag by default, it is supposed to delete
this flag for TC nodes before sending the adminq command.

Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:41 +02:00
Qi Zhang
871bda1270 net/ice/base: refine MAC rule adding
Move replay_pre_init function to interface.
Add further MAC rules, despite unicast address is already on list.

Signed-off-by: Marcin Domagala <marcinx.domagala@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:35 +02:00
Qi Zhang
8cb3d9dfc6 net/ice/base: add new AQ description
Add ice_aqc_sw_gpio struct to ice_aq_desc
This change allows us to do SW_GPIO AQ cmd transactions
over ice_aq_send_cmd() interface.

Signed-off-by: Siddaraju DH <siddaraju.dh@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:31 +02:00
Qi Zhang
553fd7a7ae net/ice/base: implement firmware debug dump
Basic implementation of FW Debug Dump.

Signed-off-by: Marcin Domagala <marcinx.domagala@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:26 +02:00
Qi Zhang
e4a0ac89b0 net/ice/base: add E810T check function
Add function ice_is_e810t() to be able to distinguish if hardware is
E810T based or not.

Signed-off-by: Michal Michalik <michal.michalik@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:22 +02:00
Qi Zhang
6f71d4978a net/ice/base: support starting PHY in bypass mode
After starting the timestamping block, hardware begins calculating
precise offsets through a process of vernier calibration. This process
measures the effective phase offset of the various internal clocks used
in the PHY.

Once hardware completes these measurements, the P_REG_TX_OV_STATUS and
P_REG_RX_OV_STATUS registers are updated to indicate that the hardware
offset measurements are done.

This process does not happen immediately, but requires that at least one
packet be sent or received in order for the offset in that direction to
be calculated.

This poses a problem in some setups, because software expects the first
packet sent to be timestamped. This most often occurs if the clock time
is set by an application during startup. This set time command triggers
a PHY restart. Because of this, the timestamping block is reset, and
timestamps are not enabled until vernier calibration is complete. Since
this process won't complete until at least one packet is sent through
the PHY, timestamps of the very first packet sent will not be obtained.

This can result in the application failing due to missing timestamps.

To avoid this, allow starting the PHY in bypass mode. This mode enables
timestamps immediately, and skips adding the precise offset measurement.
This reduces the accuracy of the timestamp slightly, but ensures that we
get a reasonable value for the first packet.

The driver can continue monitoring the P_REG_TX_OV_STATUS and
P_REG_RX_OV_STATUS registers and exit bypass mode once the total
calibration is completed. In this way, once calibration is complete, the
timestamps will have the precise offset, but we do not break
applications which expect to be able to timestamp immediately.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:18 +02:00
Qi Zhang
a3f1d0e4fc net/ice/base: clarify comments on checking PFC mode
Rework the comment around checking PFC mode to make it clear why we are
checking the mode after sending the command.

Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:13 +02:00
Qi Zhang
ca3feb9036 net/ice/base: implement Vernier calibration for E822
Move the implementation of Vernier calibration from Linux core ice_ptp.c
into the shared ice_ptp_hw.c file.

This implementation was recently refactored in Linux, so the move should
be verbatim with the latest Linux code that we had implemented.

This includes a new constant table with pre-determined values based on
link speed, new functions to aide in reading the multi-register values
from the PHY, functions to program the PAR/PCS conversion ratios, and
the UIX conversion ratios, functions to program the total Tx and Rx
offset after vernier calibration in the hardware completes, and finally
a function to start and stop the PHY timestamping block.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:08 +02:00
Qi Zhang
886b8115fc net/ice/base: print human-friendly PHY types
Add functions to print PHY types in human-friendly form

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:24:03 +02:00
Qi Zhang
25c8802a2e net/ice/base: add accessors to get/set time reference
The E822 device clock might come from a variety of different sources,
called TIME_REFs. The firmware reports the current TIME_REF as part of
its function capabilities, which the driver caches when it loads.

Add an accessor function to look up the current TIME_REF from the
capabilities. This reduces line length significantly and also avoids
a tight coupling to the capabilities structure.

In some cases, TIME_REF might change at run time. This can occur in the
event that the CGU registers are updated. When this happens, its
possible that the capabilities structure can be out of date until the
capabilities are re-read.

Add a setter function to update the TIME_REF when this occurs. The
driver can call this function after updating the CGU to ensure that the
TIME_REF in the capabilities structure is up to date, without needing to
re-read the entire capabilities from firmware.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:59 +02:00
Qi Zhang
200df241d4 net/ice/base: add clock initialization function
Before the device PTP hardware clock can be initialized, some steps must
be taken by the driver. This includes writing some registers and
initializing the PHY.

Some of these steps are distinct depending on the device type (E810 or
E822). Additionally, a future change will introduce more steps for E822
devices to program the Clock Generation Unit.

Introduce ice_ptp_init_phc as well as device-specific sub-functions for
e810 and e822 devices.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:54 +02:00
Qi Zhang
275e88b0cf net/ice/base: add timestamp masks
Adding macros for shift and masking of the lower timestamp work in the
Rx flex descriptor. The LSB of the timestamp-low word indicates the
validity of the timestamp while the rest 7 bits contain the timestamp.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:45 +02:00
Qi Zhang
21bc183b68 net/ice/base: change dummy packets with VLAN
Ethertype was traded as VLAN tpid in dummy packets with VLAN.
This led to a problem when user wanted to add filter for VLAN and
ethertype.

Change ice_vlan_hdr to reflect correct order of VLAN fields in
packets (VLAN tpid, VLAN id). Correct all dummy packets with VLAN.
Move VLAN fields before ethertype and change offsets. Leave values
from dummy packets unchanged as they fit to new VLAN layout.

Order of offsets in ice_prot_ext_tbl_entry for VLAN protocol should
reflect order of fields in ice_vlan_hdr. However, hardware doesn't
support matching on all tpid. This should be done by matching on
packet flags. There is no FV word with protocol for VLAN and offset
2. Because of that, adding vlan tpid with not zero mask will lead
to error in creating recipe.

Signed-off-by: Michal Swiatkowski <michal.swiatkowski@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:38 +02:00
Qi Zhang
e0f9aa39fb net/ice/base: add ethertype IPv6 check for dummy packet
In order to support switch rule for ethertype filter
with ipv6 ethertype id, it has to check ethertype and
then find a proper dummy packet. There was a silent
assumption that packet is ipv4, unless src or dst ipv6
address is specified in a flow.

Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:23 +02:00
Qi Zhang
97f4f78bbd net/ice/base: add functions for device clock control
The ice hardware supports exposing a hardware clock for high precision
timestamping. This is primarily intended for accelerating the Precision
Time Protocol.

Add several low level functions intended to be used as the basis for
enabling the device clock, and ensuring that the port timers are
synchronized properly.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:18 +02:00
Qi Zhang
c9d0fccff0 net/ice/base: add IEEE 1588 capability probing
Parse 1588 timesync capability during device capability probing.

Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Junfeng Guo <junfeng.guo@intel.com>
2021-08-11 04:23:10 +02:00
Ruifeng Wang
1a3f6cde64 net/i40e: fix clang warning on non-x86
Build on aarch64 with clang-10 has warning:
i40e_rxtx.c:3228:1:
	warning: unused function 'get_avx_supported' [-Wunused-function]

The function is used in x86 specific path. Moved it into ifdef
to fix build on non-x86.

Fixes: c30751afc3 ("net/i40e: fix data path selection in secondary process")
Cc: stable@dpdk.org

Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-10 09:48:33 +02:00
Wenjun Wu
72908beba9 net/ice: fix priority of DCF switch rule
This patch fixes the reversed priority of DCF switch rule. Priority 0
and 1 are supported, and priority 0 should be the highest priority.

Fixes: 2321e34c23 ("net/ice: support flow priority for DCF switch filter")
Cc: stable@dpdk.org

Signed-off-by: Wenjun Wu <wenjun1.wu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-08-10 05:06:19 +02:00
Feifei Wang
319df9f9bf net/i40e: reduce L1 cache misses in NEON Rx
For N1 platform, packet mbuf load and descs load are hot spots to limit
the performance for "desc_to_ptype_v" and "desc_to_olflags_v" functions
in i40e rx NEON path. This is because packet mbuf and descs are evicted
from l1d-cache to l2d-cache.

To reduce l1d-cache-misses and improve the performance, change the code
order and move "desc_to_ptype_v" and "desc_to_olflags_v" functions
forward to the location, where packet mbuf and descs are just loaded.

Test Result:
dpdk:21.08-rc1
gcc-9
For n1sdp, the patch improves the performance by 1.8%.
For thunderx2, no performance changes.

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:02:16 +02:00
Feifei Wang
decc3b6aa5 net/i40e: increase readability in NEON Rx
Rearrange the code in logical order for better readability and
maintenance convenience in Rx NEON path.

No performance change with this patch in arm platform.

Suggested-by: Joyce Kong <joyce.kong@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:02:10 +02:00
Feifei Wang
4f76ac98b7 drivers/net: fix vector Rx comments
For the loop to process packets in Rx vector path, some notes for the
code are wrong, fix these errors.

Fixes: 7092be8437 ("fm10k: add vector Rx")
Fixes: c3def6a872 ("net/i40e: implement vector PMD for altivec")
Fixes: ae0eb310f2 ("net/i40e: implement vector PMD for ARM")
Fixes: 9ed94e5bb0 ("i40e: add vector Rx")
Fixes: 319c421f38 ("net/avf: enable SSE Rx Tx")
Fixes: 1162f5a0ef ("net/iavf: support flexible Rx descriptor in SSE path")
Fixes: c68a52b8b3 ("net/ice: support vector SSE in Rx")
Fixes: cf4b4708a8 ("ixgbe: improve slow-path perf with vector scattered Rx")
Cc: stable@dpdk.org

Suggested-by: Ruifeng Wang <ruifeng.wang@arm.com>
Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:01:57 +02:00
Feifei Wang
635a9373fa drivers/net: fix typo in vector Rx comment
In Rx vec path, for extracting and recording EOP bit, comment has
redundant "count" word, removing it.

Fixes: 7092be8437 ("fm10k: add vector Rx")
Fixes: c3def6a872 ("net/i40e: implement vector PMD for altivec")
Fixes: ae0eb310f2 ("net/i40e: implement vector PMD for ARM")
Fixes: 9ed94e5bb0 ("i40e: add vector Rx")
Fixes: 319c421f38 ("net/avf: enable SSE Rx Tx")
Fixes: 1162f5a0ef ("net/iavf: support flexible Rx descriptor in SSE path")
Fixes: c68a52b8b3 ("net/ice: support vector SSE in Rx")
Fixes: cf4b4708a8 ("ixgbe: improve slow-path perf with vector scattered Rx")
Cc: stable@dpdk.org

Signed-off-by: Feifei Wang <feifei.wang2@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-08-10 05:01:48 +02:00
Dmitry Kozlyuk
bfd3c352eb build: fix install from any directory with Meson 0.55
Install command on Windows for Meson >= 0.55.0 referenced the script
by a plain string, assuming the build directory to be directly under
the source tree root.
This resulted in an error when the assumption did not hold:

    c:\python\python.exe: can't open file
    '../buildtools/symlink-drivers-solibs.py':
    [Errno 2] No such file or directory

Use files() to make a valid script path for any build directory.

Fixes: cd27047dbe ("build: support drivers symlink on Windows")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dmitry.kozliuk@gmail.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
Acked-by: Nick Connolly <nick.connolly@mayadata.io>
2021-08-27 21:42:25 +02:00
Jerin Jacob
1539acc20a drivers: remove warning with Meson 0.59
Since meson 0.59.0 version, the extract_all_objects() API
need to pass explicit boolean value.

To remove the following warning[1], added explicit `true` for
extract_all_objects() use in codebase whever there is
no argument.

[1]
WARNING: extract_all_objects called without setting recursive
keyword argument. Meson currently defaults to
non-recursive to maintain backward compatibility but
the default will be changed in the future.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2021-08-27 15:51:34 +02:00
Jerin Jacob
5e184c4cc7 examples/performance-thread: fix build with clang 12.0.1
In clang 12.0.1 version, the use of pthread_yield() is deprecated,
use sched_yield() instead.

log:
    examples/performance-thread/pthread_shim/main.c:75:9: warning:
    'pthread_yield' is deprecated: pthread_yield is deprecated,
    use sched_yield instead [-Wdeprecated-declarations]

Bugzilla ID: 745
Fixes: 433ba6228f ("examples/performance-thread: add pthread_shim app")
Cc: stable@dpdk.org

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Tested-by: Ali Alnubani <alialnu@nvidia.com>
2021-08-27 13:40:23 +02:00
Thomas Monjalon
fdab8f2e17 version: 21.11-rc0
Start a new release cycle with empty release notes.

The ABI version becomes 22.0.
The map files are updated to the new ABI major number (22).
The ABI exceptions are dropped and CI ABI checks are disabled because
compatibility is not preserved.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: David Marchand <david.marchand@redhat.com>
2021-08-17 08:37:52 +02:00
Thomas Monjalon
4ac3f3d76e version: 21.08.0
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-08-08 17:23:21 +02:00
Radu Nicolau
293e836ea5 doc: announce changes in IPsec xform structure
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-08 17:15:04 +02:00
Radu Nicolau
132293cb74 doc: announce change in IPsec SA structure
Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-08 17:03:53 +02:00
Akhil Goyal
eed159074e doc: announce hiding crypto session structures
The structures rte_cryptodev_sym_session and
rte_cryptodev_asym_session are not used by the
application directly. The application just need
an opaque pointer which it can attach to rte_crypto_op
while enqueue.
Hence, these structures can be internal to library
hidden from the user.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-08-08 10:10:19 +02:00
Andrew Rybchenko
80ab563ba9 doc: announce clarification of implicit filter by port
Transfer flow rules may be applied to traffic entering switch from
many sources. There are flow API pattern items which allow to specify
ingress port match criteria explicitly, but it is not documented
if ethdev port used to create flow rule adds any implicit match
criteria and how it coexists with explicit ones.

These aspects should be documented and drivers and applications
which use it in a different way must be fixed.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-08-07 23:08:09 +02:00
Andrew Rybchenko
a1c047817e doc: announce change in ethdev flow action port ID
By its very name, action PORT_ID means that packets hit an ethdev with the
given DPDK port ID. At least the current comments don't state the opposite.

However some drivers implement it in a different way and direct traffic to
the opposite end of the "wire" plugged to the given ethdev. For example in
the case of a VF representor traffic is redirected to the corresponding VF
itself rather than to the representor ethdev and OvS uses PORT_ID action
this way.

The documentation must be clarified and, likely, rte_flow_action_port_id
structure should be extended to support both meanings.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Ori Kam <orika@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-08-07 22:57:32 +02:00
Ori Kam
08ed3c0876 doc: announce moving ethdev actions to general modify
Currently there is a dedicated modify action for each
packet field that the application wants to change.
For example:
RTE_FLOW_ACTION_TYPE_SET_IPV4_DST to modify destination of IPv4.

A new action RTE_FLOW_ACTION_TYPE_MODIFY_FIELD added the ability
to use the same action to modify any field, in addition to be able to
modify the value based on different field and not just immediate value.

Signed-off-by: Ori Kam <orika@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-08-07 21:47:57 +02:00
Ori Kam
2ba49b5f37 doc: announce change to ethdev modify action data
In the current implementation,
the action rte_flow_action_modify_field is not well defined
for fields larger than 64 bits (for example IPv6 source)
In addition, the byte order is also not well defined.

Both of those issue should be fixed.

Signed-off-by: Ori Kam <orika@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-08-07 21:47:09 +02:00
Xueming Li
6694fa4ba2 doc: announce ethdev flag and field for shared queue
To support shared Rx queue, this patch announces new offload flag
RTE_ETH_RX_OFFLOAD_SHARED_RXQ and new shared_group field to struct
rte_eth_rxconf in DPDK v21.11.

[1] mail list discussion:
https://mails.dpdk.org/archives/dev/2021-July/215575.html

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-08-07 21:22:00 +02:00
Maxime Coquelin
9bfa4434db doc: announce renaming of vhost operations struct
This patch announces the renaming of struct
vhost_device_ops to rte_vhost_device_ops in DPDK v21.11.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Adrian Moreno <amorenoz@redhat.com>
Acked-by: Marvin Liu <yong.liu@intel.com>
2021-08-07 20:26:07 +02:00
Maxime Coquelin
d0a3685b53 doc: announce marking vDPA driver interface as internal
This patch announces the marking of all the vDPA driver APIs
as internal.

Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Acked-by: Marvin Liu <yong.liu@intel.com>
2021-08-07 20:24:15 +02:00
Chenbo Xia
0304f26353 doc: announce promoting some vhost API to stable
This patch announces the experimental tag removal of 10 vhost APIs,
which have been experimental for more than 2 years.
All APIs could be made stable in DPDK 21.11.

Signed-off-by: Chenbo Xia <chenbo.xia@intel.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Marvin Liu <yong.liu@intel.com>
2021-08-07 19:41:26 +02:00
Archana Muniganti
0c79906add doc: announce changes in IPsec SA config option struct
Propose new fields to support offloads like
- IPsec inner checksum(L3/L4)
- IPsec tunnel header verification
- TSO
- etc
in the structure ``rte_security_ipsec_sa_options``.

Signed-off-by: Archana Muniganti <marchana@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-08-07 19:18:56 +02:00
Anoob Joseph
a1c6cc8843 doc: announce changes in IPsec xform struct
IPsec xform struct would be updated to include IPsec SA lifetime
configuration. The existing member 'esn_soft_limit' would only track
ESN. And as sequence number control is getting introduced,
'esn_soft_limit' may not indicate the number of packets processed.
Replace that with a new structure to cover all lifetime cases with
support for specifying both soft and hard lifetimes.

ESN control introduced by https://patches.dpdk.org/patch/95808/

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-08-07 19:18:50 +02:00
Akhil Goyal
0182a03d00 doc: announce changes in security session struct
The structure rte_security_session is not directly used
by the application. The application just need an opaque
pointer to attached to the mbuf or rte_crypto_op while
enqueue. Hence, it can be hidden inside the library
and would prevent unnecessary indirection to the priv
session data in fastpath.

Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-08-07 19:07:06 +02:00
Hemant Agrawal
72bdb18dd6 doc: announce changes in crypto raw data vector
The current crypto raw data vectors need to be extended to support
out of place processing. It is proposed to add additional desl_sgl
to provide details for destination sgl.
The same is also extended to support rte_security usecases, where
we need total data length to know how much additional memory space
is available in buffer other than data length so that driver/HW
can write expanded size data after encryption.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-08-07 17:16:40 +02:00
Shijith Thotton
d65409a9a0 doc: announce change in crypto adapter metadata
In crypto adapter metadata, first 8 bytes of request info is a space
holder for response info. For better clarity, reserved field should be
removed from request info. New space for response info can be made by
changing type of event crypto metadata to structure from union.

Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-08-07 17:09:44 +02:00
Honnappa Nagarahalli
deb554704d doc: announce removal of lcore state finished
Lcore state FINISHED is used by the worker thread to indicate that
it has completed the assigned task. The state is changed to
WAIT by another thread after it observes the updated state. This
additional step is redundant. After this deprecation, the worker
thread will update the state to WAIT.

Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Feifei Wang <feifei.wang2@arm.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-08-07 17:09:37 +02:00
John McNamara
b162e6f30f doc: update release notes for 21.08
Fix grammar, spelling and formatting of DPDK 21.08 release notes.

Signed-off-by: John McNamara <john.mcnamara@intel.com>
2021-08-06 16:51:45 +02:00
Thomas Monjalon
e08fcd7f9b doc: add known issue with mbuf segment
A bug with segmented packets has been discovered but the agreement
to apply the fix is not concluded at the time of DPDK 21.08 release.
This bug seems to be in DPDK for many years and should be fixed in 21.11.

Suggested-by: Olivier Matz <olivier.matz@6wind.com>
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Acked-by: Morten Brørup <mb@smartsharesystems.com>
2021-08-06 16:20:44 +02:00
Pavan Nikhilesh
caa9d93b7d doc: announce changes to eventdev library
Make driver layer as internal, remove unnecessary rte_ prefix for
structures and functions that are not a part of public API.
Promote experimental trace and vector APIs to stable.
Add reserved field to `rte_event_timer` structure.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
Acked-by: Jay Jayatheerthan <jay.jayatheerthan@intel.com>
Acked-by: Abhinandan Gujjar <abhinandan.gujjar@intel.com>
2021-08-05 16:19:30 +02:00
Gregory Etelson
8f6c921b6a net/mlx5: fix build on Windows
mlx5_dev_check_sibling_config() API was updated to allow newly
spawned port locate existing sibling devices.
PMD port initialization for Windows OS was not updated
for the new API prototype:

drivers/net/mlx5/windows/mlx5_os.c:457:50: error:
too few arguments to function call, expected 3, have 2
	err = mlx5_dev_check_sibling_config(priv, config);

The patch fixes mlx5_dev_check_sibling_config call for Windows OS.

Fixes: e9d420dfc2 ("net/mlx5: fix find sibling devices")

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-08-05 12:48:16 +02:00
Thomas Monjalon
c97a849252 version: 21.08-rc4
Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2021-08-04 18:49:16 +02:00
Anoob Joseph
e67d742b21 doc: announce cryptodev operation struct changes
One reserved byte in rte_crypto_op struct would be used to indicate
warnings and other information from the crypto/security operation. This
field will be used to communicate events such as soft expiry with IPsec
in lookaside mode.

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2021-08-04 18:30:09 +02:00