Commit Graph

17064 Commits

Author SHA1 Message Date
Xueming Li
926629e3f3 bus: fix device iterator match from arguments
Device iterator RTE_DEV_FOREACH() failed to return devices from
classifier like "class=vdpa", because matching name from empty kvargs
returns no result. If device name not specified in kvargs, the function
should iterate all devices.

This patch allows empty devargs or devargs without name specified.

Fixes: 6aebb94290 ("kvargs: add function to get from key and value")

Signed-off-by: Xueming Li <xuemingl@nvidia.com>
Signed-off-by: Olivier Matz <olivier.matz@6wind.com>
Acked-by: Xueming Li <xuemingl@nvidia.com>
2021-11-24 15:11:42 +01:00
David Marchand
8d5774d02f bus/auxiliary: fix device iteration
rte_kvargs_parse() expects a NULL terminated keys array.

Fixes: 1afce3086c ("bus/auxiliary: introduce auxiliary bus")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Xueming Li <xuemingl@nvidia.com>
2021-11-24 15:11:42 +01:00
Gagandeep Singh
8f4125c1bf drivers/crypto: return error for not supported SA lifetime
dpaa, dpaa2 and caam_jr drivers do not support
SA expiry. This result in failure of test cases in
test app. This patch returns ENOTSUP to skip the
SA lifetime test cases.

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-23 19:48:28 +01:00
Gagandeep Singh
0aa5986c28 drivers/crypto: fix IPsec TTL decrement option
dpaa, dpaa2 and caam_jr drivers decrement the inner IP header
TTL for all packets and ignoring the dec_ttl option of SA.

In this patch, using the dec_ttl to decide to decrement the
packets inner IP header TTL or not.

Fixes: 0a23d4b6f4 ("crypto/dpaa2_sec: support protocol offload IPsec")
Fixes: 3e33486f80 ("crypto/caam_jr: add security offload")
Fixes: 1f14d500bc ("crypto/dpaa_sec: support IPsec protocol offload")
Cc: stable@dpdk.org

Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-11-23 19:44:34 +01:00
Raja Zidane
150837248f crypto/mlx5: fix maximum number of queue pairs
An indirect mkey is created for each descriptor in a QP, number of
descriptors per QP is configured by the user on QP setup callback.
In mlx cryptodev autotest, the max number of QPs (provided by the driver)
is created, and due to mkey resource limits, QPs creation fail which leads
to the test failing.
Since there is no capability of max number of descriptors provided to
the user, we can't give an exact number of max QPs available.
Reduce the max number of QPs to 128, which supports standard descriptors
numbers, including the 4K number provided in the test.

Fixes: 6152534e21 ("crypto/mlx5: support queue pairs operations")
Cc: stable@dpdk.org

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-23 19:41:24 +01:00
Pablo de Lara
b0a37e8cd2 crypto/ipsec_mb: fix cipher key setting
When authenticating with SNOW3G, KASUMI and ZUC,
the pointers for encryption/decryption keys is not set.
If a cipher algorithm such as AES-CBC is also used,
the application would seg fault.
Hence, these pointers should be set to some value by default.

Command line to replicate the issue:
./build/app/dpdk-test-crypto-perf -l 4,5 -n 6 --vdev="crypto_aesni_mb" -- \
 --devtype="crypto_aesni_mb" --optype=cipher-then-auth --auth-algo \
 snow3g-uia2 --auth-key-sz 16 --auth-iv-sz 16 --digest-sz 4 --silent \
 --total-ops 1000000 --auth-op generate --burst-sz 32 \
 --cipher-algo aes-ctr --cipher-key-sz 16 --cipher-iv-sz 16

Fixes: ae8e085c60 ("crypto/aesni_mb: support KASUMI F8/F9")
Fixes: 6c42e0cf4d ("crypto/aesni_mb: support SNOW3G-UEA2/UIA2")
Fixes: fd8df85487 ("crypto/aesni_mb: support ZUC-EEA3/EIA3")
Cc: stable@dpdk.org

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
2021-11-23 19:35:59 +01:00
Elena Agostini
94220b3977 gpu/cuda: set rte_errno
Set correct rte_errno variable in CUDA driver
and return -rte_errno in case of error.

rte_errno values are compliant with the gpudev library documentation.

Fixes: 1306a73b19 ("gpu/cuda: introduce CUDA driver")

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2021-11-24 12:00:42 +01:00
Elena Agostini
1674c56dc3 gpudev: manage null parameters in memory functions
The gpudev functions free, register and unregister
return gracefully if input pointer is NULL or size 0,
as API doc was indicating no-op accepted values.

CUDA driver checks are removed because redundant
with the checks added in gpudev library.

Fixes: e818c4e2bf ("gpudev: add memory API")

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2021-11-24 09:38:43 +01:00
Ferruh Yigit
25cf263074 net: add macro for VLAN header length
Multiple drivers are defining macros for VLAN header length, to remove
the redundancy defining macro in the ether header.
And updated drivers to use the new macro.

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-11-17 20:17:04 +01:00
Viacheslav Ovsiienko
a750169c4f net/mlx5: fix modify field destination bit offset
If the modify field action requests the field copy/set transaction
from other field, the destination field hardware bit offset was
assigned incorrectly with non-zero byte offset, causing wrong
translations for the fields with sizes larger than 32 bits.

Fixes: 40c8fb1fd3 ("net/mlx5: update modify field action")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-17 15:51:40 +01:00
Michael Baum
f550a49d49 common/mlx5: fix memory leak in Windows MR deregistration
The "mlx5_devx_cmd_mkey_create" DevX cmd allocates DevX object using
mlx5_malloc and then creates MKey using glue function.
Compatibly, "mlx5_devx_cmd_destroy" cmd releases first the MKey using
glue function, and then free the DevX object using mlx5_free.

On Windows OS, the reg_mr function creates Mkey using
"mlx5_devx_cmd_mkey_create" cmd, but dereg_mr function using directly
glue function without freeing the object.
This behavior causes memory leak at each MR release.

In addition, the dereg_mr function makes sure that the MR pointer is
valid before destroying its fields, but always calls the memset function
that makes a difference to it.

This patch moves the dereg_mr function to use "mlx5_devx_cmd_destroy"
instead of glue function, and extends the validity test to the whole
function.

Fixes: ba42071982 ("common/mlx5: add reg/dereg MR on Windows")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-17 15:51:40 +01:00
Michael Baum
e6a6829f99 common/mlx5: fix user mode register access attribute
To detect the timestamp mode configured on the NIC the mlx5 PMD uses the
firmware command ACCESS_REGISTER_USER.
The HCA capability command has an attribute flag checking whether
firmware supports the command.

However, the HCA capability query command read the flag from wrong place
in PRM structure.

This patch move the flag to correct place.

Fixes: 972a1bf812 ("common/mlx5: fix user mode register access command")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-17 15:51:39 +01:00
Dariusz Sosnowski
421177ccd7 net/mlx5: fix MPLS tunnel outer layer overwrite
mlx5 PMD incorrectly overwrote outer layer fields in MPLS tunnel
rte_flow patterns using defaults for MPLS tunnels. This included
overwriting UDP destination port in MPLSoUDP and GRE protocol field in
MPLSoGRE.

This patch fixes this behavior. If application provides the values in
flow pattern items preceding the MPLS flow item the provided values will
be used, otherwise the defaults will be applied.

Fixes: d1abe664dd ("net/mlx5: add MPLS to Direct Verbs flow engine")
Cc: stable@dpdk.org

Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-17 11:48:18 +01:00
Dariusz Sosnowski
7775172c04 net/mlx5: fix partial inline of fine grain packets
Assuming a user tried to send multi-segment packets, with
RTE_PMD_MLX5_FINE_GRANULARITY_INLINE flag set, using a device with
minimum inlining requirements (such as ConnectX-4 Lx or when user
specified them explicitly), sending such packets caused segfault.
Segfault was caused by failed invariants in
mlx5_tx_packet_multi_inline function.

This patch introduces a logic for multi-segment packets, with
RTE_PMD_MLX5_FINE_GRANULARITY_INLINE flag set, to omit mbuf scanning for
filling inline buffer and inline only minimal amount of data required.

Fixes: ec837ad0fc ("net/mlx5: fix multi-segment inline for the first segments")
Cc: stable@dpdk.org

Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-17 11:48:18 +01:00
Ivan Malov
4c6005999e net/sfc: support MAC address edits in transfer flows
These edits affect the outermost header in the current processing state
of the packet, which might have been decapsulated by prior action DECAP.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-17 14:10:08 +01:00
Ivan Malov
92bafeffdc common/sfc_efx/base: support MAC address edit actions in MAE
In a tunnel packet, these actions affect the inner header if
action DECAP is set; otherwise, they affect the outer header.

Adding these actions is done in two steps: add the action to
the action mask and indicate the MAC address entry ID to use.
This allows the user to check the order of actions first and
allocate resources when time comes to enable the action rule.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-17 14:10:08 +01:00
Ivan Malov
e62a0d6a8e net/sfc: organise MAE flow action parsing function arguments
Add a context structure to simplify handling of action sets.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-17 14:10:08 +01:00
Ivan Malov
55ac9b25ba net/sfc: refine order of checks on MAE action set attach
The number of counters being non-zero can be detected before
the action set registry traversal, so move the check outside.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-17 14:10:08 +01:00
Kumara Parameshwaran
47f5dee19e net/failsafe: fix secondary process probe
Remove the vdev args check for secondary process which prevents the
secondary from attaching to the device created by the primary process
via the hotplug framework. This check was removed for other vdevs but
was missed for failsafe.

Fixes: 4852aa8f6e ("drivers/net: enable hotplug on secondary process")
Cc: stable@dpdk.org

Signed-off-by: Kumara Parameshwaran <kumaraparamesh92@gmail.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2021-11-17 13:03:55 +01:00
Viacheslav Galaktionov
3037e6cf3d net/sfc: support regioned NIC DMA memory mapping type
DMA on SN1022 SoC requires extra mapping of the memory via MCDI.

Signed-off-by: Viacheslav Galaktionov <viacheslav.galaktionov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-11-17 12:37:07 +01:00
Andrew Rybchenko
60fb370c7b common/sfc_efx/base: support NIC DMA memory regions API
NIC DMA memory regions API allows to establish mapping of DMA addresses
used by NIC to host IOVA understood by the host when IOMMU is absent
and NIC cannot address entire host IOVA space because of too small
DMA mask.

The API does not allow to address entire host IOVA space, but allows
arbitrary regions of the space really used for the NIC DMA.

A DMA region needs to be mapped in order to perform MCDI initialization.
Since the NIC has not been probed at that point, its configuration cannot
be accessed and there an UNKNOWN mapping type is assumed.

Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-17 12:37:07 +01:00
Ivan Malov
7dc01afc0e net/sfc: fix printout labels for decrease TTL actions
Fixes: 60e53c078d ("net/sfc: support decrement IP TTL actions in transfer flows")

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-17 12:14:21 +01:00
Ivan Malov
d28996b195 net/sfc: fix printout label for count action
Fixes: 96fd2bd69b ("net/sfc: support flow action count in transfer rules")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
Reviewed-by: Andy Moreton <amoreton@xilinx.com>
2021-11-17 12:14:21 +01:00
Somnath Kotur
a7e21843f0 net/bnxt: fix Rx next consumer index in mbuf alloc fail
The driver internal variable to track the next consumer index on
the Rx ring was not being set if there was an mbuf allocation
failure. In that scenario, eventually it would fall out of sync
with the actual consumer index and raise a false alarm on Thor
needlessly causing a segmentation fault with testpmd

Fixes: 03c8f2fe11 ("net/bnxt: detect bad opaque in Rx completion")
Cc: stable@dpdk.org

Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
2021-11-17 04:57:19 +01:00
Kishore Padmanabha
ba6fa50aae net/bnxt: fix ULP context list deadlock
The ULP context list was not updated when high availability
feature was deinitialized. This caused the ULP context list
to acquire the lock when it is not supposed to causing a
deadlock. The fix is to correctly clear the list.

Fixes: 3184b1ef66 ("net/bnxt: add HA support in ULP")
Cc: stable@dpdk.org

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-17 00:14:30 +01:00
Kishore Padmanabha
bf59878630 net/bnxt: fix multi adapter
1. removed the global flag for TruFlow global config initialization.

2. Modified the TruFlow context lock to be a global lock instead
of per context lock.

3. The ULP context list is modified to check on the ULP configuration
data so alarm handlers can operate on the correct ULP context.

These changes help in support of multiple network cards using
single DPDK application.

Fixes: d75b55121b ("net/bnxt: add context list for timers")
Cc: stable@dpdk.org

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-17 00:12:58 +01:00
Kishore Padmanabha
7c528c6ef5 net/bnxt: fix SRAM resource free block list
The SRAM resource free did not reset the next block to be used
when the block is not empty. This caused the flows not be created
when max flows limit is reached and you delete one flow and try to
add a new flow. The fix calls the update of the next free block
even when block is not empty.

Fixes: 37ff91c158 ("net/bnxt: add SRAM manager model")

Signed-off-by: Kishore Padmanabha <kishore.padmanabha@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Mike Baucom <michael.baucom@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-17 00:11:01 +01:00
Jay Ding
e90df01c7a net/bnxt: remove settings for multiple session
Move wc_tcam_slices_per_row and database structure of
global_cfg and if_tbl to session structure to support
multiple TruFlow sessions with different card type under single
DPDK application instance.

Signed-off-by: Jay Ding <jay.ding@broadcom.com>
Signed-off-by: Venkat Duvvuru <venkatkumar.duvvuru@broadcom.com>
Reviewed-by: Farah Smith <farah.smith@broadcom.com>
Reviewed-by: Randy Schacher <stuart.schacher@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-17 00:09:12 +01:00
Lance Richardson
4641de7b02 net/bnxt: remove software prefetches from AVX2 Rx
Testing has shown no performance benefit from software prefetching
of receive completion descriptors in the AVX2 burst receive path,
and slightly better performance without them on some CPU families,
so this patch removes them.

Fixes: c4e4c18963 ("net/bnxt: add AVX2 RX/Tx")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-16 23:57:27 +01:00
Lance Richardson
e5f2b3ebcb net/bnxt: avoid unnecessary work in AVX2 Rx
Each call to the AVX2 vector burst receive function makes at
least one pass through the function's inner loop, loading
256 bytes of completion descriptors and copying 8 rte_mbuf
pointers regardless of whether there are any packets to be
received.

Unidirectional forwarding performance is improved by about
3-4% if we ensure that at least one packet can be received
before entering the inner loop.

Fixes: c4e4c18963 ("net/bnxt: add AVX2 RX/Tx")
Cc: stable@dpdk.org

Signed-off-by: Lance Richardson <lance.richardson@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
2021-11-16 23:56:37 +01:00
Dmitry Kozlyuk
e4c402afc1 common/mlx5: fix MPRQ mempool registration
Mempool registration code had a wrong assumption that it is always
dealing with packet mempools and always called rte_pktmbuf_priv_flags(),
which returned a random value for different types of mempools.
In particular, it could consider MPRQ mempools as having externally
pinned buffers, which is wrong.
Packet mempools cannot be reliably recognized, but it is sufficient to
check that the mempool is not a packet one, so it cannot have externally
pinned buffers.
Compare mempool private data size to that of packet mempools to check.

Fixes: 690b2a88c2 ("common/mlx5: add mempool registration facilities")
Fixes: fec28ca0e3 ("net/mlx5: support mempool registration")

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 16:45:21 +01:00
Chengfeng Ye
1e580ed4b0 net/mlx5: fix mutex unlock in Tx packet pacing cleanup
The lock sh->txpp.mutex was not correctly released on one path
of cleanup function return, potentially causing the deadlock.

Fixes: d133f4cdb7 ("net/mlx5: create clock queue for packet pacing")
Cc: stable@dpdk.org

Signed-off-by: Chengfeng Ye <cyeaa@connect.ust.hk>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 17:55:17 +01:00
Chengwen Feng
0b77e8f3d3 net/hns3: optimize Tx performance
This patch uses tx_free_thresh to control mbufs free when the common
xmit algorithm is used.

This patch also modifies the implementation of PMD's tx_done_cleanup
because the mbuf free algorithm changed.

In the testpmd single core MAC forwarding scenario, the performance is
improved by 10% at 64B on Kunpeng920 platform.

Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-16 16:39:20 +01:00
Chengwen Feng
3cc817c195 net/hns3: optimize Tx performance by mbuf fast free
Currently the vector and simple xmit algorithm don't support multi_segs,
so if Tx offload support MBUF_FAST_FREE, driver could invoke
rte_mempool_put_bulk() to free Tx mbufs in this situation.

In the testpmd single core MAC forwarding scenario, the performance is
improved by 8% at 64B on Kunpeng920 platform.

Cc: stable@dpdk.org

Signed-off-by: Chengwen Feng <fengchengwen@huawei.com>
Signed-off-by: Min Hu (Connor) <humin29@huawei.com>
2021-11-16 16:39:20 +01:00
Dmitry Kozlyuk
5c078fce58 net/mlx5: fix keeping indirect RSS non-isolated mode
When a port starts in non-isolated mode,
an internal indirect RSS is created that includes all configured queues
and a flow rule is created that references this indirect RSS.
If before switching to non-isolated mode an indirect RSS was created
that includes the same set of queues, it would be reused at this point.
However, because the port had been stopped (or not yet started),
the TIR for this indirect RSS had been destroyed (or not yet created).
The flow rule could not be created and the port start failed.

Creation of TIRs is moved before configuring non-isolated mode flows,
but it is not enough because of the following issue.

Commit 0cedf34da7 ("net/mlx5: move Rx queue reference count")
changed mlx5_rxq_get() not to increment RxQ control structure
reference count, mlx5_rxq_ref() was introduced for this purpose.
mlx5_ind_table_obj_attach() was not updated to use the new function,
so when the port was stopped, the control structure reference count
of an RxQ used in RSS reached zero and the structure was destroyed.

Use mlx5_rxq_ref() to keep RxQ control structure
needed for indirect RSS persistence across port restart.

Fixes: ec4e11d41d ("net/mlx5: preserve indirect actions on restart")
Fixes: 0cedf34da7 ("net/mlx5: move Rx queue reference count")
Cc: stable@dpdk.org

Signed-off-by: Dmitry Kozlyuk <dkozlyuk@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 14:05:35 +01:00
Bing Zhao
1ce19ab1f4 net/mlx5: fix RSS validation with meter policy
The RSS can be one of the fate actions when creating a meter with
policy. In the previous implementation, the RSS validation was missed
when creating a flow rule with such meter due to the fact that a
policy meter was created firstly and then used in the rule. In the
stage of meter creation, no rte_flow_item* information was provided.

A unnecessary RSS expansion might be called since the validation was
missed and would cause an unexpected error of the rule creation. Even
though the rule should be rejected from the very beginning, it would
cause confusion. There might be some other errors when the validation
was missed.

Adding the RSS validation inside the meter action validation will
prevent the code from continuing when there is a conflict between the
items, other actions and the policy meter RSS action.

Fixes: 4443201863 ("net/mlx5: support meter creation with policy")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Reviewed-by: Li Zhang <lizh@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-16 10:23:31 +01:00
Gregory Etelson
be26e81bfc net/mlx5: fix GRE protocol type translation
When application creates several flows to match on GRE tunnel
without explicitly specifying GRE protocol type value in
flow rules, PMD will translate that to zero mask.
RDMA-CORE cannot distinguish between different inner flow types and
produces identical matchers for each zero mask.

The patch extracts inner header type from flow rule and forces it
in GRE protocol type, if application did not specify
any without explicitly specifying GRE protocol type value in
flow rules, protocol type value.

Fixes: fc2c498ccb ("net/mlx5: add Direct Verbs translate items")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 10:22:56 +01:00
Gregory Etelson
690391dd0e net/mlx5: fix GENEVE protocol type translation
When application creates several flows to match on GENEVE tunnel
without explicitly specifying GENEVE protocol type value in
flow rules, PMD will translate that to zero mask.
RDMA-CORE cannot distinguish between different inner flow types and
produces identical matchers for each zero mask.

The patch extracts inner header type from flow rule and forces it
in GENEVE protocol type, if application did not specify
any without explicitly specifying GENEVE protocol type value in
flow rules, protocol type value.

Fixes: e59a5dbcfd ("net/mlx5: add flow match on GENEVE item")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 10:22:55 +01:00
Gregory Etelson
a21d616b99 net/mlx5: fix RSS expansion scheme for GRE header
RFC-2784 allows any valid Ethernet type in GRE protocol type field.

Add Ethernet to GRE RSS expansion.

Fixes: f4b901a46a ("net/mlx5: add flow GRE item")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 10:22:54 +01:00
Gregory Etelson
9f151fd8df net/mlx5: add Ethernet header to GENEVE RSS expansion
RFC-8926 allows inner Ethernet header after GENEVE tunnel.

Current GENEVE RSS expansion created IPv4 and IPv6 paths only.

The patch adds Ethernet to RSS expansion scheme.

Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 10:22:53 +01:00
Gregory Etelson
861fa3796f net/mlx5: fix VXLAN-GPE next protocol translation
VXLAN-GPE extends VXLAN protocol and provides the next protocol
field specifying the first inner header type.

The application can assign some explicit value to
VXLAN-GPE::next_protocol field or set it to the default one. In the
latter case, the rdma-core library cannot recognize the matcher
built by PMD correctly, and it results in hardware configuration
missing inner headers match.

The patch forces VXLAN-GPE::next_protocol assignment if the
application did not explicitly assign it to the non-default value

Fixes: 90456726eb ("net/mlx5: fix VXLAN-GPE item translation")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@nvidia.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-11-16 10:22:51 +01:00
Radu Nicolau
46e461565c net/iavf: fix VLAN insertion
Fix wrong VLAN insertion position as inner.

Fixes: 1e728b0112 ("net/iavf: rework Tx path")

Signed-off-by: Radu Nicolau <radu.nicolau@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-11-16 12:39:50 +01:00
Alvin Zhang
798155194c net/ice: fix secondary process Rx offload path
Secondary process depends on the vector offload flag to select right
Rx offload path. This patch adds a variable in share memory to store
the vector offload flag that can be directly read by secondary process.

Fixes: 808a17b3c1 ("net/ice: add Rx AVX512 offload path")
Cc: stable@dpdk.org

Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Tested-by: Qin Sun <qinx.sun@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-11-16 05:56:16 +01:00
Junfeng Guo
b5d753f233 net/ice/base: fix GTPU UL/DL flag
Just fix the wrong defines of GTPU flags between UL and DL. These two
are defined are misplaced to each other.

Fixes: 8ebb93942b ("net/ice/base: add function to set HW profile for raw flow")

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-11-16 01:59:03 +01:00
Bing Zhao
e9511a26e1 vdpa/mlx5: fix mkey creation check
The return value of "mlx5_os_wrapped_mkey_create" is checked in the
caller. A zero means success without any error.

The typo in the if-condition should be fixed in case there is a
misjudgment.

Fixes: 398ea8450c ("vdpa/mlx5: workaround dirty bitmap MR creation")
Cc: stable@dpdk.org

Signed-off-by: Bing Zhao <bingz@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Reviewed-by: Chenbo Xia <chenbo.xia@intel.com>
2021-11-16 11:21:18 +01:00
Michael Baum
71304b5c7b common/mlx5: fix redundant field in MR control structure
Inside the MR control structure there is a pointer to the common device.
This pointer enables access to the global cache as well as hardware
objects that may be required in case a new MR needs to be created.

The purpose of adding this pointer into the MR control structure was to
avoid its transfer as a parameter to all the functions of searching MR
in the caches.
However, adding it to this structure increased the Rx and Tx data-path
structures, all the fields that followed it were slightly moved away
which caused to a reduction in performance.

This patch removes the pointer from the structure. It can be accessed
through the "dev_gen_ptr" existing field using the "container_of"
operator.

Fixes: 334ed198ab ("common/mlx5: remove redundant parameter in MR search")

Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
2021-11-17 10:42:20 +01:00
Elena Agostini
1306a73b19 gpu/cuda: introduce CUDA driver
This is the CUDA implementation of the gpudev library.
Functionalities implemented through CUDA Driver API are:
- Device probe and remove
- Manage device memory allocations
- Register/unregister external CPU memory in the device memory area

Signed-off-by: Elena Agostini <eagostini@nvidia.com>
2021-11-16 17:47:52 +01:00
Arek Kusztal
156eee2177 common/qat: fix queue pair config overrun
This commit fixes overrun of ring configuration
due to insufficient check.

Fixes: 4badfb0205 ("common/qat: fix queue pairs number")
Cc: stable@dpdk.org

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Ciara Power <ciara.power@intel.com>
2021-11-16 08:27:44 +01:00
Raja Zidane
4b2cc736a5 crypto/mlx5: support BlueField 2 and ConnectX-6 Dx devices
Starting from FW version xx.32.0108. version, the BlueField 2 and
ConnectX-6 Dx adapters support crypto operations.

Add them to the supported PCI devices list.

Signed-off-by: Raja Zidane <rzidane@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Tal Shnaiderman <talshn@nvidia.com>
2021-11-16 07:38:07 +01:00
Anoob Joseph
d937e87202 common/cpt: fix KASUMI input length
Fix kasumi input len calculation to consider encr_offset.

Fixes: da39e3eccd ("common/cpt: support KASUMI")
Cc: stable@dpdk.org

Signed-off-by: Anoob Joseph <anoobj@marvell.com>
2021-11-16 07:38:07 +01:00