Log the command sequence number to aid debug in case of a
FW command timeout.
Fixes: 804e746c7b73 ("net/bnxt: add hardware resource manager init code")
Cc: stable@dpdk.org
Signed-off-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
This patch fixes deallocation of all fastpath resources unconditionally,
when re-configuring the device. When re-allocating resources PMD depends
on application to explicitly setup the Rx/Tx queue.
Deallocation of all the resources is only required if the Rx/Tx queue
configuration changes. For other scenarios like KNI MTU change we'd keep
existing configuration.
Fixes: 8de0c4201926 ("net/qede: fix odd number of queues usage in 100G mode")
Fixes: dd28bc8c6ef4 ("net/qede: fix VF port creation sequence")
Cc: stable@dpdk.org
Signed-off-by: Rasesh Mody <rmody@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Fix to assign dummy Rx/Tx handlers in dev_stop.
For MTU set, assignment of the appropriate Rx/Tx handlers will be
handled by dev_start/dev_stop.
Fixes: 81f8804992c9 ("net/qede: enhance Rx CPU utilization")
Fixes: 8de0c4201926 ("net/qede: fix odd number of queues usage in 100G mode")
Cc: stable@dpdk.org
Signed-off-by: Rasesh Mody <rmody@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Event notification should be disabled after virtqueue initialization and
enabled by calling rte_eth_dev_rx_intr_enable later. When virtio user
device reconnecting to vhost, virtqueue_disable_intr should be called to
disable event notification.
Fixes: 6ebbf4109f35 ("net/virtio-user: fix packed ring server mode")
Cc: stable@dpdk.org
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Acked-by: Xiao Wang <xiao.w.wang@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Runtime checks for vectorized datapath are organized into device
configuration function. Remove duplicated check in device init
function.
Signed-off-by: Marvin Liu <yong.liu@intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Before updating RSS indirection table, firstly determine whether
rq num in RETA table is legal, if it is invalid(such as exceeding
the maximum rxq num), driver will not update hw indirection
table and return fail.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
The patch modifies the comments of structures or functions, and adds
space for comments, removes extra empty lines and adjusts the
print level for VF branches in one sdk interface.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
When copy a mbuf to a new dst_mbuf, the pkt_len member of
dst_mbuf needs to be updated.
Fixes: 076221c8fe1d ("net/hinic: add Rx/Tx")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
Adds tx_queues and rx_queues non-null judgment before free tx or
rx resources, because some app may set tx_queues or rx_queues to
be null before call free resource interfaces, which may cause
a segfault.
Fixes: 64727024d2fd ("net/hinic: add device initialization")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
The VMXNet3 protocol has a start-of-packet (SOP) and end-of-packet (EOP)
marker. If there was a bug where mbuf arrived without SOP the code that
chains the mbuf would dereference a null pointer.
Also, record any mbuf's dropped in statistics.
Although did the initial code no longer have access to VMware.
Compile tested only!
Coverity issue: 124563
Fixes: 8ee787ce80a8 ("vmxnet3: remove asserts that confuse coverity")
Cc: stable@dpdk.org
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
Acked-by: Yong Wang <yongwang@vmware.com>
Previous patch added support of VLAN item without VLAN ID value,
i.e. using wildcard VLAN item, to match VLAN with any VLAN ID.
The implication on VLAN actions was not taken into consideration.
VLAN actions (e.g. push vlan) use the VLAN ID value in the VLAN item,
and expect it to be valid.
This patch updates function flow_dev_get_vlan_info_from_items() to
check the VLAN item contents before trying to use it.
Fixes: 92818d839e8e ("net/mlx5: fix match on empty VLAN item in DV mode")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
The design of counter container resize used double buffer algorithm in
order to synchronize between the query thread to the control thread.
When the control thread detected resize need, it created new bigger
buffer for the counter pools in a new container and change the container
index atomically.
In case the query thread had not detect the previous resize before a new
one need was detected by the control thread, the control thread returned
EAGAIN to the flow creation API used a COUNT action.
The rte_flow API doesn't allow unblocked commands and doesn't expect to
get EAGAIN error type.
So, when a lot of flows were created between 2 different periodic
queries, 2 different resizes might try to be created and caused EAGAIN
error.
This behavior may blame flow creations.
Change the synchronization way to use lock instead of double buffer
algorithm.
The critical section of this lock is very small, so flow insertion
rate should not be decreased.
Fixes: ebbac312e448 ("net/mlx5: resize a full counter container")
Cc: stable@dpdk.org
Signed-off-by: Matan Azrad <matan@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Move link state enable/disable to dev_start() and dev_stop()
respectively. This will ensure when devices are stopped,
link status will be appropriately shown as down.
Fixes: dd28bc8c6ef4 ("net/qede: fix VF port creation sequence")
Cc: stable@dpdk.org
Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
This patch fixes the issue that failed to create an RSS rule with type
L2-payload.
Fixes: feaae285b342 ("net/i40e: support hash configuration in RSS flow")
Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Tested-by: Hailin Xu <hailinx.xu@intel.com>
Reviewed-by: Jeff Guo <jia.guo@intel.com>
When configure RSS rule, the etherdev rss hash function type should be
mapped to the corresponding virtchnl rss algorithm type.
Fixes: 7be10c3004be ("net/iavf: add RSS configuration for VF")
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
A typo need to be fixed for Simple XOR algorithm configuration.
Fixes: 57094d594324 ("common/iavf: support advanced RSS input set change")
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
When the driver is loaded on a 200G NIC, the port speed is not
displayed correctly. Parse the 200G speed before displaying it.
Signed-off-by: Kalesh AP <kalesh-anakkur.purayil@broadcom.com>
Reviewed-by: Somnath Kotur <somnath.kotur@broadcom.com>
Reviewed-by: Ajit Khaparde <ajit.khaparde@broadcom.com>
Relaxed ordering is a PCI optimization that enables reordering
reads/writes in order to improve performance.
Relaxed ordering was enabled for all processors causing
a degradation in performance in Haswell and Broadwell processors
that don't support this optimization.
In order to avoid that we check if the processor is Haswell
or Broadwell and if so we disable relaxed ordering.
Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
In order to improve performance relaxed ordering was enabled
when creating count object using Devx.
Currently rte enables this optimization by default when using
Devx.
This causes an issue when using firmware that does not have this
capability causing a count object failure.
In order to fix this issue a check of firmware capabilities was
added before enabling relaxed ordering.
Fixes: 53ac93f71ad1 ("net/mlx5: create relaxed ordering memory regions")
Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Relaxed ordering is a PCI optimization that allows reordering
of reads/writes in order to improve performance.
In order to enable this optimization only when relaxed ordering
is supported, it is checked if IBV_ACCESS_RELAXED_ORDERING is
defined in verbs.h.
Since IBV_ACCESS_RELAXED_ORDERING is an enum and not
defined relaxed ordering wasn't enabled even when supported.
This issue is fixed by using AUTOCONF to check if relaxed
ordering is supported and disabling only if it isn't.
Fixes: 53ac93f71ad1 ("net/mlx5: create relaxed ordering memory regions")
Signed-off-by: Shiri Kuzin <shirik@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
This patch fixes the issue that the flow which both source MAC mask
and destination MAC mask are all zeros can not be created.
Fixes: ea0c22fd8227 ("net/i40e: enable MAC address as flow director input set")
Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Tested-by: Hailin Xu <hailinx.xu@intel.com>
Reviewed-by: Jeff Guo <jia.guo@intel.com>
The register autoneg can't be updated synchronously with flow control
mode setting in the state of port start, so NIC statistics error occurs.
AUTO_NEG Advt register should be updated by ixgbe_setup_fc() when
enabling flow control.
The patch fixes the issue.
Fixes: a524f550da6e ("net/ixgbe: fix flow control mode setting")
Cc: stable@dpdk.org
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
The value MLX5_WQE_BUF_ALIGNMENT is defined as 512.
In some cases this alignment size is not adequate, which results in
memory registration that is not accepted by FW.
The result error can be "page_offset is not aligned to page_size/64,
bad umem_offset" (syndrome 0x357275).
This patch updates the definition to match the running system.
Fixes: 18a68e046b51 ("net/mlx5: fix DevX Rx queue memory alignment")
Cc: stable@dpdk.org
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Currently, DevX API is used to create Rx objects (RQ, RQT, TIR) only
if LRO or hairpin features are enabled on this RQ.
This patch uses DevX API by default, if DevX is supported and can be
used. Otherwise, Verbs API is used.
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
File mlx5_devx_cmds.c should contain pure DevX calls. It must be OS
agnostic and not include any references to ibv or dv structs (defined in
ibverbs and rdma-core linux libraries). This commit replaces all ibv
and dv references with 'void *'. Specifically, the following struct
were replaced:
1. struct ibv_context *
2. struct ibv_qp *
3. struct mlx5dv_devx_cmd_comp *
Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Move mlx5 symbols in the map file to the INTERNAL section and add
__internal tags to their definitions.
Those symbols were exported in 20.02 and now (20.05) they are removed.
Avoid ABI comparison issues between 20.05/20.08 and 20.02 by adding the
suppress_file directive to libabigail.abignore file. This directive will
prevent loading mlx5 common symbols and no comparison will be performed.
In addition move symbols from the EXPERIMENTAL section to the INTERNAL
section.
Fixes: 7b4f1e6bd367 ("common/mlx5: introduce common library")
Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
Fix coverity defects of unused value.
Coverity issue: 357745, 357769
Fixes: b8b4c54ef9b0 ("net/iavf: support flexible Rx descriptor in normal path")
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
Fix some out-of-bounds memory issues, they may lead to wrong results
or affect application stability.
Coverity issue: 357759, 357713
Fixes: bd3fcf0d0fa1 ("net/igc: support RSS")
Signed-off-by: Alvin Zhang <alvinx.zhang@intel.com>
Reviewed-by: Jeff Guo <jia.guo@intel.com>
Move the internal symbols to INTERNAL sections so that any
change in them is not reported as ABI breakage.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Move the internal symbols to INTERNAL sections so that any
change in them is not reported as ABI breakage.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
Signed-off-by: David Marchand <david.marchand@redhat.com>
Since it will check the feature mask before running out-of-place
test cases and the virtio-crypto device supports OOP_LB_IN_LB_OUT mode.
Signed-off-by: Jay Zhou <jianjay.zhou@huawei.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
The OCTEON TX crypto PMD supports non-byte aligned data as
input for SNOW and ZUC algos. Adding the same to the feature list.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Session configure should return -ENOTSUP in case of unsupported xform
requests. Moving the validation of combinations out of cpt, as the
feature support will not be same across OCTEON TX and OCTEON TX2.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
The OCTEON TX2 crypto PMD supports non-byte aligned data as
input for SNOW and ZUC algos. Adding the same to the feature list.
Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Update max packet length supported by Inline IPsec Rx to
NIX_MAX_FRS
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
The caam_jr_enable_irqs() and caam_jr_disable_irqs() methods maybe return a
negative error. So use int instead of uint32_t int the functions.
Fixes: e7a45f3cc245 ("crypto/caam_jr: add UIO specific operations")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Gagandeep Singh <g.singh@nxp.com>
Zero is a valid fd. It will fail to check the fd if the fd is zero.
The "job_ring->uio_fd" is an fd, so define it as "int".
Fixes: e7a45f3cc245 ("crypto/caam_jr: add UIO specific operations")
Fixes: a5e1018d5e67 ("crypto/caam_jr: add routines to configure HW")
Cc: stable@dpdk.org
Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Gagandeep Singh <g.singh@nxp.com>
gcc 10 defaults to -fno-common and as a result when linking
with crypto drivers:
drivers/librte_pmd_dpaa_sec.a(crypto_dpaa_sec_dpaa_sec.c.o):
(.bss+0x4): multiple definition of `rta_sec_era';
drivers/librte_pmd_caam_jr.a(crypto_caam_jr_caam_jr.c.o):
(.bss+0x0): first defined here
drivers/librte_pmd_dpaa2_sec.a(crypto_dpaa2_sec_dpaa2_sec_dpseci.c.o):
(.data+0x0): multiple definition of `rta_sec_era';
drivers/librte_pmd_caam_jr.a(crypto_caam_jr_caam_jr.c.o):
(.bss+0x0): first defined here
This patch fixes the blunt workaround in the following commit.
Fixes: 50b03f3b8eaf ("drivers/crypto: disable gcc 10 no-common errors")
Bugzilla ID: 469
Cc: stable@dpdk.org
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
Tested-by: Kevin Traynor <ktraynor@redhat.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
The returned number from rte_event_enqueue_*()
wouldn't include events marked with RTE_EVENT_OP_RELEASE.
Fixes: 1c8e3caa3 ("event/dsw: add event scheduling and device start/stop")
Cc: stable@dpdk.org
Signed-off-by: Yuri Chipchev <yuric@marvell.com>
Reviewed-by: Liron Himi <lironh@marvell.com>
Acked-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
The AVX512 packed ring datapath selection was only done
at build time, but it should also be checked at runtime
that the CPU supports it.
This patch add a CPU flags check so that non-vectorized
path is selected at runtime if AVX512 is not supported.
Also in meson build enable vectorization only for relevant file, not for
all driver.
Fixes: ccb10995c2ad ("net/virtio: add election for vectorized path")
Signed-off-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
If hardware mode for this card does not support nic,
the network features for this card will not be supported
and driver will be initialized failed.
Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
This patch adds to MLX5 PMD the support of matching on
GTP header item v_pt_rsv_flags.
This item is contained in 1 byte of the format:
-------------------------------------------
| bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
|-----------------------------------------|
| value | Version | PT | Res | E | S | PN |
-------------------------------------------
Matching is supported only for GTP flags E, S, PN.
Therefore values 0 to 7 are supported.
Mask must be set accordingly:
... gtp v_pt_rsv_flags is 1 v_pt_rsv_flags mask 0x07 ...
Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
