Commit Graph

18424 Commits

Author SHA1 Message Date
Ivan Malov
a05a8e409b net/cnxk: support represented port flow action
There has been support for similar action PORT_ID for
some time already, but this action will be deprecated.
Support action REPRESENTED_PORT before the transition.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2022-09-27 10:26:51 +02:00
Ivan Malov
b1e1529441 net/dpaa2: support represented port flow action
There's been support for similar actions PHY_PORT and PORT_ID
for some time already, but these actions are being deprecated.
Support action REPRESENTED_PORT to prepare for the transition.

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Reviewed-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru>
2022-09-27 10:26:51 +02:00
Nithin Dabilpuram
479c2b1b5f net/cnxk: support multi-segment inline IPsec
Add multi-seg support for Inline IPsec.
Also in reassembly, FI_PAD is not required to compute pointer to
Fragment info because it is only at CPT_PARSE_HDR_S + FI_OFFSET * 8
and is always 8B aligned.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Rahul Bhansali <rbhansali@marvell.com>
2022-09-22 10:44:47 +02:00
Satheesh Paul
73fc72e125 common/cnxk: update MKEX capability flags
Update MKEX capability flags to enable parsing
VLAN PCP, DSCP and GTPv1 TEID.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:46 +02:00
Satheesh Paul
ad2c7b20ef common/cnxk: print counters along with flow dump
When dumping hardware flow data, print any counter
configured on the flow as well.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:44 +02:00
Satheesh Paul
af45c18e90 common/cnxk: fix printing disabled MKEX registers
This patch skips printing disabled MKEX registers when
dumping hardware flow MCAM entry data.

Fixes: 9869c39918 ("common/cnxk: support flow entry dump")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:43 +02:00
Satheesh Paul
b494807269 common/cnxk: fix missing flow counter reset
Added code to clear counters upon flow deletion.

Fixes: f9af908074 ("common/cnxk: add mcam utility API")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:44:41 +02:00
Amit Prakash Shukla
d7b080f1e7 net/mvneta: fix build with GCC 12
./drivers/net/mvneta/mvneta_rxtx.c:89:42:
	error: 'mbufs' may be used uninitialized [-Werror=maybe-uninitialized]
   89 |         MVNETA_SET_COOKIE_HIGH_ADDR(mbufs[0]);
      |                                          ^
../drivers/net/mvneta/mvneta_rxtx.c:77:26: note: 'mbufs' declared here
   77 |      struct rte_mbuf *mbufs[MRVL_NETA_BUF_RELEASE_BURST_SIZE_MAX];
      |                       ^~~~~

Fixes: ce7ea76459 ("net/mvneta: support Rx/Tx")
Cc: stable@dpdk.org

Signed-off-by: Amit Prakash Shukla <amitprakashs@marvell.com>
Acked-by: Liron Himi <lironh@marvell.com>
2022-09-22 10:44:39 +02:00
Rakesh Kudurumalla
dac480837c net/cnxk: dump device private information
Add support for ethdev private data dump callback for
debugging purposes.

Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2022-09-22 10:44:37 +02:00
Rakesh Kudurumalla
4006ac1ffb common/cnxk: dump device basic information to file
Add helper API to complete device info for debug purposes.
This is used by ethdev dump API to dump ethdev's internal info.

Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2022-09-22 10:44:36 +02:00
Vidya Sagar Velumuri
a33ed96814 net/cnxk: enable ESN and anti-replay
Enable ESN and anti-replay in IPsec capabilities
Add support for session update security API
Fix the CPT command population for ESN enabled case

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:35 +02:00
Vidya Sagar Velumuri
fe87c45543 net/cnxk: support crypto auth algo MD5
Add support for MD5 auth algo for security offload in inline mode.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:33 +02:00
Vidya Sagar Velumuri
e1a9ff6930 net/cnxk: support crypto cipher DES-CBC
Add support for DES-CBC cipher for security offload in inline mode.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:32 +02:00
Nithin Dabilpuram
61ee9dc8b6 net/cnxk: limit port-specific SA table size
Limit port specific SA table size to 1 entry when not used.
This is useful when inline device is enabled as then
Port specific SA table will not be used for Inline IPsec
inbound processing.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:31 +02:00
Nithin Dabilpuram
9c11122cd0 net/cnxk: wait for CPT FC on WQE path
Wait for CPT flow control on WQE path. This is to
avoid CPT queue overflow and thereby a CPT misc
interrupt.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:29 +02:00
Kommula Shiva Shankar
b059bbb895 common/cnxk: support Tx completion event via RQ/CQ mapping
Added RoC support for Tx completion events via RQ to CQ mapping.

Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
2022-09-22 10:44:28 +02:00
Kommula Shiva Shankar
ba6855a01d common/cnxk: add CQ limit associated with SQ
Update CQ threshold limit associated with sq.
This is used when we need completions for packets that are
successfully transmitted.

Signed-off-by: Kommula Shiva Shankar <kshankar@marvell.com>
2022-09-22 10:44:27 +02:00
Rakesh Kudurumalla
ddf955d391 common/cnxk: support CPT second pass
Added mailbox for masking and setting nix_rq_ctx
parameters and enabling rq masking in ipsec_cfg1
so second pass is applied to all RQ's

Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2022-09-22 10:44:25 +02:00
Satha Rao
ae8fb811a3 net/cnxk: skip PFC configuration on LBK
CNXK platforms do not support PFC on LBK so skipping
configuration on LBK interfaces.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2022-09-22 10:44:24 +02:00
Vidya Sagar Velumuri
e30c01fbcd net/cnxk: enable 3DES-CBC cipher capability
Enable 3DES-CBC cipher capability for inline IPsec processing.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:23 +02:00
Vidya Sagar Velumuri
1e68195d65 net/cnxk: enable additional ciphers for inline
Enable below ciphers and auths as part of capabilities for inline IPsec
AES_CTR, AES_XCBC_MAC, AES_GMAC.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:21 +02:00
Harman Kalra
6cf706ce99 common/cnxk: add 98xx A1 platform
Adding support for 98xx A1 pass chip.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-09-22 10:44:20 +02:00
Satha Rao
80053371b2 common/cnxk: update shaper profile with RED algorithm
Updated shaper profile with user configurable RED algorithm.
This helps in configuring a TM node in red drop mode vs
stall mode.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2022-09-22 10:44:18 +02:00
Satha Rao
46008e1b7c common/cnxk: enable aging on CN10K platform
This patch set enables aging on CNF105 variant of CN10K platform.
Enables aging statistics while dumping/reset SQ statistics.

Signed-off-by: Satha Rao <skoteshwar@marvell.com>
2022-09-22 10:44:17 +02:00
Vidya Sagar Velumuri
e86610ac1d net/cnxk: add crypto capabilities for HMAC-SHA2
Add capabilities for HMAC_SHA2 and udp encap for 9k
security offload in inline mode.
Set explicit IV mode in IPsec context when IV is provided by the
application

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:15 +02:00
Vidya Sagar Velumuri
4440eb88dd net/cnxk: use full context IPsec structures
Use the Full context SA structures and command in IPsec fast path.
For inline outbound, populate CPT instruction as per full context.
Added new macros and functions with respect to full context.

Populate WQE ptr in CPT instruction with proper offset from mbuf.
Also add option to override outbound inline SA IV for debug
Update mbuf length based on IP version in Rx post process purposes
via environment variable.

User can set env variable as:
export ETH_SEC_IV_OVR="0x0, 0x0,..."

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:13 +02:00
Vidya Sagar Velumuri
0070027288 common/cnxk: avoid using platform-specific APIs
Replace the use of platform specific APIs with platform independent
APIs.

Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
2022-09-22 10:44:11 +02:00
Nithin Dabilpuram
780b9c8924 net/cnxk: support zero AURA for inline meta
Add support for zero aura for inline meta packets and register
callback to ROC to create meta pool via mempool. Also
add devargs to override meta buffer count and size.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:10 +02:00
Nithin Dabilpuram
0f3f3ad850 common/cnxk: support zero AURA for inline inbound meta
Add support to create zero aura for inline inbound meta packets when
platform supports it.

AURA zero will hold as many buffers as all the available
pkt pool with a data to accommodate 384B in best case to store
meta packets coming from Inline IPsec.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:08 +02:00
Nithin Dabilpuram
aaea4c74b7 common/cnxk: update attributes to pools used by NIX
Update attributes to pools used by NIX so that we
can later identify which mempools are packet pools
and which are used for Inline IPsec enabled ethdev.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:07 +02:00
Nithin Dabilpuram
de00cc3521 common/cnxk: support setting NPA buffer type
Add support to set/get per-aura buf type with refs and
get sum of all aura limits matching given buf type mask
and val.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:06 +02:00
Nithin Dabilpuram
8e5a4adb4f common/cnxk: reserve AURA zero on CN10KA NPA
Reserve AURA id 0 on cn10k and provide mechanism to specifically
allocate it and free it via roc_npa_* API's.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:04 +02:00
Nithin Dabilpuram
da1ec39060 common/cnxk: delay inline device RQ enable to dev start
Similar to other RQ's, delay inline device RQ until dev is started
to avoid traffic reception when device is stopped.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:03 +02:00
Nithin Dabilpuram
93c6b6b271 common/cnxk: limit meta AURA workaround to CN10K A0
Limit meta AURA workaround to CN10K A0.
Also other NIX and Inline related Erratas applicable for CN10K A1.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:01 +02:00
Nithin Dabilpuram
8c8568bc0b net/cnxk: fix missing FC wait for outbound vector mode
Fix missing FC wait for outbound path in vector mode.
Currently only poll mode has it.

Fixes: 358d02d20a ("net/cnxk: support flow control for outbound inline")
Cc: stable@dpdk.org

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:44:00 +02:00
Srujana Challa
37da585095 common/cnxk: update inbound inline IPsec config mailbox
Updates CPT inbound inline IPsec configuration mailbox
to provide opcode and CPT credit from VF.
This patch also adds mailbox for reading inbound IPsec
configuration.

Signed-off-by: Srujana Challa <schalla@marvell.com>
2022-09-22 10:43:59 +02:00
Harman Kalra
80608c805c common/cnxk: add CN10KA A1 platform
Adding support for cn10ka A1 pass.
It is next minor pass of A0.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-09-22 10:43:57 +02:00
Harman Kalra
59ceaa72d5 common/cnxk: fix part number for CN10K
Updating the logic for getting part and pass value for cn10k family,
as device tree compatible logic does not work in VMs.
Scanning all the PCI device and detect first RVU device, subsystem
device file gives part no and revision file provide pass information.

Fixes: 014a9e222b ("common/cnxk: add model init and IO handling API")
Cc: stable@dpdk.org

Signed-off-by: Harman Kalra <hkalra@marvell.com>
2022-09-22 10:43:56 +02:00
David Marchand
9b9c09a791 net/octeon_ep: fix build for non-x86
A recent change removed errno.h from rte_common.h.

x86 EAL headers seem to include it (probably via
rte_spinlock/rte_cpuflags) but other architectures won't.

Add an explicit inclusion.

Fixes: d826133ae8 ("net/octeon_ep: support CN10K SoC")

Signed-off-by: David Marchand <david.marchand@redhat.com>
2022-09-26 09:14:08 +02:00
Pavan Nikhilesh
1134d75881 cnxk/net: add FC check in vector event Tx path
Add FC check in vector event Tx path, the check needs to be
performed after head wait right before LMTST is issued.
Since, SQB pool FC updates are delayed w.r.t the actual
utilization of pool add sufficient slack to avoid overflow.

Added a new device argument to override the default SQB slack
configured, can be used as follows:

    -a 0002:02:00.0,sqb_slack=32

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2022-09-22 10:43:54 +02:00
Pavan Nikhilesh
f1cdb3c5b6 net/cnxk: enable PTP for event Rx adapter
Add support to enable PTP per ethernet device when that
specific ethernet device is connected to event device via
Rx adapter.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2022-09-22 10:43:53 +02:00
Sathesh Edara
d826133ae8 net/octeon_ep: support CN10K SoC
This patch adds the required functionality in the Octeon endpoint
driver to support the CN10K endpoint device. It adds the CN10K SoC
specific routines to configure, enable, and disable input and output
queues to establish basic data transfers.

Signed-off-by: Sathesh Edara <sedara@marvell.com>
2022-09-22 10:43:51 +02:00
Rakesh Kudurumalla
59d0913dae common/cnxk: fix part number for CN103xx
Correct the partnumber value for CN103xx.

Fixes: dd462f68f0 ("common/cnxk: support CN103XX platform")
Cc: stable@dpdk.org

Signed-off-by: Rakesh Kudurumalla <rkudurumalla@marvell.com>
2022-09-22 10:43:49 +02:00
Satheesh Paul
0c585f8858 common/cnxk: fix log level during MCAM allocation
Changed log level from info to debug for a log message
printed during MCAM allocation.

Fixes: 1f66919817 ("common/cnxk: improve MCAM entries management")
Cc: stable@dpdk.org

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Reviewed-by: Kiran Kumar K <kirankumark@marvell.com>
2022-09-22 10:43:47 +02:00
Sathesh Edara
b4e1325361 net/octeon_ep: support link status
Added functionality to update link speed, duplex mode and link state.

Signed-off-by: Sathesh Edara <sedara@marvell.com>
Acked-by: Veerasenareddy Burru <vburru@marvell.com>
2022-09-22 10:43:45 +02:00
Sathesh Edara
a57bc0ad37 net/octeon_ep: support basic statistics
Added functionality to fetch and reset ethdev stats.

Signed-off-by: Sathesh Edara <sedara@marvell.com>
Acked-by: Veerasenareddy Burru <vburru@marvell.com>
2022-09-22 10:43:44 +02:00
Sathesh Edara
423c8a2905 net/octeon_ep: rename octeontx_ep
This patch renames octeon end point driver from octeontx_ep to
octeon_ep to enable single unified driver to support current
OcteonTx and future Octeon PCI endpoint NICs to reflect common
driver for all Octeon based PCI endpoint NICs.

Signed-off-by: Sathesh Edara <sedara@marvell.com>
Acked-by: Veerasenareddy Burru <vburru@marvell.com>
2022-09-22 10:43:42 +02:00
Sunil Kumar Kori
ac35d4bf4c net/cnxk: support ingress meter pre-color
Added support for ingress meter pre-coloring for incoming
packet for CN10K platform.

Signed-off-by: Sunil Kumar Kori <skori@marvell.com>
2022-09-22 10:43:40 +02:00
Jiawen Wu
abea8974c7 net/ngbe: support link down/up
Add support to set device link down/up.

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2022-09-21 13:46:58 +02:00
Jiawen Wu
7fa2495bdd net/ngbe: fix YT PHY mixed mode link
Add to read link status register of UTP mode, to ensure link status of
mixed mode, for YT PHY.

Fixes: 1c44384fce ("net/ngbe: support custom PHY interfaces")
Cc: stable@dpdk.org

Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2022-09-21 13:46:58 +02:00