Commit Graph

2253 Commits

Author SHA1 Message Date
Jingjing Wu
b82226bff7 net/i40e: fix deletion of all macvlan filters
filter_type is not set when removing all macvlan filters. It will
cause error when send AQ command to HW.
This patch fixes this issue.

Fixes: 4861cde461 ("i40e: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
2017-01-30 22:18:26 +01:00
Jingjing Wu
ae9b07ec93 net/i40e: fix validation when deleting MAC address
When VF sends request to remove MAC address, PF host will check
if it is a non-zero or unicast address. When VF remove a multicast
address, it will report error.
This patch fixes this issue.

Fixes: ec852c94af ("net/i40e: enhance sanity check of MAC")
Cc: stable@dpdk.org

Signed-off-by: Jingjing Wu <jingjing.wu@intel.com>
2017-01-30 22:18:26 +01:00
Rasesh Mody
679fe2e426 net/qede/base: fix FreeBSD build
This patch addresses compilation errors on FreeBSD with clang 3.8.0.

drivers/net/qede/base/ecore_cxt.c:1257:2: error:
     shifting a negative signed value is undefined
          SET_FIELD(cdu_params, CDUC_NCIB, elems_per_page);
          ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
drivers/net/qede/base/ecore.h:82:27: note: expanded from macro 'SET_FIELD'
          (value) &= ~(name##_MASK << name##_SHIFT);
                    ~~~~~~~~~~~ ^

Fixes: ec94dbc573 ("qede: add base driver")
Cc: stable@dpdk.org

Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
Tested-by: Andrew Rybchenko <arybchenko@solarflare.com>
2017-01-30 22:18:26 +01:00
Shahaf Shuler
a67323e49c net/mlx5: fix memory leak when parsing device params
in case of an error argument list is not freed.

Fixes: e72dd09b61 ("net/mlx5: add support for configuration through kvargs")
Cc: stable@dpdk.org

Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
2017-01-30 22:18:26 +01:00
Ivan Malov
1f01425813 net/sfc: fix TSO limits imposed to the number of Tx queues
The number of Tx queues requested by the user must not be overridden;
instead, the limits imposed by TSO must be applied to the advertised
maximum

Fixes: fec33d5bb3 ("net/sfc: support firmware-assisted TSO")
Cc: stable@dpdk.org

Signed-off-by: Ivan Malov <ivan.malov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@solarflare.com>
2017-01-30 22:18:26 +01:00
Andrew Rybchenko
7a7cfb7a75 net/sfc: use eal I/O device memory barriers API
The previous version relied on the fact that DMA sync for device and
PIO write barrier in pair. Now each does its job.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2017-01-30 22:18:26 +01:00
Andrew Rybchenko
c4378dacc4 net/sfc: use eal I/O device memory read/write API
Use relaxed version of these functions to guarantee no changes on
the step.

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2017-01-30 22:18:26 +01:00
Andrew Rybchenko
2a5a433ba5 net/sfc: enable TSO by default
Remove RTE_LIBRTE_SFC_EFX_TSO config option since it is not
required any more:
 - unreasonable limit on number of Tx queues when TSO is not
   actually required should be solved using per-device parameter
 - performance difference with and without TSO compiled in is small

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
2017-01-30 22:18:26 +01:00
Andrew Rybchenko
323706ab8b net/sfc: do not panic if alarms are not supported
Alarms are not supported on the FreeBSD.
Application must poll link status periodically itself using
rte_eth_link_get_nowait() to avoid management event queue overflow.

Fixes: 2de39f4e13 ("net/sfc: periodic management EVQ polling using alarm")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
Reviewed-by: Andy Moreton <amoreton@solarflare.com>
2017-01-30 22:18:26 +01:00
Nélio Laranjeiro
0603df73a0 net/mlx5: fix Rx packet validation and type
Rx checksum validation and packet type offloads are read from the wrong
location.

Fixes: 501505c560 ("net/mlx: fix IPv4 and IPv6 packet type")
Fixes: 350f4c482e ("net/mlx5: fix Rx checksum macros")
Fixes: 6218063b39 ("net/mlx5: refactor Rx data path")
Cc: stable@dpdk.org

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-01-30 22:18:26 +01:00
Nélio Laranjeiro
87e1134f86 net/mlx5: fix flow API mark combined with drop
Fixes: ea3bc3b1df ("net/mlx5: support mark flow action")
Cc: stable@dpdk.org

Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-01-30 22:18:26 +01:00
Yongseok Koh
16c6476830 net/mlx5: fix queue wrap-around of multi-packet send
When the WQ is wrapped around, it wrongly checks the condition when
resetting the pointer. It should be compared against the end of the queue,
not the beginning of the queue. And this isn't even needed when the length
of the copying data crosses the boundary.

Fixes: fdcb0f5305 ("net/mlx5: use work queue buffer as a raw buffer")
Cc: stable@dpdk.org

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-01-30 22:18:26 +01:00
Yongseok Koh
ec1fed226a net/mlx5: increase RSS indirection table size limit
The size of Rx RSS indirection table was limited by 256, but it is not
required anymore for all Mellanox NICs. However, the librte_ether still
limits the size by 512.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-01-30 22:18:26 +01:00
Yongseok Koh
d2e842d01e net/mlx5: add prefetching Rx completion queue
On receiving a compressed session of Rx completion, prefetch every entries
to be invalidated. Also, invalidate consumed completions per every 8
mini-completions, not to wait until the last entry is consumed. This helps
to reduce jitter in rx_burst.

Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Adrien Mazarguil <adrien.mazarguil@6wind.com>
2017-01-30 22:18:26 +01:00
Xiao Wang
65a35ca820 net/i40e: fix Rx checksum flag
When no error reported in Rx descriptor, we should set CKSUM_GOOD flag
before return.

Fixes: b704f9071b ("net/i40e: implement new Rx checksum flag")
Cc: stable@dpdk.org

Signed-off-by: Xiao Wang <xiao.w.wang@intel.com>
2017-01-30 22:18:26 +01:00
Qi Zhang
9b66721070 net/ixgbe: fix blocked interrupts
While handling link status change (LSC) interrupt, all interrupts are
blocked until delayed interrupt handler finishes.

The wait duration is at least one second and this may cause timeouts in
VF to PF mailbox.

Make sure only LSC interrupt is blocked while waiting for delayed
interrupt handler to finish.

Fixes: 0a45657a67 ("pci: rework interrupt handling")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
2017-01-30 22:18:26 +01:00
Andrew Rybchenko
0e7449cabc net/sfc: fix flow control settings on port start
efx_phy_adv_cap_set() sets all advertised phy capabilities including
pause capabilities which are also configured using efx_mac_fcntl_set().

If we set speed and autonegotiation capabilities only, we should
preserve already configured pause capabilities.

Fixes: d23f3a89ab ("net/sfc: support link speed and duplex settings")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
2017-01-30 22:18:25 +01:00
Andrew Rybchenko
9b098c525b net/sfc: fix link status when port is not started
Fixes: 886f8d8a05 ("net/sfc: retrieve link info")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
2017-01-30 22:18:25 +01:00
Andrew Rybchenko
f08a237783 net/sfc: synchronize link status with HW on start
Fixes: 886f8d8a05 ("net/sfc: retrieve link info")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
2017-01-30 22:18:25 +01:00
Andrew Rybchenko
c7c915e1e3 net/sfc: avoid usage of possibly uninitialized link mode
In fact efx_port_poll() always initializes it, but it isn't
explicitly documented feature of the API. Moreover, the API
annocation suggests that return code should be checked.

Fixes: 886f8d8a05 ("net/sfc: retrieve link info")

Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: Andrew Lee <alee@solarflare.com>
2017-01-30 22:18:25 +01:00
Yuanhan Liu
16994abee2 net/virtio: optimize header reset on any layout
When any layout is used, the header is stored in the head room of mbuf.
mbuf is allocated and filled by user, means there is no gurateen the
header is all zero for non TSO case. Therefore, we have to do the reset
by ourself:

    memest(hdr, 0, head_size);

The memset has two impacts on performance:

- memset could not be inlined, which is a bit costly.
- more importantly, it touches the mbuf, which could introduce severe
  cache issues as described by former patch.

Similiary, we could do the same trick: reset just when necessary, when
the corresponding field is already 0, which is likely true for a simple
l2 forward case. It could boost the performance up to 20+% in micro
benchmarking.

Cc: stable@dpdk.org
Cc: Maxime Coquelin <maxime.coquelin@redhat.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2017-01-30 14:33:12 +01:00
Yuanhan Liu
c9ea670c1d net/virtio: fix performance regression due to TSO
TSO is now enabled, but it's not actually being used by default in a
simple L2 forward mode. In such case, we have to zero the virtio net
headers, to inform the vhost backend that no offload is being used:

    hdr->csum_start = 0;
    hdr->csum_offset = 0;
    hdr->flags = 0;

    hdr->gso_type = 0;
    hdr->gso_size = 0;
    hdr->hdr_len = 0;

Such writes could be very costly; it introduces severe cache issues:
The above operations introduce cache write for each packet, which
stalls the read operation from the vhost backend.

The fact that virtio net header is initiated to zero in PMD driver
init stage means that these costly writes are unnecessary and could
be avoided:

    if (hdr->csum_start != 0)
        hdr->csum_start = 0;

And that's what the macro ASSIGN_UNLESS_EQUAL does. With this, the
performance drop introduced by TSO enabling is recovered: it could
be up to 20% in micro benchmarking.

Fixes: 58169a9c81 ("net/virtio: support Tx checksum offload")
Fixes: 696573046e ("net/virtio: support TSO")
Cc: stable@dpdk.org

Cc: Olivier Matz <olivier.matz@6wind.com>
Cc: Maxime Coquelin <maxime.coquelin@redhat.com>
Cc: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Reviewed-by: Olivier Matz <olivier.matz@6wind.com>
2017-01-30 14:33:04 +01:00
Jianfeng Tan
954820dc7d net/vhost: fix unix socket not removed as closing
The commit aed0b12930 ("net/vhost: fix socket file deleted on stop")
moves rte_vhost_driver_register and rte_vhost_driver_unregister from
dev_start() and dev_stop() into driver's probe() and remove().

Apps, like testpmd, using vhost pmd in server mode, usually calls
dev_stop() and dev_close() as quitting, instead of driver-specific
remove(). Then those unix socket files have no chance to get removed.

Semantically, device-specific things should be put into device-specific
APIs. Fix this issue by moving rte_vhost_driver_unregister, plus other
structure free into dev_close().

Fixes: aed0b12930 ("net/vhost: fix socket file deleted on stop")
Cc: stable@dpdk.org

Reported-by: Lei Yao <lei.a.yao@intel.com>
Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-01-30 14:19:48 +01:00
Jianfeng Tan
1e9057a97b net/virtio-user: check value returned from malloc
Value returned from malloc is not checked for errors before being used.
This patch fixes following coverity issue.

    static struct vhost_memory_kernel *
    prepare_vhost_memory_kernel(void)
    {
        ...
        vm = malloc(sizeof(struct vhost_memory_kernel) +
                    max_regions *
                    sizeof(struct vhost_memory_region));
        ...
    >>>     CID 140744:    (NULL_RETURNS)
    >>>     Dereferencing a null pointer "vm".
                mr = &vm->regions[k++];

Coverity issue: 140744
Fixes: e3b434818b ("net/virtio-user: support kernel vhost")

Signed-off-by: Jianfeng Tan <jianfeng.tan@intel.com>
Acked-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-01-28 14:25:40 +01:00
Yuanhan Liu
7687312571 net/virtio: fix crash when number of virtio devices > 1
The vtpci_ops assignment needs the 'hw->port_id' as an input parameter.
That said, we should set 'hw->port_id' firstly, then do the vtpci_ops
assignment, while the code does reversely. That would result to a crash
when more than one virtio devices are used, because we keep assigning
proper vtpci_ops to virtio_hw_internal[0]->vtpci_ops, leaving the pointer
for other ports being NULL.

Reverse the order fixes this issue.

Fixes: 9470427c88 ("net/virtio: do not store PCI device pointer at shared memory")
Cc: stable@dpdk.org

Reported-by: Lei Yao <lei.a.yao@intel.com>
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2017-01-28 14:25:40 +01:00
Ferruh Yigit
30712b214b crypto/qat: make PCI device id struct const
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-01-30 17:46:36 +01:00
Fan Zhang
dbb336407f crypto/scheduler: enable compilation
Adds Makefile for scheduler cryptodev PMD, and updates existing
Makefiles. Different than other cryptodev PMDs, scheduler PMD
is required to be built as shared libraries.

Adds scheduler PMD enable and debug flags to config/common_base.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:46:35 +01:00
Fan Zhang
57523e682b crypto/scheduler: register operation functions
Implements all standard operations required for cryptodev,
and register them to cryptodev operation function pointer table.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:46:35 +01:00
Fan Zhang
503e9c5afb crypto/scheduler: register as vdev driver
Adds crypto scheduler's PMD's probe and remove function and the device's
enqueue and dequeue burst functions. A cryptodev scheduler PMD is
then registered in the end.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:46:35 +01:00
Fan Zhang
100e4f7e44 crypto/scheduler: add round-robin mode
Implements round-robin scheduling mode and register into cryptodev
scheduler ops structure. This mode enqueues a burst of operation
to one of its slaves, and iterates the next burst to the other
slave. Same procedure is done on dequeueing operations.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:23:33 +01:00
Fan Zhang
31439ee72b crypto/scheduler: add API implementations
Adds the implementations of the APIs for scheduler cryptodev PMD.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:23:33 +01:00
Fan Zhang
870babeb53 crypto/scheduler: add internal structures
Adds a number of internal structures for the cryptodev scheduler PMD. The
structures include the scheduler context, slave, queue pair context,
and session.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:23:33 +01:00
Fan Zhang
097ab0bac0 crypto/scheduler: add API
Adds APIs and function prototypes for the scheduler PMD to perform extra
operations other than standard cryptodev APIs.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-30 17:23:33 +01:00
Hemant Agrawal
3b84878c4b cryptodev: decouple from PCI device
This makes struct rte_cryptodev independent of struct rte_pci_device by
replacing it with a pointer to the generic struct rte_device.

This is inline with the recent changes in ethdev

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: John Griffin <john.griffin@intel.com>
Reviewed-by: Shreyansh Jain <shreyansh.jain@nxp.com>
2017-01-30 17:23:33 +01:00
Keith Wiles
b0120a300b net/tap: fix build with old kernels
IFF_MULTI_QUEUE does not exist in older kernels:
drivers/net/tap/rte_eth_tap.c:143:19: error: ‘IFF_MULTI_QUEUE’ undeclared

Signed-off-by: Keith Wiles <keith.wiles@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2017-01-20 18:37:22 +01:00
Zbigniew Bodek
c2fec02245 cryptodev: introduce ARM-specific feature flags
Add two new feature flags:
* RTE_CRYPTODEV_FF_CPU_NEON
  represents ARM NEON (TM) instructions
* RTE_CRYPTODEV_FF_CPU_ARM_CE
  represents ARM crypto extensions

Add them to both cryptodev library, documentation and relevant
PMD driver for ARMv8.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
2017-01-19 01:00:55 +01:00
Zbigniew Bodek
169ca3db55 crypto/armv8: add PMD optimized for ARMv8 processors
This patch introduces crypto poll mode driver
using ARMv8 cryptographic extensions.
CPU compatibility with this driver is detected in
run-time and virtual crypto device will not be
created if CPU doesn't provide:
AES, SHA1, SHA2 and NEON.

This PMD is optimized to provide performance boost
for chained crypto operations processing,
such as encryption + HMAC generation,
decryption + HMAC validation. In particular,
cipher only or hash only operations are
not provided.

The driver currently supports AES-128-CBC
in combination with: SHA256 HMAC and SHA1 HMAC
and relies on the external armv8_crypto library:
https://github.com/caviumnetworks/armv8_crypto

Build ARMv8 crypto PMD if compiling for ARM64
and CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO option
is enable in the configuration file.
ARMV8_CRYPTO_LIB_PATH environment variable will
point to the appropriate library directory.

Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com>
Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-19 01:00:55 +01:00
Piotr Azarewicz
9c2a5775c0 crypto/aesni_gcm: migrate from MB library to ISA-L
Current Cryptodev AES-NI GCM PMD is implemented using Multi Buffer
Crypto library.This patch reimplement the device using ISA-L Crypto
library: https://github.com/01org/isa-l_crypto.

The migration entailed the following additional support for:
  * GMAC algorithm.
  * 256-bit cipher key.
  * Session-less mode.
  * Out-of place processing
  * Scatter-gatter support for chained mbufs (only out-of place and
    destination mbuf must be contiguous)

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:49:54 +01:00
Fan Zhang
d803b4439d cryptodev: add user defined name for vdev
This patch adds a user defined name initializing parameter to cryptodev
library.

Originally, for software cryptodev PMD, the vdev name parameter is
treated as the driver identifier, and will create an unique name for each
device automatically, which is not necessarily as same as the vdev
parameter.

This patch allows the user to either create a unique name for his software
cryptodev, or by default, let the system creates a unique one. This should
help the user managing the created cryptodevs easily.

Examples:
CLI command fragment 1: --vdev "crypto_aesni_gcm_pmd"
The above command will result in creating a AESNI-GCM PMD with name of
"crypto_aesni_gcm_X", where postfix X is the number assigned by the system,
starting from 0. This fragment can be placed in the same CLI command
multiple times, resulting the postfixs incremented by one for each new
device.

CLI command fragment 2: --vdev "crypto_aesni_gcm_pmd,name=gcm1"
The above command will result in creating a AESNI-GCM PMD with name of
"gcm1". This fragment can be placed in the same CLI command multiple
times, as long as each having a unique name value.

Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
50256b7f00 crypto/qat: add scatter gather to feature flags
This commit adds scatter gather option to Intel(R) QuickAssist
Technology driver feature flags.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:48:56 +01:00
Tomasz Kulasek
8f675fc72d crypto/openssl: support scatter-gather
Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Tomasz Kulasek
2d03ec6abd crypto: support scatter-gather in software drivers
This patch introduces RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER feature flag
informing that selected crypto device supports segmented mbufs natively
and doesn't need to be coalesced before crypto operation.

While using segmented buffers in crypto devices may have unpredictable
results, for PMDs which doesn't support it natively, additional check is
made for debug compilation.

Signed-off-by: Tomasz Kulasek <tomaszx.kulasek@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Piotr Azarewicz
5d63ef31d8 crypto/openssl: remove unneeded check
EVP_CIPHER_CTX_set_padding() function always returns 1, so the check is
unneeded.

Fixes: d61f70b4c9 ("crypto/libcrypto: add driver for OpenSSL library")

Signed-off-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
Tested-by: Zhaoyan Chen <zhaoyan.chen@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
d19db9f912 crypto/qat: fix IV size in capabilities
This patch sets iv size in qat PMD to 12 bytes to be
conformant with nist SP800-38D.

Fixes: 26c2e4ad5a ("cryptodev: add capabilities discovery")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
39dc49db37 crypto/aesni_gcm: fix IV size in capabilities
This patch sets iv size in aesni gcm PMD to 12 bytes to be
conformant with nist SP800-38D.

Fixes: eec136f3c5 ("aesni_gcm: add driver for AES-GCM crypto operations")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
2017-01-18 21:48:56 +01:00
Arek Kusztal
b9719b996a crypto/aesni_gcm: fix J0 padding bytes
This commit fixes pre-counter block (J0) padding by clearing
four most significant bytes before setting initial counter value.

Fixes: b2bb359747 ("crypto/aesni_gcm: move pre-counter block to driver")

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Piotr Azarewicz <piotrx.t.azarewicz@intel.com>
2017-01-18 21:48:56 +01:00
Declan Doherty
84d7965866 crypto/aesni_mb: support AVX512
Release v0.44 of Intel(R) Multi-Buffer Crypto for IPsec library adds
support for AVX512 instructions. This patch enables the new AVX512
accelerated functions from the aesni_mb_pmd crypto poll mode driver.

This patch set requires that the aesni_mb_pmd is linked against the
version 0.44 or greater of the Multi-Buffer Crypto for IPsec library.

Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-18 21:48:56 +01:00
Pablo de Lara
8772c3f713 crypto/aesni_mb: add single operation functionality
Update driver to use new AESNI Multibuffer IPSec library single
operation functionality (cipher only and authentication only).
This patch also adds tests for this new feature.

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:48:56 +01:00
Pablo de Lara
3413354ea1 crypto/aesni_mb: fix incorrect crypto session
When using sessionless crypto operations, crypto session
is obtained from a pool of sessions, when processing the
operation. Once the operation is processed, the session
is put back in the pool, but for the AESNI MB PMD, this
session was not being saved in the operation and therefore,
it did not return to the session pool.

Fixes: 924e84f873 ("aesni_mb: add driver for multi buffer based crypto")

Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
Acked-by: Declan Doherty <declan.doherty@intel.com>
2017-01-18 21:47:04 +01:00
Arek Kusztal
e09231eaa2 crypto/qat: add SGL capability
This commit adds scatter-gather list capability to Intel QuickAssist
Technology driver.

Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2017-01-18 21:47:04 +01:00