Since DPDK 20.11 the default rxdid is changed from 16 to 22, but the
DCF data path didn't change, the patch fix the gap.
Fixes: 12443386a0b0 ("net/ice: support flex Rx descriptor RxDID22")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Zhimin Huang <zhiminx.huang@intel.com>
When flow engine initialization or FXP resource reset failed, it needs
to free the memory zone and unregister the interrupt callback.
Bugzilla ID: 752
Fixes: 84dc7a95a2d3 ("net/ice: enable flow director engine")
Fixes: 7615a6895009 ("net/ice: rework for generic flow enabling")
Fixes: 7edc7158d771 ("net/ice: cleanup RSS/FDIR profile on device init")
Cc: stable@dpdk.org
Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The NFP4000/6000 supports a minimum of 256 Tx/Rx descriptors and not 64.
Before this patch when a DPDK application configured < 256 Tx
descriptors the hardware read/write pointers would be unmasked and not
wrapped at the expected size of the ring. The PMD logic to determine the
amount of free space in the Tx ring is incompatible with the unmasked
hwqueue pointers and this will result in the PMD not updating the
read pointer at all.The knock-on effect is that under high load the
PMD will potentially re-use a Tx descriptor before the hw has had a
chance to process that particular descriptor. This issue can manifest as
a DMA error when the hardware tries to perform a DMA with info from a
partially populated descriptor.
Fixes: defb9a5dd156 ("nfp: introduce driver initialization")
Cc: stable@dpdk.org
Signed-off-by: Heinrich Kuhn <heinrich.kuhn@corigine.com>
Signed-off-by: Simon Horman <simon.horman@corigine.com>
'ipn3ke_bridge_func' is a global variable and it used in net & raw
drivers.
It's only used for drivers, so change it from EXPERIMENTAL to INTERNAL.
Signed-off-by: Rosen Xu <rosen.xu@intel.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Ray Kinsella <mdr@ashroe.eu>
This patch add PDCP security short MAC-I support for
dpaa_sec driver.
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
To support short MAC-I, integrity only case is required
to be supported for PDCP.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
ATTACH_RESOURCES mailbox for CPT LFs is being called without
setting modify bit. Because of this previously attached NPA LF
to the CPT VF is getting removed, when only CPT VF is whitelisted.
This patch fixes the same.
Fixes: c045d2e5cbbc ("common/cnxk: add CPT configuration")
Cc: stable@dpdk.org
Signed-off-by: Srujana Challa <schalla@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This patch add support to also counter err pkt counter per queue.
This also enhances few related debug prints.
Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This patch improve storage and performance by force inline
of the keys.
Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
The logic was incorrectly doing conditional swap. It need to
be bit swap always.
Fixes: 73a24060cd70 ("crypto/dpaa2_sec: add sample PDCP descriptor APIs")
Cc: stable@dpdk.org
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
The space in descriptor buffer is scarce as it is limited to
64 words for platforms except ERA10 (which has 128).
As the descriptors are processed with QI, it adds some words
to the descriptor which is passed.
Some descriptors used for SDAP were using too much words reaching
the limit.
This patch reduces the number of words used by removing the inlining
of some keys (done for performance) in order to have working
descriptors.
Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
For SDAP, we are not using the protocol operation to perform
4G/LTE operation so the DPOVRD option is not used.
Removing it save some space in the descriptor buffer and
execution time.
Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
The offset of the HFN word and Bearer/Dir word is different
depending on type of PDB.
The wrong value was used.
This patch address this issue
Signed-off-by: Franck Lenormand <franck.lenormand@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This patch adds support for AES_CMAC integrity
in non-security mode.
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
add DES-CBC support and enable available cipher-only
test cases.
Signed-off-by: Gagandeep Singh <g.singh@nxp.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
The rte_cryptodev_pmd.* files are for drivers only and should be
private to DPDK, and not installed for app use.
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
The API rte_cryptodev_pmd_is_valid_dev, can be used
by the application as well as PMD to check whether
the device is valid or not. Hence, _pmd is removed
from the API.
The applications and drivers which use this API are
also updated.
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Update min tailroom to reflect IPsec additions.
PMD crypto_cn9k & crypto_cn10k would have packet
grow into tailroom post IPsec processing.
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
When given a source length 0 for CCM, the encryption and decryption
functions did not call the EVP_ENCRYPTUPDATE/EVP_DECRYPTUPDATE functions
with a src and dst, causing some FIPS validation failures for testcases
with PLen=0:
process_openssl_auth_encryption_ccm() line 1131:
Process openssl auth encryption ccm failed
Fixes: 1a4998dc4d94 ("crypto/openssl: support AES-CCM")
Cc: stable@dpdk.org
Signed-off-by: Ciara Power <ciara.power@intel.com>
Acked-by: Fan Zhang <roy.fan.zhang@intel.com>
Submit two instructions with one LMTST operation.
Also updated dequeue path to have local var for constants.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Swap is not required for ZUC. Update IV updation
sequence to remove the redundant swap in case of ZUC.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
The opcode for encryption & decryption is the
same and single routine would be able to handle
both encryption and decryption operations.
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Add support for ZUC API change in ucode 1.13
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
Signed-off-by: Vidya Sagar Velumuri <vvelumuri@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
This patch adds support for the timestamp format settings for
the receive and send queues. If the firmware version x.30.1000
or above is installed and the NIC timestamps are configured
with the real-time format, the default zero values for newly
added fields cause the queue creation to fail.
The patch queries the timestamp formats supported by the hardware
and sets the configuration values in queue context accordingly.
Fixes: 6152534e211e ("crypto/mlx5: support queue pairs operations")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
Added flow control based check to determine CPT IQ is full.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Added a common macro to set eventdev enqueue and
dequeue operations to reduce code.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
CPT can be told to submit events to SSO upon completion.
Crypto adapter uses this feature and the new flag can be
used to optimize receive path in those cases.
Signed-off-by: Shijith Thotton <sthotton@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
Use otx2_mbox_memcpy() instead of memcpy() to prevent unaligned access.
Fixes: a0645ed0d6ef ("crypto/octeontx2: discover capabilities")
Cc: stable@dpdk.org
Signed-off-by: Danny Patel <dannyp@marvell.com>
Signed-off-by: Anoob Joseph <anoobj@marvell.com>
The QP setup function allocates buffer for its
opaque MR and register it into MR structure.
After buffer allocation and before MR registration,
it tries allocate MR Btree.
When the MR Btree allocation fails, the buffer was
not freed what caused a memory leak.
Allocate the MR Btree before buffer alloction.
Fixes: 0165bccdb45f ("compress/mlx5: add memory region management")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
IPsec verify functions can be made common which can
be used for both cn9k and cn10k
Signed-off-by: Archana Muniganti <marchana@marvell.com>
Acked-by: Akhil Goyal <gakhil@marvell.com>
