Commit Graph

21593 Commits

Author SHA1 Message Date
Anatoly Burakov
dd46777794 test/malloc: run realloc tests on external heap
Due to the fact that the rte_realloc() test depends on the layout of
underlying memory, it can sometimes fail due to fragmentation of the
memory. To address this, make it so that the realloc autotests are run
using a newly created external memory heap instead of main memory.

Bugzilla ID: 424

Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com>
Tested-by: David Christensen <drc@linux.vnet.ibm.com>
2020-04-21 14:57:40 +02:00
Konstantin Ananyev
7c5e68cb26 test/ring: add functional tests for new sync modes
Extend test_ring_autotest with new test-cases for RTS/HTS sync modes.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 12:52:55 +02:00
Konstantin Ananyev
582581d578 test/ring: add stress test for MT peek API
Introduce new test case to test MT peek API.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 12:52:55 +02:00
Konstantin Ananyev
664ff4b172 ring: introduce peek style API
For rings with producer/consumer in RTE_RING_SYNC_ST, RTE_RING_SYNC_MT_HTS
mode, provide an ability to split enqueue/dequeue operation
into two phases:
      - enqueue/dequeue start
      - enqueue/dequeue finish
That allows user to inspect objects in the ring without removing
them from it (aka MT safe peek).

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 12:52:55 +02:00
Konstantin Ananyev
1cf65e4341 test/ring: add contention stress test for HTS ring
Introduce new test case to test HTS ring mode under contention.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 12:52:55 +02:00
Konstantin Ananyev
1cc363b8ce ring: introduce HTS ring mode
Introduce head/tail sync mode for MT ring synchronization.
In that mode enqueue/dequeue operation is fully serialized:
only one thread at a time is allowed to perform given op.
Suppose to reduce stall times in case when ring is used on
overcommitted cpus (multiple active threads on the same cpu).

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 12:52:55 +02:00
Konstantin Ananyev
a9e23c7f0b test/ring: add contention stress test for RTS ring
Introduce new test case to test RTS ring mode under contention.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 12:52:55 +02:00
Konstantin Ananyev
e6ba4731c0 ring: introduce RTS ring mode
Introduce relaxed tail sync (RTS) mode for MT ring synchronization.
Aim to reduce stall times in case when ring is used on
overcommited cpus (multiple active threads on the same cpu).
The main difference from original MP/MC algorithm is that
tail value is increased not by every thread that finished enqueue/dequeue,
but only by the last one.
That allows threads to avoid spinning on ring tail value,
leaving actual tail value change to the last thread in the update queue.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 12:52:55 +02:00
Konstantin Ananyev
ebff988d0c ring: prepare ring to allow new sync schemes
To make these preparations two main things are done:
- Change from *single* to *sync_type* to allow different
  synchronisation schemes to be applied.
  Mark *single* as deprecated in comments.
  Add new functions to allow user to query ring sync types.
  Replace direct access to *single* with appropriate function call.
- Move actual rte_ring and related structures definitions into a
  separate file: <rte_ring_core.h>. It allows to refer contents
  of <rte_ring_elem.h> from <rte_ring.h> without introducing a
  circular dependency.

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 11:34:09 +02:00
Konstantin Ananyev
bf28df24e9 test/ring: add contention stress test
Introduce stress test for ring enqueue/dequeue operations.
Performs the following pattern on each slave worker:
dequeue/read-write data from the dequeued objects/enqueue.
Serves as both functional and performance test of ring
enqueue/dequeue operations under high contention
(for both over committed and non-over committed scenarios).

Signed-off-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
Acked-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com>
2020-04-21 11:34:09 +02:00
Pavan Nikhilesh
da4eae278b build: add global libatomic dependency for 32-bit clang
Add libatomic as a global dependency when compiling for 32-bit using
clang. As we need libatomic for 64-bit atomic ops.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-04-21 11:34:09 +02:00
Thomas Monjalon
4a4e0622eb devtools: skip ABI check in static builds
When running make with CONFIG_RTE_BUILD_SHARED_LIB=n,
no shared library is built.
In this case, no need to run ABI check.

With meson, both shared and static libraries are always built.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: Ray Kinsella <mdr@ashroe.eu>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-04-21 11:17:42 +02:00
Thomas Monjalon
1cab496414 devtools: reduce examples in static builds
Static builds can take a lot of space, so reduce the number of examples
built when testing those static builds.

As makefile-based build is close to end of life, completely skip examples
in case of static linkage with make.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Acked-by: David Marchand <david.marchand@redhat.com>
2020-04-21 11:17:38 +02:00
Bruce Richardson
4e648fb70c ci: reduce examples in static builds
Static builds can take a lot of space, so reduce the number of examples
built when doing those static builds.

Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2020-04-17 23:34:08 +02:00
Ferruh Yigit
d3c9274f76 examples/vm_power_manager: fix build
Build fails because '__rte_unused' macro not defined in file, error
produced by 'i686-native-linux-gcc config' but it seems generic issue.

Build error:
.../examples/vm_power_manager/oob_monitor_nop.c:11:13:
   error: expected ‘;’ before ‘static’
   11 | __rte_unused static float
      |             ^~~~~~~
      |             ;
.../examples/vm_power_manager/oob_monitor_nop.c:12:14:
   error: unknown type name ‘__rte_unused’
   12 | apply_policy(__rte_unused int core)
      |              ^~~~~~~~~~~~
.../examples/vm_power_manager/oob_monitor_nop.c:18:21:
   error: unknown type name ‘__rte_unused’
   18 | add_core_to_monitor(__rte_unused int core)
      |                     ^~~~~~~~~~~~
.../examples/vm_power_manager/oob_monitor_nop.c:24:26:
   error: unknown type name ‘__rte_unused’
   24 | remove_core_from_monitor(__rte_unused int core)
      |                          ^~~~~~~~~~~~

Including 'rte_common.h' header which defines the macro for fix.

Fixes: f2fc83b40f ("replace unused attributes")

Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
2020-04-17 23:22:15 +02:00
David Marchand
97ad1fd90d eal/ppc: fix build
Compilation is broken on ppc:

  CC otx2_rx.o
In file included from .../drivers/net/octeontx2/otx2_rx.c:5:0:
.../builds/ppc_64-power8-linux-gcc/include/rte_vect.h:29:17:
error: expected declaration specifiers or ‘...’ before numeric constant
 } __rte_aligned(16) rte_xmm_t;
                 ^~
compilation terminated due to -Wfatal-errors.

Fixes: f35e5b3e07 ("replace alignment attributes")

Signed-off-by: David Marchand <david.marchand@redhat.com>
Tested-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-17 17:45:20 +02:00
Thomas Monjalon
b11ecebc04 doc: remove similar columns from NIC features matrix
The PMDs bnx2x and nfp have a separate column for VF.
Such separation is unneeded because the features are the same.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 23:55:49 +02:00
Thomas Monjalon
7b103c4ccd doc: remove empty columns from NIC features matrix
The virtual PMDs bonding, KNI, null, ring, softnic and vdev_netvsc
have no real feature to advertise so they can be removed
from the (too) big matrix of ethdev features.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 23:55:49 +02:00
Thomas Monjalon
cc64c593a7 doc: fix matrix CSS for recent sphinx
It seems sphinx >= 2.0 is inserting a <p> tag in each table cell.
The feature table (matrix) style needs to be updated to avoid
cells being too big.

The margin, padding and line height are overridden.
The font size in percentage is replaced with an equivalent pixel size.
The border is explicit because it disappeared for th.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 22:15:16 +02:00
Thomas Monjalon
b2a6d7e048 log: fix level picked with globbing on type register
When a log type is registered, the level can be picked
by matching saved options.
The check of fnmatch globbing result was reversed.

The same bug was already fixed in a similar function.
This one is acting in log type register function.

Note: this function rte_log_register_type_and_pick_level()
is not used a lot and could be merged with rte_log_register().

Fixes: 6ff0f81d0e ("log: fix pattern matching")
Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 19:19:02 +02:00
Thomas Monjalon
2d20636989 devtools: check use of compiler attributes
The keyword __attribute__ will emit a warning,
because it is preferred to use or define a common __rte macro.
The centralized macros may help to control or workaround some compilers.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
ddcd7640ca replace no-return attributes
The new macro __rte_noreturn, for compiler hinting,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
ce6427ddca replace cold attributes
The new macro __rte_cold, for compiler hinting,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
e3866e7355 replace hot attributes
The new macro __rte_hot, for compiler hinting,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
cd1e868037 replace used attributes
The new macro __rte_used, forcing symbol to be generated,
is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
f2fc83b40f replace unused attributes
There is a common macro __rte_unused, avoiding warnings,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:30:58 +02:00
Thomas Monjalon
d0ac7bb577 replace no-inline attributes
There is a macro __rte_noinline, preventing function to be inlined,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:16:46 +02:00
Thomas Monjalon
33011cb3df replace always-inline attributes
There is a macro __rte_always_inline, forcing functions to be inlined,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:16:46 +02:00
Thomas Monjalon
ef5baf3486 replace packed attributes
There is a common macro __rte_packed for packing structs,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:16:46 +02:00
Thomas Monjalon
f35e5b3e07 replace alignment attributes
There is a common macro __rte_aligned for alignment,
which is now used where appropriate for consistency.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Reviewed-by: David Christensen <drc@linux.vnet.ibm.com>
2020-04-16 18:16:18 +02:00
Thomas Monjalon
6c9d13410b common/mlx5: replace alignas keyword
The keyword alignas can be replaced with __rte_aligned macro
for consistency and allow compilers compatibility control.

The macro __rte_cache_aligned is a shortcut including __rte_aligned
and RTE_CACHE_LINE_SIZE constant.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:07:30 +02:00
Thomas Monjalon
ddf06e8a08 net/memif: use common macros for cache line marker
The macros RTE_MARKER and __rte_cache_aligned can be used
for consistency for describing MEMIF_CACHELINE_ALIGN_MARK.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:07:29 +02:00
Thomas Monjalon
bf9fadacb5 net/mlx5: replace destructor syntax with common macro
There is a macro RTE_FINI for destructors,
which is now used where appropriate for consistency.

The destructor function mlx5_pmd_socket_uninit does not need
to be declared separately in mlx5.h.

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-16 18:07:29 +02:00
Akhil Goyal
53c83e42cd ipsec: fix build dependency on hash lib
rte_ipsec has a dependency on rte_hash
So we need the librte_hash to be compiled before librte_ipsec.
Add the DEPDIRs to make sure this.

Fixes: 3feb23609c ("ipsec: add SAD create/destroy implementation")
Cc: stable@dpdk.org

Reported-by: Raslan Darawsheh <rasland@mellanox.com>
Suggested-by: Ferruh Yigit <ferruh.yigit@intel.com>
Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-04-16 14:06:03 +02:00
Mattias Rönnblom
c3eb8b6274 event/dsw: fix gcc 4.8 false positive warning
Add redundant stack variable initialization to work around
false-positive warnings in older versions of GCC.

Fixes: 1f2b99e8d9 ("event/dsw: improve migration mechanism")

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2020-04-15 21:45:36 +02:00
Jerin Jacob
d6d084849a maintainers: update for Marvell OCTEON TX2
Vamsi is no longer associated with Marvell.
Updating Marvell OCTEON TX2 PMDs MAINTAINERS file.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2020-04-15 19:32:17 +02:00
Suanming Mou
fc202a6f2a bitmap: add init with all bits set
Currently, in the case to use bitmap as resource allocator, after
bitmap creation, all the bitmap bits should be set to indicate the
bit available. Every time when allocate one bit, search for the set
bits and clear it to make it in use.

Add a new rte_bitmap_init_with_all_set() function to have a quick
fill up the bitmap bits.

Comparing with the case create the bitmap as empty and set the bitmap
one by one, the new function costs less cycles.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
2020-04-15 16:10:12 +02:00
Thomas Monjalon
5f1a4a8a12 test: remove meson dependency on /proc file
Meson is detecting the path /proc/sys/vm/nr_hugepages in the call to cat
in app/test/meson.build and then adding it as a build dependency.
This causes build loop if the timestamp of this file keeps changing.

It is fixed by hiding hugepage check in a shell script.

Fixes: 77784ef0fb ("test: allow no-huge mode for fast-tests")

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
Tested-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com>
Reviewed-by: Lukasz Wojciechowski <l.wojciechow@partner.samsung.com>
Acked-by: Aaron Conole <aconole@redhat.com>
Reviewed-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Bruce Richardson <bruce.richardson@intel.com>
2020-04-15 15:45:24 +02:00
Thomas Monjalon
10d34aa3de doc: fix sphinx compatibility
The function add_stylesheet() is deprecated since sphinx 1.8.
It will be removed in sphinx 4.0.
It is replaced by add_css_file().

Cc: stable@dpdk.org

Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
2020-04-15 15:21:06 +02:00
Hemant Agrawal
f34cb24522 maintainers: update for rawdev
Replace rawdev maintainer. Shreyansh is no longer with NXP.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Nipun Gupta <nipun.gupta@nxp.com>
2020-04-15 15:03:37 +02:00
Liron Himi
86fdced4d1 maintainers: update for Marvell ARMADA
update MRVL PMDs, Tomasz is no longer with semihalf

Signed-off-by: Liron Himi <lironh@marvell.com>
2020-04-15 14:55:56 +02:00
Pavan Nikhilesh
f97b817ce4 event/octeontx2: use C11 atomics for statistics
Use c11 atomics with RELAXED ordering instead of rte_atomic ops which
enforce unnessary barriers on arm64.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
2020-04-04 18:38:43 +02:00
Pavan Nikhilesh
092454d999 examples/l2fwd-event: add option to configure port pairs
Current l2fwd-event application statically configures adjacent ports as
destination ports for forwarding the traffic.

Add a config option to pass the forwarding port pair mapping which allows
the user to configure forwarding port mapping.

If no config argument is specified, destination port map is not
changed and traffic gets forwarded with existing mapping.

To align port/queue configuration of each lcore with destination port
map, port/queue configuration of each lcore gets modified when config
option is specified.

Ex: ./l2fwd-event -c 0xff -- -p 0x3f -q 2 --config="(0,3)(1,4)(2,5)"

With above config option, traffic received from portid = 0 gets forwarded
to port = 3 and vice versa, similarly traffic gets forwarded on other port
pairs (1,4) and (2,5).

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Andrzej Ostruszka <aostruszka@marvell.com>
2020-04-04 18:09:51 +02:00
Pavan Nikhilesh
9fdc9986cf app/eventdev: validate producer type
Validate the producer type used for pipeline and order test suites.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2020-04-04 17:11:23 +02:00
Mattias Rönnblom
b97d3a9cbc event/dsw: add port busy cycles xstats
DSW keeps an internal port load estimate, used by the load balancing
mechanism. As a side effect, it keeps track of the total number of
busy cycles since startup. This metric is indirectly exposed in the
form of DSW xstats' "port_<n>_event_proc_latency", which is the total
number of busy cycles divided by the total number of events processed
on a particular port.

An external application can take (event_latency * dequeued) to go back
to busy_cycles. One reason for doing this is to measure the port's
load during a longer time period, without resorting to sampling
"port_<n>_load". However, as the number dequeued events grows, a
rounding error in event_latency renders the application-calculated
busy_cycles inaccurate.

Thus, it makes sense to directly expose the number of busy cycles as a
DSW xstats, even though it might seem redundant.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2020-04-04 16:32:19 +02:00
Mattias Rönnblom
cea7bc6713 event/dsw: remove unnecessary read barrier
Remove unnecessary read barrier (and misleading comment) on control
message dequeue.

Fixes: f6257b22e7 ("event/dsw: add load balancing")
Cc: stable@dpdk.org

Suggested-by: Ola Liljedahl <ola.liljedahl@arm.com>
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2020-04-04 16:32:14 +02:00
Mattias Rönnblom
65388325f1 event/dsw: remove redundant control ring poll
On dequeue, polling the control ring once is enough.

Fixes: f6257b22e7 ("event/dsw: add load balancing")
Cc: stable@dpdk.org

Suggested-by: Ola Liljedahl <ola.liljedahl@arm.com>
Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2020-04-04 16:32:02 +02:00
Mattias Rönnblom
570ac17b8c event/dsw: avoid migration waves in large systems
DSW limits the rate of migrations on a per-port basis. Hence, as the
number of cores grows, so does the total migration capacity.

In high core-count systems, this allows for a situation where flows
are migrated to a lightly loaded port which recently already received
a number of new flows (from other ports). The processing load
generated by these new flows may not yet be reflected in the lightly
loaded port's load estimate. The result is that the previously lightly
loaded port is now overloaded.

This patch adds a rough estimate of the size of the inbound migrations
to a particular port, which can be factored into the migration logic,
avoiding the above problem.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2020-04-04 16:32:02 +02:00
Mattias Rönnblom
1f2b99e8d9 event/dsw: improve migration mechanism
Allowing moving multiple flows in one migration transaction, to
rebalance load more quickly.

Introduce a threshold to avoid migrating flows between ports with very
similar load.

Simplify logic for selecting which flow to migrate. The aim is now to
move flows in such a way that the receiving port is as lightly-loaded
as possible (after receiving the flow), while still migrating enough
flows from the source port to reduce its load. This is essentially how
legacy strategy work as well, but the code is more readable.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2020-04-04 16:32:02 +02:00
Mattias Rönnblom
c4cf44b677 event/dsw: extend xstats
To allow visualization of migrations, track the number flow
immigrations in "port_<N>_immigrations". The "port_<N>_migrations"
retains legacy semantics, but is renamed "port_<N>_emigrations".

Expose the number of events currently undergoing processing
(i.e. pending releases) at a particular port.

Signed-off-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2020-04-04 16:25:56 +02:00