48 Commits

Author SHA1 Message Date
Qi Zhang
e123d30f4a net/ice/base: remove unnecessary if branch
We are already in the branch "if (fm_list->vsi_count == 1)"
no need to exit and re-enter.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
dbe449e5dc net/ice/base: remove unnecessary dummy packet finding
We don't need to find a dummy packet when removing a rule so remove
the call to get the dummy packet. This also obviates some variables
so remove them also.

Also reduce the scope of rule_buf_sz.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c3d6ac02c0 net/ice/base: update switch training packets with open ports
This patch updates UDP tunneled training packets with an appropriate
UDP dest port. For the correct profile to be chosen, an open tunnel
port must be included in the training packet.

Added GENEVE tunnel labels in the test package in order to test GENEVE
tunnel rule creation.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
c932653c36 net/ice/base: maximize switch recipe words per line
Remove grouping rules to maximize the number of words placed into
a recipe line. This will allow more recipes to be added by reducing
the number of result indices required.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
58f116731d net/ice/base: refactor removal of VLAN promiscuous rules
Currently ice_clear_vsi_promisc() detects if the VLAN ID sent is not 0
and sets the recipe_id to ICE_SW_LKUP_PROMISC_VLAN in that case and
ICE_SW_LKUP_PROMISC if the VLAN_ID is 0. However this doesn't allow VLAN
0 promiscuous rules to be removed, but they can be added. Fix this by
checking if the promisc_mask contains ICE_PROMISC_VLAN_RX or
ICE_PROMISC_VLAN_TX. This change was made to match what is being done
for ice_set_vsi_promisc().

Signed-off-by: Brett Creeley <brett.creeley@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
21b28a9ef7 net/ice/base: fix flag settings in AQ call
Removed setting Read flag in the Get Allocated Resource Descriptors AQ
command (0x020A). The read flag is not required for this command and
causes the FW to return an error.

Fixes: d781ccbdd15d ("net/ice/base: add functions to get allocated resources")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
b32be950a3 net/ice/base: remove unnecessary conditional check
There is no reason to do this conditional check before the assignment so
simply remove it.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
f636f2888c net/ice/base: move and add some help function and macros
The patch move ice_ilog2 and ice_is_pow2 to ice_type.h, also add help
macro ROUND_UP and IS_ETHER_ADDR_EQUAL.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
eda40e22b8 net/ice/base: improve switch chained recipe
When updating switch database with chained recipes from
firmware, where a null pointer derefence was occurring due to looking
into a sub-recipe entry which is not filled in.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
8b6e6e4024 net/ice/base: update UDP tunnel switch training packets
Change UDP tunnel training packets for the switch to work for both
Geneve and VXLAN cases.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
aa6ff47ad8 net/ice/base: return switch error on invalid match criteria
Modify ice_add_adv_rule to return an error when an invalid match
criteria is requested by the caller. This happens when the protocol
and offset pair is not supported by the package.

This change required a fix for the offset in the VXLAN GPE header,
and also found an issue with NVGRE where the package does not seem
to extract the correct offsets.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
55744222e6 net/ice/base: associate recipes by profile type
Change recipe to profile association logic to determine the profile type
to determine if a profile is compatible with the rule being added.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
18a6dd5222 net/ice/base: improve switch advanced rule
Correct algorithm to detect free field vector indexes to be
used for recipe line result values. The code now scans all
recipes that are associated with all the field vector being
targed for a new recipe to detect which result indexes are
unused.

Change recipe chaining code to place recipe on a single line
if it will fit, rather than looking to break things apart
according to preferred combinations.

These improvements fix a condition where recipes were getting
added with conflicting result index values.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
d1c2f76b44 net/ice/base: support GTP and PPPoE protocols
Added switch protocol segments for both GTP and PPPOE protocols.
Added RSS protocol segments for both GTP and PPPOE protocols.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
2019-10-07 15:00:53 +02:00
Qi Zhang
04221f0b3e net/ice/base: fix resource leak
We don't free s_rule if ice_aq_sw_rules() returns a non-zero status. If
it returned a zero status, s_rule would be freed right after, so this
implies it should be freed within the scope of the function regardless.

Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Cc: stable@dpdk.org

Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-07-24 16:00:57 +02:00
Qi Zhang
b83a0c2903 net/ice/base: fix inner TCP and UDP support for GRE
The dummy packets for GRE were set up for IP, but not inner
TCP or UDP. There are some applications that want to be
able to parse on those inner L4 headers so add them to
the dummy packets.

Also, the GRE dummy packet was formatted differently from
the other dummy packets so change the formatting to match
all the other dummy packets.

Fixes: 839c0a4b77e6 ("net/ice/base: enable additional switch rules")

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
2019-07-24 16:00:57 +02:00
Leyi Rong
60687da86a net/ice/base: fix inner L2 offset in GRE dummy packet
The offset for the inner L2 header in the dummy GRE packet
was off by 2 bytes so updated the offset.

Fixes: 839c0a4b77e6 ("net/ice/base: enable additional switch rules")

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
ee3e244afb net/ice/base: support ethertype switch filters
Add protocol definitions for ethertype.
Add ice_ethtype_hdr structure definition into the ice_prot_hdr union.
Add ethtype offsets into the training packet maps.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Tested-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
38d9b0b03c net/ice/base: support IPv6 based switch filters
- Add IPv6 switch rule support.
- Add IPv6 training packet.
- Correct name of IPv6 header variable.
- Fix enum values so that they point to the proper
  ice_prot_ext_tbl_entry field.

Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-07-03 12:57:30 +02:00
Leyi Rong
21cb08fe68 net/ice/base: reduce calls to get profile associations
Added refresh_required flag to determine if we need to update the
recipe to profile mapping cache. This will reduce the number of
calls made to refresh the profile map.

Signed-off-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
8d0fa8c7f5 net/ice/base: fix NVGRE header structure
Correct NVGRE header structure and its field offsets.

Fixes: 04b8ec1ea807 ("net/ice/base: add protocol structures and defines")
Cc: stable@dpdk.org

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
95d3619b09 net/ice/base: reduce adding advanced rule time
While calling ice_find_recp we were calling ice_get_recp_to_prof_map
every time we called ice_find_recp. ice_get_recp_to_prof_map is a very
expensive operation and we should try to reduce the number of times we
call this function. So moved it into ice_get_recp_frm_fw since we only
need to have fresh recp_to_profile mapping when we we check FW to see if
the recipe we are trying to add already exists in FW.

Signed-off-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
776b48c112 net/ice/base: allow forward to Q groups in switch rule
Enable forward to Q group action in ice_add_adv_rule.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
839c0a4b77 net/ice/base: enable additional switch rules
Add capability to create inner IP and inner TCP switch recipes and
rules. Change UDP tunnel dummy packet to accommodate the training of
these new rules.

Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
42fde0faf9 net/ice/base: cleanup unused code
Cleanup the useless code.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:49 +02:00
Leyi Rong
fe59c0a131 net/ice/base: fix Rx functionality for ethertype filters
In the function ice_add_eth_mac(), there is a line that
hard-codes the filter info flag to TX. This is redundant
and inaccurate. That flag will be set by the calling
function that built the list of filters to add, and
hard-coding it eliminates the Rx functionality of this
code. The paired function ice_remove_eth_mac() does not
do this, making a mis-matched pair.

Fixes: 157d00901f97 ("net/ice/base: add functions for ethertype filter")
Cc: stable@dpdk.org

Signed-off-by: Dave Ertman <david.m.ertman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
421d265c2a net/ice/base: protect list add with lock
Function ice_add_rule_internal needs to call ice_create_pkt_fwd_rule
with lock held because it uses the LIST_ADD to modify the filter
rule list. It needs to be protected when modified.

Signed-off-by: Tarun Singh <tarun.k.singh@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
79aec8237c net/ice/base: eliminate semantic parser warnings
Eliminate some semantic warnings, static analysis warnings.

Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Kevin Scott <kevin.c.scott@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
192ea17693 net/ice/base: forbid VSI to remove unassociated ucast filter
If a VSI is not using a unicast filter or did not configure that
particular unicast filter, driver should not allow it to be removed
by the VSI.

Signed-off-by: Akeem G Abodunrin <akeem.g.abodunrin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
9a716e7d00 net/ice/base: move RSS replay list
1. Move the RSS list pointer and lock from the VSI context to the ice_hw
structure. This is to ensure that the RSS configurations added to the
list prior to reset and maintained until the PF is unloaded. This will
ensure that the configuration list is unaffected by VFRs that would
destroy the VSI context. This will allow the replay of RSS entries for
VF VSI, as against current method of re-adding default configurations
and also eliminates the need to re-allocate the RSS list and lock post-VFR.
2. Align RSS flow functions to the new position of the RSS list and lock.
3. Adding bitmap for flow type status.

Signed-off-by: Vignesh Sridhar <vignesh.sridhar@intel.com>
Signed-off-by: Henry Tieman <henry.w.tieman@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
f89aa3affa net/ice/base: support removing advanced rule
This patch also contains ice_remove_adv_rule function to remove existing
advanced rules. It also handles the case when we have multiple VSI using
the same rule using the following helper functions:

ice_adv_rem_update_vsi_list - function to remove VS from VSI list for
advanced rules.

Signed-off-by: Shivanshu Shukla <shivanshu.shukla@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
e215716441 net/ice/base: replay advanced rule after reset
Code added to replay the advanced rule per VSI basis and remove the
advanced rule information from shared code recipe list.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
fed0c5ca5f net/ice/base: support programming a new switch recipe
1. Added an interface to support adding advanced switch rules.
2. Advanced rules are provided in a form of protocol headers and values
to match in addition to actions (limited actions are current supported).
3. Retrieve field vectors for ICE configuration package to determine
extracted fields and extracted locations for recipe creation.
4. Chain multiple recipes together to match multiple protocol headers.
5. Add structure to manage the dynamic recipes.

Signed-off-by: Grishma Kotecha <grishma.kotecha@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Leyi Rong
afa96f6fb7 net/ice/base: add functions to create new switch recipe
Add functions to support following admin queue commands:
1. 0x0208: allocate resource to hold a switch recipe. This is needed
when a new switch recipe needs to be created.
2. 0x0290: create a recipe with protocol header information and
other details that determine how this recipe filter work.
3. 0x0292: get details of an existing recipe.
4. 0x0291: associate a switch recipe to a profile.

Signed-off-by: Grishma Kotecha <grishma.kotecha@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Leyi Rong <leyi.rong@intel.com>
Acked-by: Maxime Coquelin <maxime.coquelin@redhat.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2019-06-28 20:31:48 +02:00
Qi Zhang
abd6cd540e net/ice/base: update copyright time
Update copyright time to 2019.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
cc842daddd net/ice/base: fix minor issues
1. ICE_SW_LKUP_LAST need to be handled correctly in
ice_aq_alloc_free_vsi_list and ice_update_vsi_list_rule
2. ICE_SW_LKUP_ETHERTYPE_MAC need to be handled correctly in
ice_update_vsi_lkup_fltr
3. free package segment pointer during ice_deinit_hw

Fixes: c7dd15931183 ("net/ice/base: add virtual switch code")
Fixes: 453d087ccaff ("net/ice/base: add common functions")

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
e1494d05b2 net/ice/base: add helper functions for flow management
1. ice_rem_all_sw_rules_info - remove all switch rules.
2. ice_reply_all_fltr - replay all filters stored in book keeping list.

These APIs will be used when switch rule feature is enabled.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
02acdce2f5 net/ice/base: add MAC filter with marker and counter
1. ice_add_mac_with_sw_marker - add filter with software marker.
2. ice_add_mac_with_counter - add filter with counter enabled.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
8fc7f70837 net/ice/base: add functions to get VSI promiscuous mode
1. ice_get_vsi_promisc - get promiscuous mode of give VSI.
2. ice_get_vsi_vlan_promisc - get VLAN promiscuous mode of given VSI.

PMD may use these APIs to check the real HW status, but not rely on
a software flag when something abnormal.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
f1ffdec6cf net/ice/base: add functions for resource counter
1. ice_alloc_res_cntr - allocate resource counter
2. ice_free_res_cntr - free resource counter
3. ice_alloc_vlan_res_counter - allocate vlan resource counter
4. ice_free_vlan_res_counter - free vlan resource counter

These APIs will be used when try to count the number of a flow be
hit.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
d781ccbdd1 net/ice/base: add functions to get allocated resources
1. ice_aq_get_res_alloc - get allocated resources.
2. ice_aq_get_res_descs - get allocated resource descriptors.

These APIs may help to PMD to enable some debug utilities to
dump the resource allocation status.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
157d00901f net/ice/base: add functions for ethertype filter
Add API ice_remove_eth_mac and ice_add_eth_mac to support
adding / removing ethertype (or MAC) based filter rules.

PMD driver can use these APIs to enable related rte_flow rule.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
ad4bd56a0d net/ice/base: add VSI queue context framework
Added code to allocate VSI queue contexts to save the queue specific
information like bandwidth etc.

Signed-off-by: Victor Raj <victor.raj@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
b42d6885fe net/ice/base: add more APIs in switch module
Add below APIs in switch module

1. ice_aq_get_vsi_params -  get VSI context info
2. ice_aq_add_update_mir_rule - add/update mirror rule
3. ice_aq_delete_mir_rule - delete mirror rule
4. ice_aq_set_storm_ctrl - set storm control configuration
5. ice_aq_get_storm_ctrl - get storm control configuration

PMD can use these APIs to enable mirror rule and storm control
related features.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
ef165e0a1d net/ice/base: declare functions as external
Remove static of below functions and declare them as external
APIs.

ice_aq_add_vsi
ice_aq_free_vsi
ice_aq_update_vsi
ice_aq_add_lan_txq
ice_init_pkg

So far the purpose is just to sync with kernel driver.
They are reserved for future use.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
0c451c3198 net/ice/base: improve comments
Improve comments to follow naming rules.
Also the patch include some minor cleanup.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Qi Zhang
c88a5ede58 net/ice/base: add switch resource allocation and free
Add two APIs ice_alloc_sw and ice_free_sw to support
switch related resource allocation and free.

These APIs are required when we enable switch flow.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
Reviewed-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
2019-03-29 17:25:31 +01:00
Paul M Stillwell Jr
c7dd159311 net/ice/base: add virtual switch code
Add code to handle the virtual switch within the NIC.

Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-12-21 16:22:40 +01:00