The PCI DSN (device serial number) to format package file name should be
lowercase values.
Fixes: d1c91179e952 ("net/ice: check DSN package file firstly")
Cc: stable@dpdk.org
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
The action number for switch filter should be 1, any
other such as 0 or more than 1 is invalid.
Fixes: 3428c6b6ec1f ("net/ice: add action number check for switch")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Tested-by: Qimai Xiao <qimaix.xiao@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Base on HW, if a packet is split into multiple segments, the L2TAG
should only be valid on the last Rx descriptor. So fix it by setting
L2TAG into mbuf when processing the last split packet.
Fixes: c68a52b8b38c ("net/ice: support vector SSE in Rx")
Cc: stable@dpdk.org
Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Use a common function when selecting the proper word and mask match for
a tunnel type when programming switch rules.
Store switch recipe field mask as little endian, which avoids needing to
convert back to big endian after reading recipe from FW.
Obtain word mask from FW recipe.
Fix word matching element and index pairing.
Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
All supported pattern for GTPU include extend header:
pattern_eth_ipv4_gtpu_eh_ipv4
pattern_eth_ipv4_gtpu_eh_ipv4_udp
pattern_eth_ipv4_gtpu_eh_ipv4_tcp
So the RSS rule should only take effect on GTPU packet that contains
extend header. The patch fix above issue and also allow inner l4 port
as input set.
Fixes: c08a72c79c7f ("net/ice: fix pattern name of GTPU with extension header")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Tested-by: Simei Su <simei.su@intel.com>
This patch adds support for FDIR passthrough mode. When FDIR rule
hits, FDIR just forward this packet to the next stage filter.
Fixes: 55daca4e45fc ("net/ice/base: change function to static")
Signed-off-by: Simei Su <simei.su@intel.com>
Tested-by: Xiaoxiao Zeng <xiaoxiaox.zeng@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The dummy packet for pppoe-ipv6 has an error, we should
use 0x3b for next header in ipv6 header in the dummy packet,
or some case can not be download, such as:
"eth / pppoes seid is 3 / pppoe_proto_id is 0x0057 /
end actions vf id 1 / end"
Fixes: 55d61fb27a5e ("net/ice/base: add PPPoE IPv6 dummy packet")
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
IAVF FDIR needs to check program status from FD completion descriptors
for both successful and failed case, rather than only ask for completion
on error. This patch corrects completion report value so that the called
can determine whether to report completion on error or other cases.
Fixes: 55daca4e45fc ("net/ice/base: change function to static")
Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The number of queues in queue group should be checked before
using it. This patch fixed the issue.
Fixes: 47d460d63233 ("net/ice: rework switch filter")
Cc: stable@dpdk.org
Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Tested-by: Qimai Xiao <qimaix.xiao@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
This patch fixes issue that doesn't support mark only case.
Mark only action is equal to mark + passthru action.
Fixes: f5cafa961fae ("net/ice: add flow director create and destroy")
Cc: stable@dpdk.org
Signed-off-by: Simei Su <simei.su@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
When we download a switch rule for ipv6 with esp payload
"eth / ipv6 / esp spi is 1 / end actions queue index 2 / end"
if we don't add bm bit set check for tun_type, then a packet of
ipv4 with esp payload
"sendp([Ether(dst="00:00:00:00:01:00")/IP(proto=50)/ESP(spi=1)/
("X"*480)], iface="ens5f0", count=10)"
Will also go to queue index 2. And also, we need to do tun_type
check, or the second rule of following can not be download because
of rejection from switch rule download function ice_aq_sw_rules().
"eth / ipv4 / esp spi is 1 / end actions queue index 5 / end"
"eth / ipv6 / esp spi is 1 / end actions queue index 2 / end"
Fixes: 4f11962fce84 ("net/ice/base: support AH ESP and NAT-T on switch")
Fixes: 99d8ba79efbe ("net/ice/base: force switch to use different recipe")
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Tested-by: Qi Fu <qi.fu@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
1. ln_en bit should not be turned on, since we only support Rx VEB.
2. lan_en bit need to be turned on for a DCF switch rule, otherwise
any Tx packet that hit on a rule will be dropped.
Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Ideally a rule with "TO VSI LIST" action should not be deleted when one
of the VF reset happens. The correct action by kernel PF driver is to
remove the VSI of a reset VF from the VSI list, but this is not
implemented in kernel PF yet, so workaround is the DCF to prevent a
rule with "To VSI List" action happens.
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>
If there's VF reset, the kernel PF will remove rules
associated with the reset VF no matter the HW VSI ID
is changed or not. So DCF should redirector all rules
associated with the reset VF no matter the HW VSI ID
is changed or not.
Fixes: 3b3757bda3c3 ("net/ice: get VF hardware index in DCF")
Fixes: c8183dd8e059 ("net/ice: redirect switch rule to new VSI")
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Haiyue Wang <haiyue.wang@intel.com>
Add switch filter support for AH ESP and L2TP protocol,
and use SPI or session idas input set for switch rule.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Add dummy packet and tunnel type to support
L2TP on switch, now we can use session id as
input set for switch rule.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Add dummy packet and tunnel type to support
AH ESP and NAT-T on switch, now we can use SPI as
input set for switch rule.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Align the package file search sequence with PF only for DCF mode. Get
the DSN through the virtual channel firstly to check the accessibility
of the package file.
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
When we use profile rule as switch rule to download, if
we download 2 different rules one by one, there will be
rejection from function ice_aq_sw_rules(), for example:
"flow create 0 priority 0 ingress pattern eth / ipv6 / ah
/ end actions queue index 3 / end"
"flow create 0 priority 0 ingress pattern eth / ipv6 / esp
/ end actions queue index 2 / end"
That is because the 2 rules has the same s_rule input set
except action queue index, so it will be rejected by
hardware. So we have to use different recipes for them.
Also, we need to add recipe_id to keep record of recipe
index, which will be used in rule remove, if not, there
will be error when search recipe in function
ice_rem_adv_rule() if we create 2 or more profile rule.
For example:
"flow create 0 priority 0 ingress pattern eth / ipv4 / udp
/ pfcp s_field is 1 / end actions queue index 4 / end"
"flow create 0 priority 0 ingress pattern eth / ipv4 / udp
/ pfcp s_field is 0 / end actions queue index 5 / end"
then,
"flow flush 0"
you will find only the first rule will be delete,
because ice_find_recp() will always return recipe
id of the first rule.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Yuan Peng <yuan.peng@intel.com>
In order to find accurate recipe for switch filter, we
need to add mask as an element when searching for recipe.
If we create different rules with the same input set, but
using different masks, then proper recipes should use
those different mask.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
When we add some long switch rule, we need check the
number of final recipe number, if it is large than
ICE_MAX_CHAIN_RECIPE, we should refuse this rule.
For example:
"flow create 0 ingress pattern eth / ipv6
src is CDCD:910A:2222:5498:8475:1111:3900:1536
dst is CDCD:910A:2222:5498:8475:1111:3900:2022
tc is 3 / udp dst is 45 / end actions queue index 2 / end"
This rule will consume 6 recipe, if it is not refused, it
will cause the following code over write of lkup_indx and mask.
LIST_FOR_EACH_ENTRY(entry, &rm->rg_list, ice_recp_grp_entry,
l_entry) {
last_chain_entry->fv_idx[i] = entry->chain_idx;
buf[recps].content.lkup_indx[i] = entry->chain_idx;
buf[recps].content.mask[i++] = CPU_TO_LE16(0xFFFF);
..........
}
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
Update a switch rule' action from "to VSI" to "to VSI List"
should only happen when the same rule has been programmed with
a different fwd destination. This is already handled by below
code block:
m_entry = ice_find_adv_rule_entry(...)
if (m_entry) {
...
ice_adv_add_update_vsi_list(...)
}
The following ice_update_pkt_fwd_rule is unnecessary and should be
removed due to:
1) If a switch rule's action is still to VSI, which means, it is
the first time be issued, we don't need to update it "to VSI
List."
2) Actually the implementation does not match the comment, it still
update the rule with "to VSI" action.
Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Xiaolong Ye <xiaolong.ye@intel.com>
This patch moved the RSS initialization from dev start to dev configure
to fix RSS advanced rule invalid issue after running port stop and port
start.
Fixes: 5ad3db8d4bdd ("net/ice: enable advanced RSS")
Cc: stable@dpdk.org
Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Tested-by: Zhiwei He <zhiwei.he@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
After VF reset, VF's VSI number may be changed,
the switch rule which forwards packet to the old
VSI number should be redirected to the new VSI
number.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
Enable flow redirect on switch, currently only
support VSI redirect.
Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The input set for inner type of vlan item should
be ICE_INSET_ETHERTYPE, not ICE_INSET_VLAN_OUTER.
This mac vlan filter is also part of DCF switch filter.
Fixes: 47d460d63233 ("net/ice: rework switch filter")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch add switch filter permission stage support
for more flow pattern in pf only pipeline mode.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch add switch filter support for IPv6 NAT-T packets,
it enable switch filter to direct IPv6 packets with
NAT-T payload to specific action.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch add switch filter support for PFCP packets,
it enable switch filter to direct IPv4/IPv6 packets with
PFCP session or node payload to specific action.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch add support for ESP/AH/L2TP packets,
it enable switch filter to direct IPv6 packets with
ESP/AH/L2TP payload to specific action.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The action number can only be one for DCF or PF
switch filter, not support multiple actions.
Fixes: 47d460d63233 ("net/ice: rework switch filter")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The default tunnel type for switch filter change to new
definition of ICE_SW_TUN_AND_NON_TUN in order that the rule
will be apply to more packet type.
Fixes: 47d460d63233 ("net/ice: rework switch filter")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch add support for MAC VLAN rule,
it enable switch filter to direct packet base on
mac address and VLAN id.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
DCF need to make configuration of flexible mask, that is to say
some input set mask may be not 0xFFFF type all one bit. In order
to direct L2/IP multicast packets, the mask for source IP maybe
0xF0000000, this patch enable switch filter parser for it.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
This patch add more support for PPPoE packet,
it enable switch filter to direct PPPoE packet base on
session id and PPP protocol type.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
DCF on CVL is a control plane VF which take the responsibility to
configure all the PF/global resources, this patch add support DCF
on to program forward rule to direct packets to VFs.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
The ice_memdup doesn't check the new allocated memory pointer, it calls
the rte_memcpy directly. It should check it.
Fixes: 5f0978e96220 ("net/ice/base: add OS specific implementation")
Cc: stable@dpdk.org
Signed-off-by: Haiyue Wang <haiyue.wang@intel.com>
Reviewed-by: Xiaolong Ye <xiaolong.ye@intel.com>
Add support for PFCP, L2TP, ESP and AH RSS enabling.
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Take network order for gtpu fdir filter.
Fixes: b5c274f4e2ad ("net/ice/base: support FDIR for GTPU QFI field")
Cc: stable@dpdk.org
Signed-off-by: Ting Xu <ting.xu@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Change ice_set_fd_desc_val to static, since it only be used
internally.
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
This patch add support switch rule for PFCP and NAT-T
packet base on profile rule, PFCP and NAT-T packet will not
be matched on any packet fields, but instead matches
the profile that the packet hits in the switch block.
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Move some macro from ice_switch.c to ice_switch.h. Currently this
is only required by kernel driver, DPDK just to sync the code.
Signed-off-by: Xiao Zhang <xiao.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
ICE_BLK_FD and ICE_BLK_RSS are executing the same code so group the case
statements together instead of duplicating code for each block.
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
A race condition between FW and SW can occur between admin queue setup
and the first command sent. A link event may occur and FW attempts to
notify a non-existent queue. FW will set the critical error bit and
disable the queue. When this happens retry queue setup.
Signed-off-by: Evan Swanson <evan.swanson@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
A GTPU header can stack with a extend header or not, while
current implementation does not allow HDR bit sets like below:
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_EH
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_UP
ICE_FLOW_SEG_HDR_GTPU_IP | ICE_FLOW_SEG_HDR_GTPU_DWN
Which is not convenient for upper layer flow parser to
generate correct HDR bit.
but it could be if we have below assumptions:
ICE_FLOW_SEG_HDR_GTPU_DWN -- for GTPU with extend header down link
ICE_FLOW_SEG_HDR_GTPU_UP -- for GTPU with extend header up link
ICE_FLOW_SEG_HDR_GTPU_EH -- for GTPU with any extend header
ICE_FLOW_SEG_HDR_GTPU_IP -- for any GTPU header, but when it combined
with any above it downgrade to a dummy one.
And handle from specific case to generic case will hit all the cases
as expected.
if else (hdr & ICE_FLOW_SEG_HDR_GTPU_DWN) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_UP) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_EH) {
...
} else if (hdr & ICE_FLOW_SEG_HDR_GTPU_IP {
...
}
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Switch rules usually match packet fields to take actions. Add capability
to add a switch rule that does not match any packet fields, but instead
matches the profile that the packet hits in the switch block.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
Added new value for cmd_flag:
Persistently set the DCB configuration mode for the current port.
Added new value for valid_flags: represent bit#1 of command flag
Signed-off-by: Sharon Haroni <sharon.haroni@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Qiming Yang <qiming.yang@intel.com>
