Commit Graph

299 Commits

Author SHA1 Message Date
Nithin Dabilpuram
3b635472a9 net/octeontx2: support TSO offload
Add support to below TCP segmentation offloads for
96XX A1 onwards and 95xx B0 onwards.
- TCPv4, TCPv6
- VXLAN[v4 | v6][v4 | v6]
- GENEVE[v4 | v6][v4 | v6]

This patch also modifies a fastpath function to be forced
inline due to performance reasons for multi-seg mode.

Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-10-08 12:14:31 +02:00
Akhil Goyal
b0f66a68ca event/dpaa: support crypto adapter
event dpaa device support both ethernet as well as
crypto queues to be attached to it. eth_rx_adapter
provide infrastructure to attach ethernet queues and
crypto_adapter provide support for crypto queues.

This patch add support for dpaa_eventdev to attach
dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2019-10-09 13:14:19 +02:00
David Marchand
8ac3591694 remove useless include of EAL memory config header
Restrict this header inclusion to its real users.

Fixes: 028669bc9f ("eal: hide shared memory config")
Cc: stable@dpdk.org

Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
2019-10-09 10:22:24 +02:00
Pavan Nikhilesh
ef9f8bb6d5 event/octeontx2: fix null dereference
Fix NULL dereference after rte_realloc and add extra NULL checks.
Fix few memory leak with kvargs.

Coverity issue: 345023, 345022, 345009, 345011, 345026, 344997, 344990
Fixes: ffa4ec0b60 ("event/octeontx2: allow adapters to resize inflight buffers")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-29 22:17:29 +02:00
Harman Kalra
bd992b2adc net/octeontx2: fix PTP performance
A huge drop in per core MPPS value was observed when PTP stack is
enabled. The reason behind the bottleneck is HW serialises the
transfer of all SQEs, which seeks timestamp capture, on the same
send DMA path. Hence only those packets which requires timestamp
capture should set SETTSTAMP in send mem alg.
With this patch timestamping would be done only for those packets
with PKT_TX_IEEE1588_TMST set.

Fixes: fb3ae0951a ("net/octeontx2: support Tx")
Fixes: 8980a15300 ("event/octeontx2: support PTP for SSO")

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
2019-07-29 12:23:22 +02:00
Jerin Jacob
d622cad892 bus/pci: change IOVA as VA flag name
In order to align name with other PCI driver flag such as
RTE_PCI_DRV_NEED_MAPPING and to reflect its purpose, change
RTE_PCI_DRV_IOVA_AS_VA flag name as RTE_PCI_DRV_NEED_IOVA_AS_VA.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: David Marchand <david.marchand@redhat.com>
2019-07-22 17:46:32 +02:00
Pavan Nikhilesh
9c0a9024be event/octeontx2: add Tx adapter
Add event eth Tx adapter support to octeontx2 SSO.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-07 15:51:53 +02:00
Harman Kalra
8980a15300 event/octeontx2: support PTP for SSO
Add PTP support for SSO based on rx_offloads of the queue connected to
it.

Signed-off-by: Harman Kalra <hkalra@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-07 15:21:48 +02:00
Pavan Nikhilesh
0fe4accd8e event/octeontx2: add Rx adapter fastpath ops
Add support for event eth Rx adapter fastpath operations.

Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-07 15:16:33 +02:00
Pavan Nikhilesh
c60891f54d event/octeontx2: resize SSO in-flight buffers
Resize SSO internal in-flight buffer count based on the Rx queues
mempool size connected to event queues.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-07 15:11:31 +02:00
Pavan Nikhilesh
37720fc1fb event/octeontx2: add Rx adapter
Add event eth Rx adapter capabilities, queue add and delete functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-07 15:06:30 +02:00
Dilshod Urazov
db8bdaecca event/opdl: fix error sign
Fixes: 0bf298e392 ("event/opdl: add event port config get/set")
Fixes: 3c7f3dcfb0 ("event/opdl: add PMD main body and helper function")
Fixes: 4236ce9bf5 ("event/opdl: add OPDL ring infrastructure library")
Cc: stable@dpdk.org

Signed-off-by: Dilshod Urazov <dilshod.urazov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Reviewed-by: David Marchand <david.marchand@redhat.com>
2019-07-07 13:24:12 +02:00
Dilshod Urazov
0e21324459 event/sw: fix error sign
Fixes: 371a688fc1 ("event/sw: support linking queues to ports")
Cc: stable@dpdk.org

Signed-off-by: Dilshod Urazov <dilshod.urazov@oktetlabs.ru>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Acked-by: Harry van Haaren <harry.van.haaren@intel.com>
2019-07-07 13:24:12 +02:00
Gage Eads
7a0ac7cdb4 service: promote experimental functions to stable
The functions rte_service_may_be_active(), rte_service_lcore_attr_get(),
and rte_service_attr_reset_all() were introduced nearly a year ago in DPDK
18.08. They can be considered non-experimental for the 19.08 release.

rte_service_may_be_active() is used by the sw PMD, and this commit allows
it to not need any experimental API.

Signed-off-by: Gage Eads <gage.eads@intel.com>
2019-07-08 12:35:06 +02:00
Pavan Nikhilesh
cea66312b4 event/octeontx2: add libatomic dependency for 32-bit clang
When compiling with clang on 32-bit platforms, we are missing
copies of 64-bit atomic functions. We can solve this by linking
against libatomic for the drivers and libs which need those
atomic ops.

Fixes: f0b9982cb3 ("event/octeontx2: add TIM bucket operations")

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-04 17:12:55 +02:00
Pavan Nikhilesh
28e767e819 event/octeontx2: add devargs to control timer adapters
Add devargs to control each event timer adapter i.e. TIM rings internal
parameters uniquely. The following dict format is expected
[ring-chnk_slots-disable_npa-stats_ena]. 0 represents default values.

Example:
	--dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:28 +02:00
Pavan Nikhilesh
b2530cda86 event/octeontx2: add devargs to limit timer adapters
Add devargs to limit the max number of TIM rings reserved on probe.
Since, TIM rings are HW resources we can avoid starving other
applications by not grabbing all the rings.

Example:
	--dev "0002:0e:00.0,tim_rings_lmt=2"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:22 +02:00
Pavan Nikhilesh
d202edd715 event/octeontx2: add timer adapter start and stop
Add event timer adapter start and stop functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:20 +02:00
Pavan Nikhilesh
f513827934 event/octeontx2: add timer stats get and reset
Add event timer adapter statistics get and reset functions.
Stats are disabled by default and can be enabled through devargs.

Example:
	--dev "0002:0e:00.0,tim_stats_ena=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:10 +02:00
Pavan Nikhilesh
17424ededb event/octeontx2: add timer cancel function
Add function to cancel event timer that has been armed.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:09 +02:00
Pavan Nikhilesh
95e4e4ec74 event/octeontx2: add timer arm timeout burst
Add event timer arm timeout burst function.
All the timers requested to be armed have the same timeout.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:08 +02:00
Pavan Nikhilesh
80999bac03 event/octeontx2: add timer arm routine
Add event timer arm routine.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:07 +02:00
Pavan Nikhilesh
f0b9982cb3 event/octeontx2: add TIM bucket operations
Add TIM bucket operations used for event timer arm and cancel.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:05 +02:00
Pavan Nikhilesh
984ffd72d6 event/octeontx2: add timer adapter info function
Add TIM event timer adapter info get function.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:04 +02:00
Pavan Nikhilesh
ffa4ec0b60 event/octeontx2: allow adapters to resize inflight buffers
Add internal SSO functions to allow event adapters to resize SSO buffers
that are used to hold in-flight events in DRAM.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:03 +02:00
Pavan Nikhilesh
f67c9e8df9 event/octeontx2: add TIM IRQ handlers
Register and implement TIM IRQ handlers for error interrupts

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:57:02 +02:00
Pavan Nikhilesh
d457de0fe0 event/octeontx2: add devargs to modify chunk slots
Add devargs support to modify number of chunk slots. Chunks are used to
store event timers, a chunk can be visualised as an array where the last
element points to the next chunk and rest of them are used to store
events. TIM traverses the list of chunks and enqueues the event timers
to SSO.
If no argument is passed then a default value of 255 is taken.

Example:
	--dev "0002:0e:00.0,tim_chnk_slots=511"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:52 +02:00
Pavan Nikhilesh
464060c02f event/octeontx2: add devargs to disable NPA
If the chunks are allocated from NPA then TIM can automatically free
them when traversing the list of chunks.
Add devargs to disable NPA and use software mempool to manage chunks.

Example:
	--dev "0002:0e:00.0,tim_disable_npa=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:43 +02:00
Pavan Nikhilesh
dc2aae650d event/octeontx2: allow TIM to optimize config
Allow TIM to optimize user supplied configuration based on
RTE_EVENT_TIMER_ADAPTER_F_ADJUST_RES flag.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:42 +02:00
Pavan Nikhilesh
411c062505 event/octeontx2: create and free timer adapter
When the application calls timer adapter create the following is used:
- Allocate a TIM lf based on number of lf's provisioned.
- Verify the config parameters supplied.
- Allocate memory required for
	* Buckets based on min and max timeout supplied.
	* Allocate the chunk pool based on the number of timers.

On Free:
- Free the allocated bucket and chunk memory.
- Free the TIM lf allocated.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:38 +02:00
Pavan Nikhilesh
278821213a event/octeontx2: add timer adapter capabilities
Add function to retrieve event timer adapter capabilities.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:37 +02:00
Pavan Nikhilesh
382f892267 event/octeontx2: support event timer
Add event timer adapter aka TIM initialization on SSO probe.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:35 +02:00
Pavan Nikhilesh
62561532ac event/octeontx2: add SSO selftest
Add selftest to verify sanity of SSO.
Can be run by passing devargs to SSO PF as follows:

Example:
	--dev "0002:0e:00.0,selftest=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:29 +02:00
Pavan Nikhilesh
de128f732f event/octeontx2: add device stop and close functions
Add event device stop and close callback functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:27 +02:00
Pavan Nikhilesh
9c96ff7696 event/octeontx2: add devargs to control SSO GGRP QoS
SSO GGRPs i.e. queue uses DRAM & SRAM buffers to hold in-flight
events. By default the buffers are assigned to the SSO GGRPs to
satisfy minimum HW requirements. SSO is free to assign the remaining
buffers to GGRPs based on a preconfigured threshold.
We can control the QoS of SSO GGRP by modifying the above mentioned
thresholds. GGRPs that have higher importance can be assigned higher
thresholds than the rest.

Example:
	--dev "0002:0e:00.0,qos=[1-50-50-50]" // [Qx-XAQ-TAQ-IAQ]

Qx  -> Event queue Aka SSO GGRP.
XAQ -> DRAM In-flights.
TAQ & IAQ -> SRAM In-flights.

The values need to be expressed in terms of percentages, 0 represents
default.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:23 +02:00
Pavan Nikhilesh
5d6c50ffec event/octeontx2: add device start function
Add eventdev start function along with few cleanup API's to maintain
sanity.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:22 +02:00
Pavan Nikhilesh
09d5c0f356 event/octeontx2: add devargs to force legacy mode
Octeontx2 SSO by default is set to use dual workslot mode.
Add devargs option to force legacy mode i.e. single workslot mode.
Example:
	--dev "0002:0e:00.0,single_ws=1"

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:17 +02:00
Pavan Nikhilesh
54c5d3c24d event/octeontx2: add worker dual GWS dequeue functions
Add workder dual workslot mode dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:16 +02:00
Pavan Nikhilesh
ad4a8adf25 event/octeontx2: add worker dual GWS enqueue functions
Add dual workslot mode event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:14 +02:00
Pavan Nikhilesh
21d8822180 event/octeontx2: add SSO dual GWS HW device operations
Add SSO dual workslot mode GWS HW device operations.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:12 +02:00
Pavan Nikhilesh
aa62547f7e event/octeontx2: add SSO dual workslot mode
OcteonTx2 AP core SSO cache contains two entries each entry caches
state of an single GWS aka event port.
AP core requests events from SSO by using following sequence :
1. Write to SSOW_LF_GWS_OP_GET_WORK
2. Wait for SSO to complete scheduling by polling on SSOW_LF_GWS_TAG[63]
3. SSO notifies core by clearing SSOW_LF_GWS_TAG[63] and if work is
valid SSOW_LF_GWS_WQP is non-zero.
The above sequence uses only one in-core cache entry.

In dual workslot mode we try to use both the in-core cache entries by
triggering GET_WORK on a second workslot as soon as the above sequence
completes. This effectively hides the schedule latency of SSO if there
are enough events with unique flow_tags in-flight.
This mode reserves two SSO GWS lf's for each event port effectively
doubling single core performance.
Dual workslot mode is the default mode of operation in octeontx2.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:10 +02:00
Pavan Nikhilesh
46244b5b14 event/octeontx2: add worker dequeue functions
Add worker event dequeue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:09 +02:00
Pavan Nikhilesh
0eaf90cff1 event/octeontx2: add worker enqueue functions
Add worker event enqueue functions.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:08 +02:00
Pavan Nikhilesh
4095660db7 event/octeontx2: add SSO HW device operations
Add SSO HW device operations used for enqueue/dequeue.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:07 +02:00
Pavan Nikhilesh
284ea1cc38 event/octeontx2: support xstats
Add support for retrieving statistics from SSO GWS and GGRP.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2019-07-03 06:56:06 +02:00
Pavan Nikhilesh
9b8bc622a1 event/octeontx2: add register dump functions
Add SSO GWS and GGRP register dump function to aid debugging.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:05 +02:00
Pavan Nikhilesh
8c77f48337 event/octeontx2: add SSO GWS and GGRP IRQ handlers
Register and implement SSO GWS and GGRP IRQ handlers for error
interrupts.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
2019-07-03 06:56:04 +02:00
Pavan Nikhilesh
f563b7fa8c event/octeontx2: support dequeue timeout tick conversion
Add function to convert dequeue timeout from ns to ticks.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:03 +02:00
Pavan Nikhilesh
f7ac8b66b2 event/octeontx2: support linking queues to ports
Links between queues and ports are controlled by setting/clearing GGRP
membership in SSOW_LF_GWS_GRPMSK_CHG.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:56:01 +02:00
Pavan Nikhilesh
67b5f46864 event/octeontx2: add port config functions
Add default config, setup and release functions for event ports
i.e. SSO GWS.

Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
2019-07-03 06:55:59 +02:00