Currently, when symbols get promoted from the EXPERIMENTAL section to a
stable ABI section, the script complains they should go to the
EXPERIMENTAL section.
Example:
ERROR: symbol rte_devargs_add is added in the DPDK_19.05 section, but is
expected to be added in the EXPERIMENTAL section of the version map
This is legit.
Moving from a stable ABI to another is also allowed, but must have gone
through the proper process.
Fixes: 4bec48184e33 ("devtools: add checks for ABI symbol addition")
Cc: stable@dpdk.org
Signed-off-by: David Marchand <david.marchand@redhat.com>
Acked-by: Neil Horman <nhorman@tuxdriver.com>
Currently, RTE_* flags are set based on the implementer ID but there might
be some micro arch specific differences from the same vendor
eg. CACHE_LINESIZE. Add support to set micro arch specific flags.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Introduce rte_cc_has_argument() Makefile helper to
check a given argument is support by the compiler.
Example Usage:
include $(RTE_SDK)/mk/rte.helper.mk
MACHINE_CFLAGS += $(call rte_cc_has_argument, -mcpu=octeontx2)
This would allow adding -mcpu=octeontx2 in MACHINE_CFLAGS
if it is only supported by the compiler. The use case for such
scheme is to enable the mcpu optimization if the compiler
supports else it needs to compile the source code without
any errors.
This patch also moves inclusion of toolchain's rte.vars.mk
to before the machine's rte.vars.mk inclusion to make
correct CC available for the cross compile case.
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Add ticketlock_autotest implementation in python.
Fixes: efbcdaa55b93 ("test/ticketlock: add test cases")
Signed-off-by: Joyce Kong <joyce.kong@arm.com>
Reviewed-by: Phil Yang <phil.yang@arm.com>
Tested-by: Phil Yang <phil.yang@arm.com>
Commit 267d32de46a8 ("net/qede: support generic flow API")
added a support for RTE_FLOW APIs but did not update the feature
support matrix.
Fixes: 267d32de46a8 ("net/qede: support generic flow API")
Cc: stable@dpdk.org
Signed-off-by: Shahed Shaikh <shshaikh@marvell.com>
This patch stopped LLDP by default to avoid the statistics error.
Signed-off-by: Qiming Yang <qiming.yang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
No need to add additional vlan tag size for max packet size, since
for i40e, the queue's Rx Max Frame Size (rxq->max_pkt_len) already
includes the vlan header size.
Fixes: a3c83a2527e1 ("net/i40e: enable runtime queue setup")
Fixes: 4861cde46116 ("i40e: new poll mode driver")
Fixes: c1715402df8f ("i40evf: fix jumbo frame support")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
The result of the endian conversion was not being used incorrectly.
Fixes: b11cceb83a34 ("net/bnxt: support timesync")
Cc: stable@dpdk.org
Reported-by: Thomas Monjalon <thomas@monjalon.net>
Signed-off-by: Somnath Kotur <somnath.kotur@broadcom.com>
The vlan pattern handler currently assumes the NIC always strips vlan
header from the L2 buffer, regardless of the vlan strip setting. But,
with older VIC models, the vlan header is actually present in the L2
buffer if stripping is disabled. So in this case, the inner ether type
needs to be shifted by that much.
Fixes: 6ced137607d0 ("net/enic: flow API for NICs with advanced filters enabled")
Cc: stable@dpdk.org
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
There is need for users to set configuration of HEX number for RSS
key. The key byte should be pass down as hex number not as char
string. This patch enable cmdline flow parse HEX number,
in order to not using string which pass ASIC number.
Fixes: f4d623f96119 ("app/testpmd: fix missing RSS fields in flow action")
Cc: stable@dpdk.org
Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Tested-by: Yuan Peng <yuan.peng@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Currently, the raw item is always preceded by a UDP header, and both
land in the L4 pattern buffer. So consider the UDP header size when
checking if the raw spec fits in the L4 buffer.
Coverity issue: 336796, 336850
Fixes: 477959e6eeb0 ("net/enic: enable limited support for raw flow item")
Signed-off-by: Hyong Youb Kim <hyonkim@cisco.com>
Reviewed-by: John Daley <johndale@cisco.com>
UAR (User Access Region) register does not need to be remapped for
primary process but it should be remapped only for secondary process.
UAR register table is in the process private structure in
rte_eth_devices[],
(struct mlx4_proc_priv *)rte_eth_devices[port_id].process_private
The actual UAR table follows the data structure and the table is used
for both Tx and Rx.
For Tx, BlueFlame in UAR is used to ring the doorbell.
MLX4_TX_BFREG(txq) is defined to get a register for the txq. Processes
access its own private data to acquire the register from the UAR table.
For Rx, the doorbell in UAR is required in arming CQ event. However, it
is a known issue that the register isn't remapped for secondary process.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
UAR (User Access Region) register does not need to be remapped for
primary process but it should be remapped only for secondary process.
UAR register table is in the process private structure in
rte_eth_devices[],
(struct mlx5_proc_priv *)rte_eth_devices[port_id].process_private
The actual UAR table follows the data structure and the table is used
for both Tx and Rx.
For Tx, BlueFlame in UAR is used to ring the doorbell.
MLX5_TX_BFREG(txq) is defined to get a register for the txq. Processes
access its own private data to acquire the register from the UAR table.
For Rx, the doorbell in UAR is required in arming CQ event. However, it
is a known issue that the register isn't remapped for secondary process.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Queue index is redundantly stored for both Rx and Tx structures.
E.g. txq_ctrl->idx and txq->stats.idx. Both are consolidated to single
storage - rxq->idx and txq->idx.
Also, rxq and txq are moved to the beginning of its control structure
(rxq_ctrl and txq_ctrl) for cacheline alignment.
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Mempools can be populated with anonymous memory when using command line
parameter --mp-alloc=anon.
Considering the mempools are going to be used by the net devices,
it is better to DMA map this memory.
This patch add such mapping now that we have the APIs in place[1].
[1] commit c33a675b6276 ("bus: introduce device level DMA memory mapping")
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
providing a command line parameter to set the mempool flags accordingly.
This mode is relevant only when creating an empty mempool and then
populating with memory.
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Anatoly Burakov <anatoly.burakov@intel.com>
Allocated mempools were never free. it is bad practice.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Shahaf Shuler <shahafs@mellanox.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
Max frame size setup should consider double VLAN case.
Fixes: ae2bdd0219cb ("net/ice: support MTU setting")
Cc: stable@dpdk.org
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Acked-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
If rdma-core library doesn't support remapping UAR registers, the register
shouldn't be unmapped on device stop.
Fixes: 0203d33a1059 ("net/mlx4: support secondary process")
Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
In case of cross compilation on aarch64 we must add include for
stdlib in order to use the free function.
Fixes: cbb66daa3c85 ("net/mlx5: prepare Direct Verbs for Direct Rule")
Signed-off-by: Ori Kam <orika@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Call to CPP read (nfp_cpp_readl()) can fail, return 0 on fail.
If the call to _nfp6000_cppat_mu_locality fails, the function needs
to return with an error.
If the nfp_cpp_readl() call fails just returns 0.
Coverity issue: 277209, 277215, 277225
Fixes: c7e9729da6b5 ("net/nfp: support CPP")
Cc: stable@dpdk.org
Signed-off-by: Alejandro Lucero <alejandro.lucero@netronome.com>
Although it is rather unlikely getting 0 as the descriptor handle, better
to contemplate that possibility.
Coverity issue: 195018
Fixes: 896c265ef954 ("net/nfp: use new CPP interface")
Cc: stable@dpdk.org
Signed-off-by: Alejandro Lucero <alejandro.lucero@netronome.com>
The boolean value was assigned to Tx flag twice, so it could cause bug
whenever Rx checksum will not be supported and Tx will be.
Coverity issue: 336831
Fixes: 117ba4a60488 ("net/ena: get device info statically")
Signed-off-by: Michal Krawczyk <mk@semihalf.com>
At the mlx5 device closing the shared IB context was destroyed
before cleanup routines completion. As it was found on some
setups (Netlink fails with old kernel drivers and we have to use
sysfs to retrieve interface index, this requires IB device name,
which is stored in shared context) the mlx5_nl_mac_addr_flush()
requires IB device name, and if shared context is removed it
causes the segmentation fault.
Fixes: 17e19bc4dde7 ("net/mlx5: add IB shared context alloc/free functions")
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
Retrieving network interface index via Netlink fails in
case of old ib_core kernel driver installed - mlx5_nl_ifindex()
routine fails due to RDMA_NLDEV_ATTR_NDEV_INDEX attribute is not
supported by the old driver.
The patch allowing to retrieve the network interface index and
name via Netlink [1]. So, the problem depends on ib_core module
version - 4.16 supports getting ifindex via Netlink, 4.15 does not.
This error was ignored in previous versions of MLX5 PMD probing
routine. For single device ifindex was retrieved via sysfs
and link control was not lost, so problem just was not noticed.
In order to support MLX5 PMD functioning over old kernel driver
this patch adds ifindex retrieving via sysfs into probing routine.
It is worth to note this method works for master/standalone
device only.
[1] https://www.spinics.net/lists/linux-rdma/msg62948.html
Linux tree: 5b2cc79d (Leon Romanovsky 2018-03-27 20:40:49 +0300 270)
Fixes: ad74bc619504 ("net/mlx5: support multiport IB device during probing")
Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Shahaf Shuler <shahafs@mellanox.com>
This patch implements the changes proposed in the deprecation
note[1]. Replace multiple color definitions in various places such as
rte_meter.h, rte_tm.h and rte_mtr.h with single rte_color defined
in rte_meter.h.
This is simple search and replace exercise without any implementation
change.
[1] https://mails.dpdk.org/archives/dev/2019-January/123861.html
Signed-off-by: Jasvinder Singh <jasvinder.singh@intel.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Use CRC32 instruction only when it is available to avoid
the build issue like below.
{standard input}:16: Error:
selected processor does not support `crc32cx w3,w3,x0'
Fixes: ea7be0a0386e ("lib/librte_table: add hash function headers")
Cc: stable@dpdk.org
Signed-off-by: Jerin Jacob <jerinj@marvell.com>
Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
Use mempool bulk get ops to alloc burst of packets and process them.
If bulk get fails fallback to rte_mbuf_raw_alloc.
Tested-by: Yingya Han <yingyax.han@intel.com>
Suggested-by: Andrew Rybchenko <arybchenko@solarflare.com>
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Move the packet prepare logic into a separate function so that it
can be reused later.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Use bulk ops for allocating segments instead of having a inner loop
for every segment.
This reduces the number of calls to the mempool layer.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Testpmd txonly copies the src/dst mac address of the port being
processed to ethernet header structure on the stack for every packet.
Move it outside the loop and reuse it.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Rx refill in one bulk (which is just 8 descriptors) by default is too
aggressive and makes too many MMIO writes (Rx doorbells) if packet rate
is high. Setting default to 1/8 of Rx descriptors number shows good
performance results. Anyway it is a default value which may be
overridden by Rx configuration provided by application.
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
Clarify the fact that mask bits should be set in rte_eth_reta_query.
Signed-off-by: Tom Barbette <barbette@kth.se>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Enable DEV_TX_OFFLOAD_VLAN_INSERT also along with
DEV_TX_OFFLOAD_VLAN_QINQ in tx_qinq_set() as it takes
both vlan id's as arguments.
Fixes: 597f9fafe13b ("app/testpmd: convert to new Tx offloads API")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
Tx VLAN & QinQ insert enable need not depend on
Rx VLAN offload ETH_VLAN_EXTEND_OFFLOAD. For Tx VLAN
insert enable, error check is now to see if QinQ was enabled
but only single VLAN id is set.
Fixes: 6a34f91690d0 ("app/testpmd: fix error message when setting Tx VLAN")
Cc: stable@dpdk.org
Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
Acked-by: Bernard Iremonger <bernard.iremonger@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
