Commit Graph

23697 Commits

Author SHA1 Message Date
Xiaoyun Wang
fae4b8c47c net/hinic: optimize Rx performance for x86
For x86 platform, the rq cqe without cache aligned, which can
improve performance for some gateway scenarios.

Fixes: 361a9ccf81 ("net/hinic: optimize Rx performance")
Cc: stable@dpdk.org

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
2020-07-30 00:41:23 +02:00
Xiaoyun Wang
8c8b61234f net/hinic: refactor checksum functions
Encapsulate different types of packet checksum preprocessing
into functions.

Signed-off-by: Xiaoyun Wang <cloud.wangxiaoyun@huawei.com>
2020-07-30 00:41:23 +02:00
Dekel Peled
1ccc479014 net/mlx5: fix Rx interrupt handling and cleanup
Recent patch added creation of Rx CQ using DevX API.
The reading of events from DevX channel was not done correctly.
This patch fixes the event reading, using the correct data structure.
Cleanup after CQ creation, in case of error, is also updated.

Fixes: 08d1838f64 ("net/mlx5: implement CQ for Rx using DevX API")

Signed-off-by: Dekel Peled <dekelp@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-07-30 00:41:23 +02:00
Jeff Guo
71fa6a9964 net/ice: fix hash action validation
An invalid rule should not be validated successfully. If the rule is not
in the supporting list, just return failure to application.

Fixes: 5ad3db8d4b ("net/ice: enable advanced RSS")
Cc: stable@dpdk.org

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-30 00:41:23 +02:00
Qi Zhang
c43d7ceb99 net/ice: remove RSS for SCTP in PPPoE
We don't support SCTP in PPPoE RSS, remove it.

Fixes: d117de4600 ("net/ice: fix GTPU/PPPoE packets with no hash value")
Fixes: 0b952714e9 ("net/ice: refactor PF hash flow")

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2020-07-30 00:41:23 +02:00
Qi Zhang
58f58cfe70 net/ice/base: fix RSS interference
A new symmetric RSS rule may force another asymmetric rule to be
symmetric, vice versa. The reason is due to the flow engine will
try to reuse the existing profile if the input set matches with the
new rule. The fix is to disable this optimization for RSS since we
are not at the situation as profile shortage.

Fixes: ddae044035 ("net/ice/base: enable symmetric hash for RSS")
Cc: stable@dpdk.org

Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
Tested-by: Nannan Lu <nannan.lu@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2020-07-30 00:41:23 +02:00
Wei Zhao
c52ff36686 net/i40e: enable QinQ stripping
This patch enable i40e outer vlan strip on and off in QinQ
mode with mask bit of DEV_RX_OFFLOAD_QINQ_STRIP, users can
use "vlan set qinq_strip on 0" to enable or "vlan set
qinq_strip off 0" to disable i40e outer vlan strip when
try with testpmd app.

Fixes: 4861cde461 ("i40e: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Wei Zhao <wei.zhao1@intel.com>
Reviewed-by: Qiming Yang <qiming.yang@intel.com>
2020-07-30 00:41:23 +02:00
Ciara Loftus
a5a42cb46d net/af_xdp: remove mempool freeing on umem destruction
Other PMDs may be using the mempool, so don't free it when destroying the
UMEM.

Fixes: d8a210774e ("net/af_xdp: support unaligned umem chunks")
Cc: stable@dpdk.org

Signed-off-by: Ciara Loftus <ciara.loftus@intel.com>
2020-07-30 00:41:23 +02:00
Gregory Etelson
1af7452113 net/mlx5: fix dynamic inline hint handling
The ConnectX NICs can transfer data from the host memory with two
approaches: provide the pointer to the data buffer, or do data inline
- copy the data to the transmit descriptor (WQE) entirely or only the
part of data. In some configurations the NIC hardware requires the
minimal data to be inline in the descriptor to operate correctly. And
there is the special dynamic flag to hint PMD not to inline the data
(for example, if buffer is located on some other device - storage or
GPU) on per packet basis.

If there was a packet with length shorter than the minimal inline data
length requested by the NIC hardware and the no-inline hint was set
the PMD tried to inline the packet with minimal required length
instead of actual packet's one.  This patch adds the missed length
check into no-inline hint handling branch.

Fixes: cacb44a099 ("net/mlx5: add no-inline Tx flag")
Cc: stable@dpdk.org

Signed-off-by: Gregory Etelson <getelson@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-07-30 00:41:23 +02:00
Viacheslav Ovsiienko
4ffab7b9e1 net/mlx5: fix metadata storing for NEON Rx
There was the typo introducing the bug, affected the mlx5 vectorized
rx_burst on ARM architectures in case if CQE compression was enabled.

Fixes: 6c55b622a9 ("net/mlx5: set dynamic flow metadata in Rx queues")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-07-30 00:41:23 +02:00
Viacheslav Ovsiienko
a0bfe9d56f net/mlx5: fix UAR memory mapping type
The User Access Region is a special mechanism to provide direct
access to the hardware registers, and is the part of PCI address
space that is mapped to CPU virtual address. The mapping can be
performed with the type "Write-Combining" or "Non-Cached", and
these ones might be supported or not on different setups.

To prevent device probing failure the UAR allocation attempt
with alternative mapping type is performed. The datapath
takes the actual UAR mapping into account on queue creation.

There was another issue with NULL UAR base address.
OFED 5.0.x and Upstream rdma_core before v29 returned the NULL as
UAR base address if UAR was not the first object in the UAR page.
It caused the PMD failure and we should try to get another UAR
till we get the first one with non-NULL base address returned.

Fixes: fc4d4f732b ("net/mlx5: introduce shared UAR resource")

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-07-30 00:41:23 +02:00
Shougang Wang
be766d4369 net/i40e: fix hash lookup table
The hash look up table (LUT) is managed by global register but it is not
initialized when RSS is disabled. Once user wants to enable RSS during
runtime, the LUT will not be initialized.
This patch fixes the issue by initializing the LUT whatever RSS enabled
or not.

Fixes: feaae285b3 ("net/i40e: support hash configuration in RSS flow")
Cc: stable@dpdk.org

Signed-off-by: Shougang Wang <shougangx.wang@intel.com>
Tested-by: Xi Zhang <xix.zhang@intel.com>
Acked-by: Jeff Guo <jia.guo@intel.com>
2020-07-30 00:41:23 +02:00
Jeff Guo
d0f6c96036 net/iavf: delete unsupported RSS types
The combined hash type should be bound with prefix protocol when
configure it, so delete some useless and unsupported part for
rss types mapping.

Fixes: 7be10c3004 ("net/iavf: add RSS configuration for VF")
Cc: stable@dpdk.org

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-30 00:41:23 +02:00
Yunjian Wang
d123f83c43 net/qede: remove dead code
This patch removes logically dead code reported by coverity.

Coverity issue: 261777, 261778
Fixes: dd28bc8c6e ("net/qede: fix VF port creation sequence")
Cc: stable@dpdk.org

Signed-off-by: Yunjian Wang <wangyunjian@huawei.com>
Acked-by: Rasesh Mody <rmody@marvell.com>
2020-07-30 00:41:23 +02:00
Jeff Guo
c94366cfc6 net/iavf: add GTPU in default hash
Add GTPU_IP and GTPU_EH hash in default.

Signed-off-by: Jeff Guo <jia.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-30 00:41:23 +02:00
Mao Jiang
8ed3b9e6e4 net/i40e: fix flow director MSI-X resource allocation
FDIR allocating msix resource is not strictly necessary, if no
resource left, jump the error.

Fixes: 4861cde461 ("i40e: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Mao Jiang <maox.jiang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-30 00:41:23 +02:00
Mao Jiang
6f1998a4f0 net/i40e: fix binding interrupt without MSI-X vector
The value of vsi->nb_msix shouldn't`t be zero, otherwise, all of
interrupts will be bind to vector 0.

Fixes: 4861cde461 ("i40e: new poll mode driver")
Cc: stable@dpdk.org

Signed-off-by: Mao Jiang <maox.jiang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-30 00:41:23 +02:00
Wei Hu (Xavier)
6428fb4cd7 doc: update release notes for hns3 driver
Add release notes for Hisilicon hns3 PMD driver.

Signed-off-by: Wei Hu (Xavier) <xavier.huwei@huawei.com>
2020-07-30 00:41:23 +02:00
Sachin Saxena
34312be7a9 doc: announce dpaa-specific API parameter change
'port_id' storage size should be 'uint16_t', the API
'rte_pmd_dpaa_set_tx_loopback()' has it as 'uint8_t' but fixing it is an
ABI breakage, that is why planning the fix in v20.11 release where ABI
breakage is allowed.

Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
Acked-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Acked-by: Zhiyong Yang <zhiyong.yang@intel.com>
2020-07-30 00:41:23 +02:00
Raslan Darawsheh
753dd70283 net/mlx5: fix VF MAC address set over BlueField
When trying to set MAC address of an ethernet device and if it was
a representor, PMD sets the MAC over the corresponding VF instead.

For the case of HPF (Host PF representor on BlueField), PMD shouldn't
attempt to set it, since it doesn't have any corresponding VF and fails.

This will fix the issue by setting the MAC on the dev directly.

Fixes: 0d1d731708 ("net/mlx5: set VF MAC address from host")
Cc: stable@dpdk.org

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-07-30 00:41:23 +02:00
Alexander Kozyrev
6f52bd3383 net/mlx5: fix vectorized mini-CQE prefetching
There was an optimization work to prefetch all the CQEs before
their invalidation. It allowed us to speed up the mini-CQE
decompression process by preheating the cache in the vectorized
Rx routine.

Prefetching of the next mini-CQE, on the other hand, showed
no difference in the performance on x86 platform. So, that was
removed. Unfortunately this caused the performance drop on ARM.

Prefetch the mini-CQE as well as all the soon to be
invalidated CQEs to get both CQE and mini-CQE on the hot path.

Fixes: 28a4b96321 ("net/mlx5: prefetch CQEs for a faster decompression")
Cc: stable@dpdk.org

Signed-off-by: Alexander Kozyrev <akozyrev@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-07-30 00:41:23 +02:00
Junfeng Guo
90daa647e1 net/iavf: disable simple XOR RSS hash function
Function simple_xor for AVF RSS is not required currently, thus we
just return rte_flow error when the command line has item simple_xor.

Signed-off-by: Junfeng Guo <junfeng.guo@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-30 00:41:23 +02:00
Michael Baum
d462a83c65 net/mlx5: optimize stack memory in probe
The device configuration struct is not small enough to be used as
function argument by value.

Call spawn function with device configuration by reference.

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Michael Baum
7301d1923a net/mlx5: fix unnecessary init in mark conversion
The flow_dv_convert_action_mark function defines an array of
field_modify_info structures and initializes the first entity.

In the first entity id field, it initializes to 0, even though its type
is an enum that has no value of 0.
In fact, the function does not use this id field before assigning the
appropriate register id into it, so the initialization is unnecessary.
Moreover, this initialization is int into enum, and it would be better
not to create a type conflict for no reason.

Wait for the first entity initialization until the appropriate register
id is already known.

Fixes: 55deee1715 ("net/mlx5: extend flow mark support")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Michael Baum
f4a0873197 net/mlx5: optimize critical section in device free
When PMD releases shared IB device context, It locks the
mlx5_ibv_list_mutex lock throughout the function so that it does not
happen while removing a device from the list, another process will try
to insert another device into it.
On the other hand, having removed the device from the list even if it
has not yet released all of its resources, it should not care about
other processes and can release the lock.

However, the PMD does not release the lock even though it can, and
performs a number of operations, some of which include sleep and may be
long.
To improve this, shorten the lock time to the minimum necessary.

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Michael Baum
63d1db710f net/mlx5: fix unlimited parsing of switch info
In mlx5_sysfs_switch_info function, the driver gets switch information
associated with network interface.

The driver writes the port name into buffer and translates it.
However, when it writes the name, it does not limit writing to the
buffer size.

Limit writing to the size of the buffer.

Fixes: 1256805dd5 ("net/mlx5: move Linux-specific functions")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Michael Baum
4a28e831c9 net/mlx4: optimize stack memory size in probe
The mlx4_pci_probe function sets a pointer to the mlx4_priv structure,
and during that function fills its fields one by one with relevant
values.

It wants to put a value in the intr_handle field that has all its fields
zero except 2. To do so, it initializes a local struct rte_intr_handle
type variable and updates it only 2 fields and assigns it into the
appropriate field. However, it initializes a very large structure on the
stack while not at all certain that this place exists and in any case it
is very wasteful.

Reset all fields directly to the pointer by memset, then format the 2
fields to the relevant values.

Fixes: 63c2f23c85 ("net/mlx4: use a single interrupt handle")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Michael Baum
8da2a608d0 net/mlx5: remove ineffective increment in hairpin split
The flow_hairpin_split function defines a pointer called addr that
points to the list of items.
When the function wants to progress in the list, it adds the size of an
item to the pointer.

At the end of the function, it precedes the pointer one more time even
though it is not used afterwards. In fact, this line is unaffected and
the operation of the function would have been no different without it.

Remove the line where the pointer is preceded unnecessarily.

Fixes: d85c7b5ea5 ("net/mlx5: split hairpin flows")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Michael Baum
e71e90938b net/mlx5: fix crash in NVGRE item translation
The flow_dv_translate_item_nvgre function add NVGRE item to matcher and
to the value.
It defines a pointer named nvrge_m that receives the item's mask into
it, and then copies some of it to the matcher.

Before copying, it checks for mask validation, and in case the mask is
NULL the function gives it a pointer to rte_flow_item_nvgre_mask.
However, the function calls from the vni mask's field before the check,
and if there is no mask, it actually does dereference to the NULL
pointer and indeed the program crashes with segfault.

Move the call from the vni field to post-validation.

Fixes: cd18e1b72f ("net/mlx5: fix build on Arm")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Michael Baum
4868ae8322 net/mlx5: fix initialization of steering registers
The mlx5_flow_action_copy_mreg structure contains a field called src
type enum modify_reg, similarly the mlx5_rte_flow_item_tag field
contains a field called id type enum modify_reg.
The enum modify_reg variable represents different registers in the
system and it also has a field called REG_NONE whose value is 0 which
means that the register does not exist.

The flow_mreg_add_copy_action function sets a variable of struct
mlx5_flow_action_copy_mreg type, and initializes the src field to be 0.
Similarly the flow_create_split_metadata function sets a variable of
struct mlx5_rte_flow_item_tag type and initializes the id field to be 0.
In both functions, they initialize a enum modify_reg type variable with
an int type value while modify_reg has an appropriate field for that
value (REG_NONE).

Replace assigning 0 with REG_NONE in both functions.

Fixes: dd3c774f6f ("net/mlx5: add metadata register copy table")
Fixes: 71e254bc02 ("net/mlx5: split Rx flows to provide metadata copy")
Cc: stable@dpdk.org

Signed-off-by: Michael Baum <michaelba@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Suanming Mou
e1293b10de net/mlx5: fix counter query
Currently, the counter query requires the counter ID should start
with 4 aligned. In none-batch mode, the counter pool might have the
chance to get the counter ID not 4 aligned. In this case, the counter
should be skipped, or the query will be failed.

Skip the counter with ID not 4 aligned as the first counter in the
none-batch count pool to avoid invalid counter query. Once having
new min_dcs ID in the poll less than the skipped counters, the
skipped counters will be returned to the pool free list to use.

Fixes: 5382d28c21 ("net/mlx5: accelerate DV flow counter transactions")
Cc: stable@dpdk.org

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Suanming Mou
fd143711a6 net/mlx5: separate aging counter pool range
Currently, when allocate the counter or counter based age from group 0,
counter and age may share the same counter dcs ID range. Both age and
pure counter need to sync up with each other's container to check if
the ID range exists and update the min_dcs.

It comes two disadvantages:
1. If the ID range is shared, this counter range will be queried twice
   both from age and pure counter container in 1s.
2. The same range counter check between the two container makes the
   counter allocate sync min_dcs time to time with extra min_dcs
   updating.

This patch avoid the same ID range to be shared when allocate the new
pool. If the same ID range exists in other container, just add the
counter to the other container until get new range which saves the
min_dcs sync up time to time.

Signed-off-by: Suanming Mou <suanmingm@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Viacheslav Ovsiienko
44c1b52bc6 common/mlx5: fix queue doorbell record size
When Rx/Tx queue was being created with DevX the allocated
doorbell record size was only uint64_t. That was definitely
less than size of CPU cacheline and it might have happened the
doorbell records attached to different queues handled by
different cores were allocated within same cacheline. It might
have caused the contention on doorbell record writing.

This patch extends the allocated memory size for doorbell
record to cacheline size.

Fixes: 21cae8580f ("net/mlx5: allocate door-bells via DevX")
Cc: stable@dpdk.org

Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Matan Azrad <matan@mellanox.com>
2020-07-30 00:41:23 +02:00
Raslan Darawsheh
d13f976086 net/mlx5: fix flow items size calculation
flow_dv_get_item_len returns the actual header size of
an rte_flow item.

Changing any of the structs for rte_flow items by adding
or removing some extra fields will break this function.

This fixes the behavior by returning the actual header size
of each item.

Fixes: 34d41b7aa3 ("net/mlx5: add VXLAN encap action to Direct Verbs")
Cc: stable@dpdk.org

Signed-off-by: Raslan Darawsheh <rasland@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
2020-07-30 00:41:23 +02:00
Ophir Munk
385c19397e net/mlx5: fix premature disabling of interrupt
RXQ interrupts under Linux are based on the epoll mechanism. An expected
order of operations is as follows:
1. Call rte_eth_dev_rx_intr_enable(), to arm the CQ for receiving events
   on data input.
2. Block on rte_epoll_wait() with an array of file descriptors
   representing the CQ events. Upon data arrival the kernel will signal
   an input event on the corresponding CQ fd.
3. Call rte_eth_dev_rx_intr_disable() after the event was received and
   continue in polling mode. The mlx5 implementation of
   rte_eth_dev_rx_intr_disable() is to get the CQ event and ack it.

In practice applications may wake up from rte_epoll_wait() due to
timeout with no event to ack but still call
rte_eth_dev_rx_intr_disable() unconditionally.  In such cases the call
should return EAGAIN (since the file descriptors are non-blocked), as
opposed to EINVAL which indicates a real failure.  In case of EAGAIN the
PMD should not warn on "Unable to disable interrupt on Rx queue".

This commit fixes a earlier commit where the returned value 0 from
function devx_get_event() - was considered an error.

Fixes: 08d1838f64 ("net/mlx5: implement CQ for Rx using DevX API")

Signed-off-by: Ophir Munk <ophirmu@mellanox.com>
Acked-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com>
Acked-by: Raslan Darawsheh <rasland@mellanox.com>
2020-07-30 00:41:22 +02:00
Junyu Jiang
f0585e8559 net/ice: fix bytes statistics
This patch fixed the issue that rx/tx bytes overflowed
on 40 bit limitation by enlarging the limitation.

Fixes: a37bde5631 ("net/ice: support statistics")
Cc: stable@dpdk.org

Signed-off-by: Junyu Jiang <junyux.jiang@intel.com>
Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2020-07-30 00:41:22 +02:00
Yuval Avnery
de06137cb2 app/regex: add RegEx test application
Following the new RegEx class.
There is a need to create a dedicated test application in order to
validate this class and PMD.

Unlike net device this application loads data from a file.

This commit introduces the new RegEx test app.

The basic app flow:
1. Configure the RegEx device to use one queue, and set the rule
   database, using precompiled file.
2. Allocate mbufs based on the requested number of jobs, each job will
i  get one mbuf.
3. Enqueue as much as possible jobs.
4. Dequeue jobs.
5. if the number of dequeue jobs < requested number of jobs job to step

Signed-off-by: Ori Kam <orika@mellanox.com>
Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
2020-07-30 09:13:52 +02:00
Yuval Avnery
76e821a303 regex/mlx5: fix overrun on enqueueing
When enqueueing a buffer the PMD check if there is room
in its send queue (SQ).
The current implementation did not take into account that
queue indices are wrapping around, which may result in
consumer index (sq->ci) can have bigger value than than
the producer index (sq->pi).

Fixes: 4d4e245ad6 ("regex/mlx5: support enqueue")

Signed-off-by: Yuval Avnery <yuvalav@mellanox.com>
Acked-by: Ori Kam <orika@mellanox.com>
2020-07-29 16:49:58 +02:00
Long Li
52c9a533b4 bus/vmbus: use SMP memory barrier for signaling read
rte_smp_mb() uses the same locked ADD as the in-kernel vmbus driver,
and it has slightly performance improvement over rte_mb().

Signed-off-by: Long Li <longli@microsoft.com>
2020-07-29 16:17:54 +02:00
David Coyle
25d5c40f25 app/crypto-perf: support security protocol in PMDCC mode
This patch adds support for DOCSIS and PDCP security protocols to the
pmd-cyclecount mode of the crypto performance tool. Adding this support
involves freeing the correct session type (i.e. security or cryptodev
session) when the test ends, depending on the op_type specified.

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-28 22:09:22 +02:00
David Coyle
f7d2c69653 app/crypto-perf: fix mbuf lengths for DOCSIS
Set the source mbuf data and packet lengths correctly for DOCSIS
performance tests.

Fixes: d4a131a949 ("test/crypto-perf: support DOCSIS protocol")

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-28 22:09:22 +02:00
Ruifeng Wang
1ee3c4b462 crypto/armv8: remove redundant assert definition
No need to define assert function in PMD since RTE provides the same.
Remove private definition and use RTE_VERIFY instead.

Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-28 22:09:22 +02:00
Ruifeng Wang
28b0514504 crypto/armv8: use dedicated log type
armv8 crypto PMD used CRYPTODEV general log type.
Create a dedicated log type for the PMD to not pollute CRYPTODEV log type.

Typo in crypto dev name macro caused unexpected device name in log.
Fixed the typo to log with correct device name.

Fixes: 169ca3db55 ("crypto/armv8: add PMD optimized for ARMv8 processors")
Cc: stable@dpdk.org

Suggested-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-28 22:09:22 +02:00
Ruifeng Wang
cc9035ffbb crypto/armv8: remove debug option
Typo in debug log switch macro caused debug log cannot be enabled.
Since no log used in data path, remove the debug option entirely
and have logs always enabled.

Resolved compilation error when debug log is enabled:
rte_armv8_pmd.c: In function ‘process_armv8_chained_op’:
rte_armv8_pmd.c:633:22: error: expected ‘)’ before ‘crypto_func’
  ARMV8_CRYPTO_ASSERT(crypto_func != NULL);
                      ^

Fixes: 169ca3db55 ("crypto/armv8: add PMD optimized for ARMv8 processors")
Cc: stable@dpdk.org

Reported-by: David Marchand <david.marchand@redhat.com>
Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
Acked-by: Akhil Goyal <akhil.goyal@nxp.com>
2020-07-28 22:09:22 +02:00
Adam Dybkowski
d8492ad59e doc: update QAT PMD release notes
This patch updates 20.08 release notes inside
the part that describe changes in Intel QuickAssist PMD.

Fixes: faa57df0b4 ("crypto/qat: support ChaCha20-Poly1305")
Fixes: 9904ff6849 ("common/qat: improve multi-process handling")

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:22 +02:00
Adam Dybkowski
7b08003b5d common/qat: support GEN2 device 200xx
This adds pci detection and documentation for Intel GEN2
QuickAssist device 200xx (PF Did 0x18ee, VF Did 0x18ef).

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:22 +02:00
Adam Dybkowski
c800c2e07f common/qat: fix uninitialized variable
This patch fixes the uninitialized variable bug in QAT PMD.

Fixes: 9f27a860dc ("crypto/qat: move generic qp function to qp file")
Cc: stable@dpdk.org

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:22 +02:00
Adam Dybkowski
efc52855dc common/qat: remove unused fields
This patch removes unused fields from structs qat_qp and
qat_qp_config, together with their initializations.

Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:22 +02:00
Tejasree Kondoj
84d76227c6 crypto/octeontx2: fix structure alignment
The structure cpt_request_info needs only 8 byte alignment.
This patch replaces __rte_cache_aligned of cpt_request_info
with __rte_aligned(8) and removes __rte_aligned(8) in
cpt_meta_info structure.

Fixes: fab634eb87 ("crypto/octeontx2: support security session data path")

Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com>
Acked-by: Anoob Joseph <anoobj@marvell.com>
2020-07-28 22:09:22 +02:00
David Coyle
012affe138 crypto/qat: fix DOCSIS performance
DOCSIS protocol performance in the downlink direction can be improved
significantly in the QAT SYM PMD, especially for larger packets, by
pre-processing all CRC generations in a batch before building and
enqueuing any requests to the HW. This patch adds this optimization.

Fixes: 6f0ef23740 ("crypto/qat: support DOCSIS protocol")

Signed-off-by: David Coyle <david.coyle@intel.com>
Acked-by: Fiona Trahe <fiona.trahe@intel.com>
2020-07-28 22:09:21 +02:00