b8f8d1aeb2
Added registers list and structure to access the ACC200 device. Signed-off-by: Nicolas Chautru <nicolas.chautru@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
84 lines
3.1 KiB
C
84 lines
3.1 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2021 Intel Corporation
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*/
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#ifndef ACC200_VF_ENUM_H
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#define ACC200_VF_ENUM_H
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/*
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* ACC200 Register mapping on VF BAR0
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* This is automatically generated from RDL, format may change with new RDL
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*/
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enum {
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HWVfQmgrIngressAq = 0x00000000,
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HWVfHiVfToPfDbellVf = 0x00000800,
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HWVfHiPfToVfDbellVf = 0x00000808,
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HWVfHiInfoRingBaseLoVf = 0x00000810,
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HWVfHiInfoRingBaseHiVf = 0x00000814,
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HWVfHiInfoRingPointerVf = 0x00000818,
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HWVfHiInfoRingIntWrEnVf = 0x00000820,
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HWVfHiInfoRingPf2VfWrEnVf = 0x00000824,
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HWVfHiMsixVectorMapperVf = 0x00000860,
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HWVfDmaFec5GulDescBaseLoRegVf = 0x00000920,
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HWVfDmaFec5GulDescBaseHiRegVf = 0x00000924,
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HWVfDmaFec5GulRespPtrLoRegVf = 0x00000928,
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HWVfDmaFec5GulRespPtrHiRegVf = 0x0000092C,
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HWVfDmaFec5GdlDescBaseLoRegVf = 0x00000940,
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HWVfDmaFec5GdlDescBaseHiRegVf = 0x00000944,
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HWVfDmaFec5GdlRespPtrLoRegVf = 0x00000948,
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HWVfDmaFec5GdlRespPtrHiRegVf = 0x0000094C,
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HWVfDmaFec4GulDescBaseLoRegVf = 0x00000960,
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HWVfDmaFec4GulDescBaseHiRegVf = 0x00000964,
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HWVfDmaFec4GulRespPtrLoRegVf = 0x00000968,
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HWVfDmaFec4GulRespPtrHiRegVf = 0x0000096C,
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HWVfDmaFec4GdlDescBaseLoRegVf = 0x00000980,
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HWVfDmaFec4GdlDescBaseHiRegVf = 0x00000984,
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HWVfDmaFec4GdlRespPtrLoRegVf = 0x00000988,
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HWVfDmaFec4GdlRespPtrHiRegVf = 0x0000098C,
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HWVfDmaFftDescBaseLoRegVf = 0x000009A0,
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HWVfDmaFftDescBaseHiRegVf = 0x000009A4,
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HWVfDmaFftRespPtrLoRegVf = 0x000009A8,
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HWVfDmaFftRespPtrHiRegVf = 0x000009AC,
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HWVfQmgrAqResetVf = 0x00000E00,
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HWVfQmgrRingSizeVf = 0x00000E04,
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HWVfQmgrGrpDepthLog20Vf = 0x00000E08,
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HWVfQmgrGrpDepthLog21Vf = 0x00000E0C,
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HWVfQmgrGrpFunction0Vf = 0x00000E10,
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HWVfQmgrGrpFunction1Vf = 0x00000E14,
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HWVfPmACntrlRegVf = 0x00000F40,
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HWVfPmACountVf = 0x00000F48,
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HWVfPmAKCntLoVf = 0x00000F50,
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HWVfPmAKCntHiVf = 0x00000F54,
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HWVfPmADeltaCntLoVf = 0x00000F60,
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HWVfPmADeltaCntHiVf = 0x00000F64,
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HWVfPmBCntrlRegVf = 0x00000F80,
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HWVfPmBCountVf = 0x00000F88,
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HWVfPmBKCntLoVf = 0x00000F90,
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HWVfPmBKCntHiVf = 0x00000F94,
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HWVfPmBDeltaCntLoVf = 0x00000FA0,
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HWVfPmBDeltaCntHiVf = 0x00000FA4,
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HWVfPmCCntrlRegVf = 0x00000FC0,
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HWVfPmCCountVf = 0x00000FC8,
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HWVfPmCKCntLoVf = 0x00000FD0,
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HWVfPmCKCntHiVf = 0x00000FD4,
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HWVfPmCDeltaCntLoVf = 0x00000FE0,
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HWVfPmCDeltaCntHiVf = 0x00000FE4
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};
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/* TIP VF Interrupt numbers */
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enum {
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ACC200_VF_INT_QMGR_AQ_OVERFLOW = 0,
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ACC200_VF_INT_DOORBELL_PF_2_VF = 1,
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ACC200_VF_INT_ILLEGAL_FORMAT = 2,
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ACC200_VF_INT_QMGR_DISABLED_ACCESS = 3,
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ACC200_VF_INT_QMGR_AQ_OVERTHRESHOLD = 4,
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ACC200_VF_INT_DMA_DL_DESC_IRQ = 5,
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ACC200_VF_INT_DMA_UL_DESC_IRQ = 6,
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ACC200_VF_INT_DMA_FFT_DESC_IRQ = 7,
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ACC200_VF_INT_DMA_UL5G_DESC_IRQ = 8,
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ACC200_VF_INT_DMA_DL5G_DESC_IRQ = 9,
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ACC200_VF_INT_DMA_MLD_DESC_IRQ = 10,
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};
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#endif /* ACC200_VF_ENUM_H */
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