ede56cc18d
Keep only single config option RTE_USE_C11_MEM_MODEL for C11 memory model, so all modules can leverage C11 atomic extension by enable this option. Signed-off-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com> Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com> Signed-off-by: Thomas Monjalon <thomas@monjalon.net>
19 lines
387 B
Plaintext
19 lines
387 B
Plaintext
# SPDX-License-Identifier: BSD-3-Clause
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# Copyright(c) 2015 Cavium, Inc
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#
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#include "defconfig_arm64-armv8a-linuxapp-gcc"
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CONFIG_RTE_MACHINE="thunderx"
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CONFIG_RTE_CACHE_LINE_SIZE=128
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CONFIG_RTE_USE_C11_MEM_MODEL=n
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CONFIG_RTE_MAX_NUMA_NODES=2
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CONFIG_RTE_MAX_LCORE=96
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CONFIG_RTE_MAX_VFIO_GROUPS=128
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#
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# Compile PMD for octeontx sso event device
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#
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CONFIG_RTE_LIBRTE_PMD_OCTEONTX_SSOVF=y
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