Ciara Power 2b11056d1e net/axgbe: check max SIMD bitwidth ... When choosing a vector path to take, an extra condition must be satisfied to ensure the max SIMD bitwidth allows for the CPU enabled path. Signed-off-by: Ciara Power <ciara.power@intel.com> Acked-by: Amaranath Somalapuram <asomalap@amd.com>		2020-10-19 16:45:02 +02:00
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baseband
bus	raw/dpaa2_qdma: support scatter gather in enqueue	2020-10-19 14:05:49 +02:00
common	common/iavf: support VF with more than 16 queues	2020-10-16 19:48:19 +02:00
compress
crypto	crypto/caam_jr: fix device tree parsing for SEC_ERA	2020-10-19 16:00:31 +02:00
event
mempool
net	net/axgbe: check max SIMD bitwidth	2020-10-19 16:45:02 +02:00
raw	raw/dpaa2_qdma: support enqueue without response wait	2020-10-19 14:05:56 +02:00
regex
vdpa
meson.build