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Hernan Vargas 98c90628c8 baseband/fpga_5gnr_fec: remove FLR timeout 
FLR timeout register is not used in 5GNR FPGA.

Signed-off-by: Hernan Vargas <hernan.vargas@intel.com>
Reviewed-by: Nicolas Chautru <nicolas.chautru@intel.com>
2022-06-01 16:26:35 +02:00
..
test_vectors app/bbdev: update test vectors 2020-04-05 18:26:04 +02:00
ldpc_dec_default.data app/bbdev: update test vectors 2020-04-05 18:26:04 +02:00
ldpc_enc_default.data app/bbdev: fix test vector symlink 2020-10-14 21:32:11 +02:00
main.c app/bbdev: add performance tests 2020-04-05 18:26:04 +02:00
main.h app/bbdev: include explicit HARQ preloading 2020-11-02 09:24:41 +01:00
meson.build devtools: forbid indent with tabs in Meson 2021-11-02 19:25:30 +01:00
test_bbdev_perf.c baseband/fpga_5gnr_fec: remove FLR timeout 2022-06-01 16:26:35 +02:00
test_bbdev_vector.c bbdev: add capability for 4G CB CRC drop 2021-10-08 21:31:07 +02:00
test_bbdev_vector.h app/bbdev: update for 5GNR 2019-07-05 15:28:14 +02:00
test_bbdev.c app/bbdev: update for 5GNR 2019-07-05 15:28:14 +02:00
test-bbdev.py support python 3 only 2020-10-02 13:51:00 +02:00
turbo_dec_default.data app/bbdev: update default test vectors 2018-05-10 17:46:20 +01:00
turbo_enc_default.data app/bbdev: update for 5GNR 2019-07-05 15:28:14 +02:00