5dfa003db5
The rdma-core library can map doorbell register in two ways, depending
on the environment variable "MLX5_SHUT_UP_BF":
- as regular cached memory, the variable is either missing or set to
zero. This type of mapping may cause the significant doorbell
register writing latency and requires an explicit memory write
barrier to mitigate this issue and prevent write combining.
- as non-cached memory, the variable is present and set to not "0"
value. This type of mapping may cause performance impact under
heavy loading conditions but the explicit write memory barrier is
not required and it may improve core performance.
The UAR creation function maps a doorbell in one of the above ways
according to the system. In run time, it always adds an explicit memory
barrier after writing to.
In cases where the doorbell was mapped as non-cached memory, the
explicit memory barrier is unnecessary and may impair performance.
The commit [1] solved this problem for a Tx queue. In run time, it
checks the mapping type and provides the memory barrier after writing to
a Tx doorbell register if it is needed. The mapping type is extracted
directly from the uar_mmap_offset field in the queue properties.
This patch shares this code between the drivers and extends the above
solution for each of them.
[1] commit 8409a28573
("net/mlx5: control transmit doorbell register mapping")
Fixes: f8c97babc9 ("compress/mlx5: add data-path functions")
Fixes: 8e196c08ab ("crypto/mlx5: support enqueue/dequeue operations")
Fixes: 4d4e245ad6 ("regex/mlx5: support enqueue")
Cc: stable@dpdk.org
Signed-off-by: Michael Baum <michaelba@nvidia.com>
Reviewed-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
Acked-by: Matan Azrad <matan@nvidia.com>
98 lines
3.2 KiB
C
98 lines
3.2 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
|
|
* Copyright 2020 Mellanox Technologies, Ltd
|
|
*/
|
|
|
|
#ifndef MLX5_REGEX_H
|
|
#define MLX5_REGEX_H
|
|
|
|
#include <rte_regexdev.h>
|
|
|
|
#include <infiniband/verbs.h>
|
|
#include <infiniband/mlx5dv.h>
|
|
|
|
#include <mlx5_common.h>
|
|
#include <mlx5_common_mr.h>
|
|
#include <mlx5_common_devx.h>
|
|
|
|
#include "mlx5_rxp.h"
|
|
#include "mlx5_regex_utils.h"
|
|
|
|
struct mlx5_regex_hw_qp {
|
|
uint16_t log_nb_desc; /* Log 2 number of desc for this object. */
|
|
struct mlx5_devx_qp qp_obj; /* The QP DevX object. */
|
|
size_t pi, db_pi;
|
|
size_t ci;
|
|
uint32_t qpn;
|
|
};
|
|
|
|
struct mlx5_regex_cq {
|
|
uint32_t log_nb_desc; /* Log 2 number of desc for this object. */
|
|
struct mlx5_devx_cq cq_obj; /* The CQ DevX object. */
|
|
size_t ci;
|
|
};
|
|
|
|
struct mlx5_regex_qp {
|
|
uint32_t flags; /* QP user flags. */
|
|
uint32_t nb_desc; /* Total number of desc for this qp. */
|
|
struct mlx5_regex_hw_qp *qps; /* Pointer to qp array. */
|
|
uint16_t nb_obj; /* Number of qp objects. */
|
|
struct mlx5_regex_cq cq; /* CQ struct. */
|
|
uint32_t free_qps;
|
|
struct mlx5_regex_job *jobs;
|
|
struct ibv_mr *metadata;
|
|
struct ibv_mr *outputs;
|
|
struct ibv_mr *imkey_addr; /* Indirect mkey array region. */
|
|
size_t ci, pi;
|
|
struct mlx5_mr_ctrl mr_ctrl;
|
|
};
|
|
|
|
struct mlx5_regex_priv {
|
|
TAILQ_ENTRY(mlx5_regex_priv) next;
|
|
struct mlx5_common_device *cdev; /* Backend mlx5 device. */
|
|
struct rte_regexdev *regexdev; /* Pointer to the RegEx dev. */
|
|
uint16_t nb_queues; /* Number of queues. */
|
|
struct mlx5_regex_qp *qps; /* Pointer to the qp array. */
|
|
uint16_t nb_max_matches; /* Max number of matches. */
|
|
enum mlx5_rxp_program_mode prog_mode;
|
|
uint32_t nb_engines; /* Number of RegEx engines. */
|
|
struct mlx5_uar uar; /* UAR object. */
|
|
uint8_t is_bf2; /* The device is BF2 device. */
|
|
uint8_t has_umr; /* The device supports UMR. */
|
|
uint32_t mmo_regex_qp_cap:1;
|
|
uint32_t mmo_regex_sq_cap:1;
|
|
};
|
|
|
|
/* mlx5_regex.c */
|
|
int mlx5_regex_start(struct rte_regexdev *dev);
|
|
int mlx5_regex_stop(struct rte_regexdev *dev);
|
|
int mlx5_regex_close(struct rte_regexdev *dev);
|
|
|
|
/* mlx5_rxp.c */
|
|
int mlx5_regex_info_get(struct rte_regexdev *dev,
|
|
struct rte_regexdev_info *info);
|
|
int mlx5_regex_configure(struct rte_regexdev *dev,
|
|
const struct rte_regexdev_config *cfg);
|
|
int mlx5_regex_rules_db_import(struct rte_regexdev *dev,
|
|
const char *rule_db, uint32_t rule_db_len);
|
|
|
|
/* mlx5_regex_devx.c */
|
|
int mlx5_devx_regex_rules_program(void *ctx, uint8_t engine, uint32_t rof_mkey,
|
|
uint32_t rof_size, uint64_t db_mkey_offset);
|
|
|
|
/* mlx5_regex_control.c */
|
|
int mlx5_regex_qp_setup(struct rte_regexdev *dev, uint16_t qp_ind,
|
|
const struct rte_regexdev_qp_conf *cfg);
|
|
void mlx5_regex_clean_ctrl(struct rte_regexdev *dev);
|
|
|
|
/* mlx5_regex_fastpath.c */
|
|
int mlx5_regexdev_setup_fastpath(struct mlx5_regex_priv *priv, uint32_t qp_id);
|
|
void mlx5_regexdev_teardown_fastpath(struct mlx5_regex_priv *priv,
|
|
uint32_t qp_id);
|
|
uint16_t mlx5_regexdev_enqueue(struct rte_regexdev *dev, uint16_t qp_id,
|
|
struct rte_regex_ops **ops, uint16_t nb_ops);
|
|
uint16_t mlx5_regexdev_dequeue(struct rte_regexdev *dev, uint16_t qp_id,
|
|
struct rte_regex_ops **ops, uint16_t nb_ops);
|
|
uint16_t mlx5_regexdev_enqueue_gga(struct rte_regexdev *dev, uint16_t qp_id,
|
|
struct rte_regex_ops **ops, uint16_t nb_ops);
|
|
#endif /* MLX5_REGEX_H */
|