264f7f80e1
Change the barrier APIs for IO to reflect that Armv8-a is other-multi-copy atomicity memory model. Armv8-a memory model has been strengthened to require other-multi-copy atomicity. This property requires memory accesses from an observer to become visible to all other observers simultaneously [3]. This means a) A write arriving at an endpoint shared between multiple CPUs is visible to all CPUs b) A write that is visible to all CPUs is also visible to all other observers in the shareability domain This allows for using cheaper DMB instructions in the place of DSB for devices that are visible to all CPUs (i.e. devices that DPDK caters to). Please refer to [1], [2] and [3] for more information. [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=22ec71615d824f4f11d38d0e55a88d8956b7e45f [2] https://www.youtube.com/watch?v=i6DayghhA8Q [3] https://www.cl.cam.ac.uk/~pes20/armv8-mca/ Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Acked-by: Jerin Jacob <jerinj@marvell.com> Tested-by: Ruifeng Wang <ruifeng.wang@arm.com>