5d55afe895
There are some client PHY Ultra Low Power (ULP) register bits that are configured by the Manageability Engine (ME) FW. The driver must ensure that these bits are cleared on exit from ULP. Ordinarily the ME FW would do that, but there are cases in which the FW is not present, and the driver must handle that. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com>
DPDK is a set of libraries and drivers for fast packet processing. It supports many processor architectures and both FreeBSD and Linux. The DPDK uses the Open Source BSD license for the core libraries and drivers. The kernel components are GPLv2 licensed. Please check the doc directory for release notes, API documentation, and sample application information. For questions and usage discussions, subscribe to: users@dpdk.org Report bugs and issues to the development mailing list: dev@dpdk.org