slow-path data structures need not be 128-byte cache aligned.
Reduce the alignment to 64-byte to save the memory.
No behavior change for 64-byte cache aligned systems as minimum
cache line size as 64.
Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
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