All buffers and ring info should be written before tail register update.
This patch relocates the write memory barrier before updating tail register
to avoid potential issues.
Fixes: 11b5c7daf019 ("raw/ntb: add enqueue and dequeue functions")
Cc: stable@dpdk.org
Signed-off-by: Xiaoyun Li <xiaoyun.li@intel.com>
Reviewed-by: Gavin Hu <gavin.hu@arm.com>
Acked-by: Jingjing Wu <jingjing.wu@intel.com>
657cd1370d