Tianfei Zhang 96ebfcf812 raw/ifpga/base: add SPI and MAX10 device driver
There is a SPI bus link between A10 FPGA and MAX10 FPGA.
MAX10 is in charge of board management, like power management,
sensors, flash devices.

Signed-off-by: Tianfei Zhang <tianfei.zhang@intel.com>
2019-04-19 14:51:54 +02:00
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