7a5dfdc1f3
Make APIs static and other semantic changes. A step toward cleaning 'make C=1' with GCC 4.8.3. Signed-off-by: Rasesh Mody <rasesh.mody@cavium.com>
1706 lines
48 KiB
C
1706 lines
48 KiB
C
/*
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* Copyright (c) 2016 QLogic Corporation.
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* All rights reserved.
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* www.qlogic.com
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*
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* See LICENSE.qede_pmd for copyright and licensing details.
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*/
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#include "bcm_osal.h"
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#include "ecore.h"
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#include "ecore_hsi_eth.h"
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#include "ecore_sriov.h"
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#include "ecore_l2_api.h"
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#include "ecore_vf.h"
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#include "ecore_vfpf_if.h"
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#include "ecore_status.h"
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#include "reg_addr.h"
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#include "ecore_int.h"
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#include "ecore_l2.h"
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#include "ecore_mcp_api.h"
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#include "ecore_vf_api.h"
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static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
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{
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struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
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void *p_tlv;
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/* This lock is released when we receive PF's response
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* in ecore_send_msg2pf().
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* So, ecore_vf_pf_prep() and ecore_send_msg2pf()
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* must come in sequence.
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*/
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OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"preparing to send %s tlv over vf pf channel\n",
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ecore_channel_tlvs_string[type]);
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/* Reset Request offset */
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p_iov->offset = (u8 *)(p_iov->vf2pf_request);
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/* Clear mailbox - both request and reply */
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OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
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OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
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/* Init type and length */
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p_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, type, length);
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/* Init first tlv header */
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((struct vfpf_first_tlv *)p_tlv)->reply_address =
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(u64)p_iov->pf2vf_reply_phys;
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return p_tlv;
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}
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static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
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enum _ecore_status_t req_status)
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{
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union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"VF request status = 0x%x, PF reply status = 0x%x\n",
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req_status, resp->default_resp.hdr.status);
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OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
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}
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static enum _ecore_status_t
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ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
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u8 *done, u32 resp_size)
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{
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union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
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struct ustorm_trigger_vf_zone trigger;
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struct ustorm_vf_zone *zone_data;
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enum _ecore_status_t rc = ECORE_SUCCESS;
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int time = 100;
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zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
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/* output tlvs list */
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ecore_dp_tlv_list(p_hwfn, p_req);
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/* need to add the END TLV to the message size */
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resp_size += sizeof(struct channel_list_end_tlv);
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/* Send TLVs over HW channel */
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OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
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trigger.vf_pf_msg_valid = 1;
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"VF -> PF [%02x] message: [%08x, %08x] --> %p,"
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" %08x --> %p\n",
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GET_FIELD(p_hwfn->hw_info.concrete_fid,
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PXP_CONCRETE_FID_PFID),
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U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
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U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
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&zone_data->non_trigger.vf_pf_msg_addr,
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*((u32 *)&trigger), &zone_data->trigger);
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REG_WR(p_hwfn,
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(osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
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U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
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REG_WR(p_hwfn,
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(osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
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U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
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/* The message data must be written first, to prevent trigger before
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* data is written.
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*/
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OSAL_WMB(p_hwfn->p_dev);
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REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
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*((u32 *)&trigger));
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/* When PF would be done with the response, it would write back to the
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* `done' address. Poll until then.
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*/
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while ((!*done) && time) {
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OSAL_MSLEEP(25);
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time--;
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}
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if (!*done) {
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"VF <-- PF Timeout [Type %d]\n",
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p_req->first_tlv.tl.type);
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rc = ECORE_TIMEOUT;
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} else {
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"PF response: %d [Type %d]\n",
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*done, p_req->first_tlv.tl.type);
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}
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return rc;
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}
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#define VF_ACQUIRE_THRESH 3
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static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
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struct vf_pf_resc_request *p_req,
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struct pf_vf_resc *p_resp)
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{
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"PF unwilling to fullill resource request: rxq [%02x/%02x]"
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" txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x]"
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" vlan [%02x/%02x] mc [%02x/%02x]."
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" Try PF recommended amount\n",
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p_req->num_rxqs, p_resp->num_rxqs,
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p_req->num_rxqs, p_resp->num_txqs,
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p_req->num_sbs, p_resp->num_sbs,
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p_req->num_mac_filters, p_resp->num_mac_filters,
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p_req->num_vlan_filters, p_resp->num_vlan_filters,
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p_req->num_mc_filters, p_resp->num_mc_filters);
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/* humble our request */
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p_req->num_txqs = p_resp->num_txqs;
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p_req->num_rxqs = p_resp->num_rxqs;
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p_req->num_sbs = p_resp->num_sbs;
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p_req->num_mac_filters = p_resp->num_mac_filters;
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p_req->num_vlan_filters = p_resp->num_vlan_filters;
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p_req->num_mc_filters = p_resp->num_mc_filters;
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}
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static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
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{
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struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
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struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
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struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
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struct ecore_vf_acquire_sw_info vf_sw_info;
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struct vf_pf_resc_request *p_resc;
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bool resources_acquired = false;
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struct vfpf_acquire_tlv *req;
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int attempts = 0;
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enum _ecore_status_t rc = ECORE_SUCCESS;
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/* clear mailbox and prep first tlv */
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req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
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p_resc = &req->resc_request;
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/* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
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req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
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p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
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p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
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p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
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p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
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p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
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OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
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OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
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req->vfdev_info.os_type = vf_sw_info.os_type;
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req->vfdev_info.driver_version = vf_sw_info.driver_version;
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req->vfdev_info.fw_major = FW_MAJOR_VERSION;
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req->vfdev_info.fw_minor = FW_MINOR_VERSION;
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req->vfdev_info.fw_revision = FW_REVISION_VERSION;
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req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
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req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
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req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
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/* Fill capability field with any non-deprecated config we support */
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req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
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/* pf 2 vf bulletin board address */
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req->bulletin_addr = p_iov->bulletin.phys;
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req->bulletin_size = p_iov->bulletin.size;
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/* add list termination tlv */
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ecore_add_tlv(p_hwfn, &p_iov->offset,
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CHANNEL_TLV_LIST_END,
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sizeof(struct channel_list_end_tlv));
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while (!resources_acquired) {
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"attempting to acquire resources\n");
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/* Clear response buffer, as this might be a re-send */
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OSAL_MEMSET(p_iov->pf2vf_reply, 0,
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sizeof(union pfvf_tlvs));
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/* send acquire request */
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rc = ecore_send_msg2pf(p_hwfn,
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&resp->hdr.status, sizeof(*resp));
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/* PF timeout */
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if (rc)
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return rc;
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/* copy acquire response from buffer to p_hwfn */
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OSAL_MEMCPY(&p_iov->acquire_resp,
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resp, sizeof(p_iov->acquire_resp));
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attempts++;
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if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
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/* PF agrees to allocate our resources */
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if (!(resp->pfdev_info.capabilities &
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PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
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/* It's possible legacy PF mistakenly accepted;
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* but we don't care - simply mark it as
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* legacy and continue.
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*/
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req->vfdev_info.capabilities |=
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VFPF_ACQUIRE_CAP_PRE_FP_HSI;
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}
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"resources acquired\n");
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resources_acquired = true;
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} /* PF refuses to allocate our resources */
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else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
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attempts < VF_ACQUIRE_THRESH) {
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ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
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&resp->resc);
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} else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
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if (pfdev_info->major_fp_hsi &&
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(pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
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DP_NOTICE(p_hwfn, false,
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"PF uses an incompatible fastpath HSI"
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" %02x.%02x [VF requires %02x.%02x]."
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" Please change to a VF driver using"
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" %02x.xx.\n",
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pfdev_info->major_fp_hsi,
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pfdev_info->minor_fp_hsi,
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ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
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pfdev_info->major_fp_hsi);
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rc = ECORE_INVAL;
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goto exit;
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}
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if (!pfdev_info->major_fp_hsi) {
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if (req->vfdev_info.capabilities &
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VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
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DP_NOTICE(p_hwfn, false,
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"PF uses very old drivers."
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" Please change to a VF"
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" driver using no later than"
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" 8.8.x.x.\n");
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rc = ECORE_INVAL;
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goto exit;
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} else {
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DP_INFO(p_hwfn,
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"PF is old - try re-acquire to"
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" see if it supports FW-version"
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" override\n");
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req->vfdev_info.capabilities |=
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VFPF_ACQUIRE_CAP_PRE_FP_HSI;
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continue;
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}
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}
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/* If PF/VF are using same Major, PF must have had
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* it's reasons. Simply fail.
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*/
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DP_NOTICE(p_hwfn, false,
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"PF rejected acquisition by VF\n");
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rc = ECORE_INVAL;
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goto exit;
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} else {
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DP_ERR(p_hwfn,
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"PF returned err %d to VF acquisition request\n",
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resp->hdr.status);
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rc = ECORE_AGAIN;
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goto exit;
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}
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}
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/* Mark the PF as legacy, if needed */
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if (req->vfdev_info.capabilities &
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VFPF_ACQUIRE_CAP_PRE_FP_HSI)
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p_iov->b_pre_fp_hsi = true;
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rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
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if (rc) {
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DP_NOTICE(p_hwfn, true,
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"VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
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" status = 0x%x.\n",
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rc);
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rc = ECORE_AGAIN;
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goto exit;
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}
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/* Update bulletin board size with response from PF */
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p_iov->bulletin.size = resp->bulletin_size;
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/* get HW info */
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p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
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p_hwfn->p_dev->chip_rev = resp->pfdev_info.chip_rev;
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DP_INFO(p_hwfn, "Chip details - %s%d\n",
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ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
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CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
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p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
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/* Learn of the possibility of CMT */
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if (IS_LEAD_HWFN(p_hwfn)) {
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if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
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DP_INFO(p_hwfn, "100g VF\n");
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p_hwfn->p_dev->num_hwfns = 2;
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}
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}
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/* @DPDK */
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if ((~p_iov->b_pre_fp_hsi &
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ETH_HSI_VER_MINOR) &&
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(resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
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DP_INFO(p_hwfn,
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"PF is using older fastpath HSI;"
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" %02x.%02x is configured\n",
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ETH_HSI_VER_MAJOR,
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resp->pfdev_info.minor_fp_hsi);
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exit:
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ecore_vf_pf_req_end(p_hwfn, rc);
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return rc;
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}
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enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
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{
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struct ecore_vf_iov *p_iov;
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u32 reg;
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/* Set number of hwfns - might be overridden once leading hwfn learns
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* actual configuration from PF.
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*/
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if (IS_LEAD_HWFN(p_hwfn))
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p_hwfn->p_dev->num_hwfns = 1;
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/* Set the doorbell bar. Assumption: regview is set */
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p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
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PXP_VF_BAR0_START_DQ;
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reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
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p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
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reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
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p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
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/* Allocate vf sriov info */
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p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
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if (!p_iov) {
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DP_NOTICE(p_hwfn, true,
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"Failed to allocate `struct ecore_sriov'\n");
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return ECORE_NOMEM;
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}
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/* Allocate vf2pf msg */
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p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
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&p_iov->
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vf2pf_request_phys,
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sizeof(union
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vfpf_tlvs));
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if (!p_iov->vf2pf_request) {
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DP_NOTICE(p_hwfn, true,
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"Failed to allocate `vf2pf_request' DMA memory\n");
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goto free_p_iov;
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}
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p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
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&p_iov->
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pf2vf_reply_phys,
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sizeof(union pfvf_tlvs));
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if (!p_iov->pf2vf_reply) {
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DP_NOTICE(p_hwfn, true,
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"Failed to allocate `pf2vf_reply' DMA memory\n");
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goto free_vf2pf_request;
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}
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"VF's Request mailbox [%p virt 0x%lx phys], "
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"Response mailbox [%p virt 0x%lx phys]\n",
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p_iov->vf2pf_request,
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(unsigned long)p_iov->vf2pf_request_phys,
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p_iov->pf2vf_reply,
|
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(unsigned long)p_iov->pf2vf_reply_phys);
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/* Allocate Bulletin board */
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p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
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p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
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&p_iov->bulletin.
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phys,
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p_iov->bulletin.
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size);
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DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
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"VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
|
|
p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
|
|
p_iov->bulletin.size);
|
|
|
|
OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex);
|
|
OSAL_MUTEX_INIT(&p_iov->mutex);
|
|
|
|
p_hwfn->vf_iov_info = p_iov;
|
|
|
|
p_hwfn->hw_info.personality = ECORE_PCI_ETH;
|
|
|
|
return ecore_vf_pf_acquire(p_hwfn);
|
|
|
|
free_vf2pf_request:
|
|
OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
|
|
p_iov->vf2pf_request_phys,
|
|
sizeof(union vfpf_tlvs));
|
|
free_p_iov:
|
|
OSAL_FREE(p_hwfn->p_dev, p_iov);
|
|
|
|
return ECORE_NOMEM;
|
|
}
|
|
|
|
#define TSTORM_QZONE_START PXP_VF_BAR0_START_SDM_ZONE_A
|
|
#define MSTORM_QZONE_START(dev) (TSTORM_QZONE_START + \
|
|
(TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
|
|
|
|
/* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
|
|
static void
|
|
__ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
|
|
struct ecore_tunn_update_type *p_src,
|
|
enum ecore_tunn_mode mask, u8 *p_cls)
|
|
{
|
|
if (p_src->b_update_mode) {
|
|
p_req->tun_mode_update_mask |= (1 << mask);
|
|
|
|
if (p_src->b_mode_enabled)
|
|
p_req->tunn_mode |= (1 << mask);
|
|
}
|
|
|
|
*p_cls = p_src->tun_cls;
|
|
}
|
|
|
|
/* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
|
|
static void
|
|
ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
|
|
struct ecore_tunn_update_type *p_src,
|
|
enum ecore_tunn_mode mask, u8 *p_cls,
|
|
struct ecore_tunn_update_udp_port *p_port,
|
|
u8 *p_update_port, u16 *p_udp_port)
|
|
{
|
|
if (p_port->b_update_port) {
|
|
*p_update_port = 1;
|
|
*p_udp_port = p_port->port;
|
|
}
|
|
|
|
__ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls);
|
|
}
|
|
|
|
void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun)
|
|
{
|
|
if (p_tun->vxlan.b_mode_enabled)
|
|
p_tun->vxlan.b_update_mode = true;
|
|
if (p_tun->l2_geneve.b_mode_enabled)
|
|
p_tun->l2_geneve.b_update_mode = true;
|
|
if (p_tun->ip_geneve.b_mode_enabled)
|
|
p_tun->ip_geneve.b_update_mode = true;
|
|
if (p_tun->l2_gre.b_mode_enabled)
|
|
p_tun->l2_gre.b_update_mode = true;
|
|
if (p_tun->ip_gre.b_mode_enabled)
|
|
p_tun->ip_gre.b_update_mode = true;
|
|
|
|
p_tun->b_update_rx_cls = true;
|
|
p_tun->b_update_tx_cls = true;
|
|
}
|
|
|
|
static void
|
|
__ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun,
|
|
u16 feature_mask, u8 tunn_mode, u8 tunn_cls,
|
|
enum ecore_tunn_mode val)
|
|
{
|
|
if (feature_mask & (1 << val)) {
|
|
p_tun->b_mode_enabled = tunn_mode;
|
|
p_tun->tun_cls = tunn_cls;
|
|
} else {
|
|
p_tun->b_mode_enabled = false;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_tunnel_info *p_tun,
|
|
struct pfvf_update_tunn_param_tlv *p_resp)
|
|
{
|
|
/* Update mode and classes provided by PF */
|
|
u16 feat_mask = p_resp->tunn_feature_mask;
|
|
|
|
__ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask,
|
|
p_resp->vxlan_mode, p_resp->vxlan_clss,
|
|
ECORE_MODE_VXLAN_TUNN);
|
|
__ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask,
|
|
p_resp->l2geneve_mode,
|
|
p_resp->l2geneve_clss,
|
|
ECORE_MODE_L2GENEVE_TUNN);
|
|
__ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask,
|
|
p_resp->ipgeneve_mode,
|
|
p_resp->ipgeneve_clss,
|
|
ECORE_MODE_IPGENEVE_TUNN);
|
|
__ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask,
|
|
p_resp->l2gre_mode, p_resp->l2gre_clss,
|
|
ECORE_MODE_L2GRE_TUNN);
|
|
__ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask,
|
|
p_resp->ipgre_mode, p_resp->ipgre_clss,
|
|
ECORE_MODE_IPGRE_TUNN);
|
|
p_tun->geneve_port.port = p_resp->geneve_udp_port;
|
|
p_tun->vxlan_port.port = p_resp->vxlan_udp_port;
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
|
|
"tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x",
|
|
p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled,
|
|
p_tun->ip_geneve.b_mode_enabled,
|
|
p_tun->l2_gre.b_mode_enabled,
|
|
p_tun->ip_gre.b_mode_enabled);
|
|
}
|
|
|
|
enum _ecore_status_t
|
|
ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_tunnel_info *p_src)
|
|
{
|
|
struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel;
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_update_tunn_param_tlv *p_resp;
|
|
struct vfpf_update_tunn_param_tlv *p_req;
|
|
enum _ecore_status_t rc;
|
|
|
|
p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM,
|
|
sizeof(*p_req));
|
|
|
|
if (p_src->b_update_rx_cls && p_src->b_update_tx_cls)
|
|
p_req->update_tun_cls = 1;
|
|
|
|
ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, ECORE_MODE_VXLAN_TUNN,
|
|
&p_req->vxlan_clss, &p_src->vxlan_port,
|
|
&p_req->update_vxlan_port,
|
|
&p_req->vxlan_port);
|
|
ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve,
|
|
ECORE_MODE_L2GENEVE_TUNN,
|
|
&p_req->l2geneve_clss, &p_src->geneve_port,
|
|
&p_req->update_geneve_port,
|
|
&p_req->geneve_port);
|
|
__ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve,
|
|
ECORE_MODE_IPGENEVE_TUNN,
|
|
&p_req->ipgeneve_clss);
|
|
__ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre,
|
|
ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss);
|
|
__ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre,
|
|
ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss);
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
p_resp = &p_iov->pf2vf_reply->tunn_param_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
|
|
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
|
|
"Failed to update tunnel parameters\n");
|
|
rc = ECORE_INVAL;
|
|
}
|
|
|
|
ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp);
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t
|
|
ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_queue_cid *p_cid,
|
|
u16 bd_max_bytes,
|
|
dma_addr_t bd_chain_phys_addr,
|
|
dma_addr_t cqe_pbl_addr,
|
|
u16 cqe_pbl_size,
|
|
void OSAL_IOMEM **pp_prod)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_start_queue_resp_tlv *resp;
|
|
struct vfpf_start_rxq_tlv *req;
|
|
u16 rx_qid = p_cid->rel.queue_id;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
|
|
|
|
req->rx_qid = rx_qid;
|
|
req->cqe_pbl_addr = cqe_pbl_addr;
|
|
req->cqe_pbl_size = cqe_pbl_size;
|
|
req->rxq_addr = bd_chain_phys_addr;
|
|
req->hw_sb = p_cid->rel.sb;
|
|
req->sb_index = p_cid->rel.sb_idx;
|
|
req->bd_max_bytes = bd_max_bytes;
|
|
req->stat_id = -1; /* Keep initialized, for future compatibility */
|
|
|
|
/* If PF is legacy, we'll need to calculate producers ourselves
|
|
* as well as clean them.
|
|
*/
|
|
if (p_iov->b_pre_fp_hsi) {
|
|
u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
|
|
u32 init_prod_val = 0;
|
|
|
|
*pp_prod = (u8 OSAL_IOMEM *)
|
|
p_hwfn->regview +
|
|
MSTORM_QZONE_START(p_hwfn->p_dev) +
|
|
(hw_qid) * MSTORM_QZONE_SIZE;
|
|
|
|
/* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
|
|
__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
|
|
(u32 *)(&init_prod_val));
|
|
}
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->queue_start;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
/* Learn the address of the producer from the response */
|
|
if (!p_iov->b_pre_fp_hsi) {
|
|
u32 init_prod_val = 0;
|
|
|
|
*pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
|
|
"Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
|
|
rx_qid, *pp_prod, resp->offset);
|
|
|
|
/* Init the rcq, rx bd and rx sge (if valid) producers to 0.
|
|
* It was actually the PF's responsibility, but since some
|
|
* old PFs might fail to do so, we do this as well.
|
|
*/
|
|
OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
|
|
__internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
|
|
(u32 *)&init_prod_val);
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_queue_cid *p_cid,
|
|
bool cqe_completion)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct vfpf_stop_rxqs_tlv *req;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
|
|
|
|
req->rx_qid = p_cid->rel.queue_id;
|
|
req->num_rxqs = 1;
|
|
req->cqe_completion = cqe_completion;
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t
|
|
ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_queue_cid *p_cid,
|
|
dma_addr_t pbl_addr, u16 pbl_size,
|
|
void OSAL_IOMEM **pp_doorbell)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_start_queue_resp_tlv *resp;
|
|
struct vfpf_start_txq_tlv *req;
|
|
u16 qid = p_cid->rel.queue_id;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
|
|
|
|
req->tx_qid = qid;
|
|
|
|
/* Tx */
|
|
req->pbl_addr = pbl_addr;
|
|
req->pbl_size = pbl_size;
|
|
req->hw_sb = p_cid->rel.sb;
|
|
req->sb_index = p_cid->rel.sb_idx;
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->queue_start;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
/* Modern PFs provide the actual offsets, while legacy
|
|
* provided only the queue id.
|
|
*/
|
|
if (!p_iov->b_pre_fp_hsi) {
|
|
*pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
|
|
resp->offset;
|
|
} else {
|
|
u8 cid = p_iov->acquire_resp.resc.cid[qid];
|
|
|
|
*pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
|
|
DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
|
|
}
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
|
|
"Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
|
|
qid, *pp_doorbell, resp->offset);
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_queue_cid *p_cid)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct vfpf_stop_txqs_tlv *req;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
|
|
|
|
req->tx_qid = p_cid->rel.queue_id;
|
|
req->num_txqs = 1;
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_queue_cid **pp_cid,
|
|
u8 num_rxqs,
|
|
u8 comp_cqe_flg,
|
|
u8 comp_event_flg)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
|
|
struct vfpf_update_rxq_tlv *req;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* TODO - API is limited to assuming continuous regions of queues,
|
|
* but VF queues might not fullfil this requirement.
|
|
* Need to consider whether we need new TLVs for this, or whether
|
|
* simply doing it iteratively is good enough.
|
|
*/
|
|
if (!num_rxqs)
|
|
return ECORE_INVAL;
|
|
|
|
again:
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
|
|
|
|
/* Find the length of the current contagious range of queues beginning
|
|
* at first queue's index.
|
|
*/
|
|
req->rx_qid = (*pp_cid)->rel.queue_id;
|
|
for (req->num_rxqs = 1; req->num_rxqs < num_rxqs; req->num_rxqs++)
|
|
if (pp_cid[req->num_rxqs]->rel.queue_id !=
|
|
req->rx_qid + req->num_rxqs)
|
|
break;
|
|
|
|
if (comp_cqe_flg)
|
|
req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
|
|
if (comp_event_flg)
|
|
req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
/* Make sure we're done with all the queues */
|
|
if (req->num_rxqs < num_rxqs) {
|
|
num_rxqs -= req->num_rxqs;
|
|
pp_cid += req->num_rxqs;
|
|
/* TODO - should we give a non-locked variant instead? */
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
goto again;
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t
|
|
ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
|
|
u16 mtu, u8 inner_vlan_removal,
|
|
enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
|
|
u8 only_untagged)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct vfpf_vport_start_tlv *req;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
enum _ecore_status_t rc;
|
|
int i;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
|
|
|
|
req->mtu = mtu;
|
|
req->vport_id = vport_id;
|
|
req->inner_vlan_removal = inner_vlan_removal;
|
|
req->tpa_mode = tpa_mode;
|
|
req->max_buffers_per_cqe = max_buffers_per_cqe;
|
|
req->only_untagged = only_untagged;
|
|
|
|
/* status blocks */
|
|
for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++)
|
|
if (p_hwfn->sbs_info[i])
|
|
req->sb_addr[i] = p_hwfn->sbs_info[i]->sb_phys;
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
|
|
sizeof(struct vfpf_first_tlv));
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
static bool
|
|
ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_sp_vport_update_params *p_data,
|
|
u16 tlv)
|
|
{
|
|
switch (tlv) {
|
|
case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
|
|
return !!(p_data->update_vport_active_rx_flg ||
|
|
p_data->update_vport_active_tx_flg);
|
|
case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
|
|
#ifndef ASIC_ONLY
|
|
/* FPGA doesn't have PVFC and so can't support tx-switching */
|
|
return !!(p_data->update_tx_switching_flg &&
|
|
!CHIP_REV_IS_FPGA(p_hwfn->p_dev));
|
|
#else
|
|
return !!p_data->update_tx_switching_flg;
|
|
#endif
|
|
case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
|
|
return !!p_data->update_inner_vlan_removal_flg;
|
|
case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
|
|
return !!p_data->update_accept_any_vlan_flg;
|
|
case CHANNEL_TLV_VPORT_UPDATE_MCAST:
|
|
return !!p_data->update_approx_mcast_flg;
|
|
case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
|
|
return !!(p_data->accept_flags.update_rx_mode_config ||
|
|
p_data->accept_flags.update_tx_mode_config);
|
|
case CHANNEL_TLV_VPORT_UPDATE_RSS:
|
|
return !!p_data->rss_params;
|
|
case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
|
|
return !!p_data->sge_tpa_params;
|
|
default:
|
|
DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
|
|
tlv, ecore_channel_tlvs_string[tlv]);
|
|
return false;
|
|
}
|
|
}
|
|
|
|
static void
|
|
ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_sp_vport_update_params *p_data)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_def_resp_tlv *p_resp;
|
|
u16 tlv;
|
|
|
|
for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
|
|
tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
|
|
tlv++) {
|
|
if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
|
|
continue;
|
|
|
|
p_resp = (struct pfvf_def_resp_tlv *)
|
|
ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
|
|
if (p_resp && p_resp->hdr.status)
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
|
|
"TLV[%d] type %s Configuration %s\n",
|
|
tlv, ecore_channel_tlvs_string[tlv],
|
|
(p_resp && p_resp->hdr.status) ? "succeeded"
|
|
: "failed");
|
|
}
|
|
}
|
|
|
|
enum _ecore_status_t
|
|
ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_sp_vport_update_params *p_params)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct vfpf_vport_update_tlv *req;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
u8 update_rx, update_tx;
|
|
u32 resp_size = 0;
|
|
u16 size, tlv;
|
|
enum _ecore_status_t rc;
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
resp_size = sizeof(*resp);
|
|
|
|
update_rx = p_params->update_vport_active_rx_flg;
|
|
update_tx = p_params->update_vport_active_tx_flg;
|
|
|
|
/* clear mailbox and prep header tlv */
|
|
ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
|
|
|
|
/* Prepare extended tlvs */
|
|
if (update_rx || update_tx) {
|
|
struct vfpf_vport_update_activate_tlv *p_act_tlv;
|
|
|
|
size = sizeof(struct vfpf_vport_update_activate_tlv);
|
|
p_act_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
|
|
size);
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
|
|
if (update_rx) {
|
|
p_act_tlv->update_rx = update_rx;
|
|
p_act_tlv->active_rx = p_params->vport_active_rx_flg;
|
|
}
|
|
|
|
if (update_tx) {
|
|
p_act_tlv->update_tx = update_tx;
|
|
p_act_tlv->active_tx = p_params->vport_active_tx_flg;
|
|
}
|
|
}
|
|
|
|
if (p_params->update_inner_vlan_removal_flg) {
|
|
struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
|
|
|
|
size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
|
|
p_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
|
|
size);
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
|
|
p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
|
|
}
|
|
|
|
if (p_params->update_tx_switching_flg) {
|
|
struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
|
|
|
|
size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
|
|
tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
|
|
p_tx_switch_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
tlv, size);
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
|
|
p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
|
|
}
|
|
|
|
if (p_params->update_approx_mcast_flg) {
|
|
struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
|
|
|
|
size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
|
|
p_mcast_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_VPORT_UPDATE_MCAST,
|
|
size);
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
|
|
OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
|
|
sizeof(unsigned long) *
|
|
ETH_MULTICAST_MAC_BINS_IN_REGS);
|
|
}
|
|
|
|
update_rx = p_params->accept_flags.update_rx_mode_config;
|
|
update_tx = p_params->accept_flags.update_tx_mode_config;
|
|
|
|
if (update_rx || update_tx) {
|
|
struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
|
|
|
|
tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
|
|
size = sizeof(struct vfpf_vport_update_accept_param_tlv);
|
|
p_accept_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset, tlv, size);
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
|
|
if (update_rx) {
|
|
p_accept_tlv->update_rx_mode = update_rx;
|
|
p_accept_tlv->rx_accept_filter =
|
|
p_params->accept_flags.rx_accept_filter;
|
|
}
|
|
|
|
if (update_tx) {
|
|
p_accept_tlv->update_tx_mode = update_tx;
|
|
p_accept_tlv->tx_accept_filter =
|
|
p_params->accept_flags.tx_accept_filter;
|
|
}
|
|
}
|
|
|
|
if (p_params->rss_params) {
|
|
struct ecore_rss_params *rss_params = p_params->rss_params;
|
|
struct vfpf_vport_update_rss_tlv *p_rss_tlv;
|
|
int i, table_size;
|
|
|
|
size = sizeof(struct vfpf_vport_update_rss_tlv);
|
|
p_rss_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_VPORT_UPDATE_RSS, size);
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
|
|
if (rss_params->update_rss_config)
|
|
p_rss_tlv->update_rss_flags |=
|
|
VFPF_UPDATE_RSS_CONFIG_FLAG;
|
|
if (rss_params->update_rss_capabilities)
|
|
p_rss_tlv->update_rss_flags |=
|
|
VFPF_UPDATE_RSS_CAPS_FLAG;
|
|
if (rss_params->update_rss_ind_table)
|
|
p_rss_tlv->update_rss_flags |=
|
|
VFPF_UPDATE_RSS_IND_TABLE_FLAG;
|
|
if (rss_params->update_rss_key)
|
|
p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
|
|
|
|
p_rss_tlv->rss_enable = rss_params->rss_enable;
|
|
p_rss_tlv->rss_caps = rss_params->rss_caps;
|
|
p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
|
|
|
|
table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE,
|
|
1 << p_rss_tlv->rss_table_size_log);
|
|
for (i = 0; i < table_size; i++) {
|
|
struct ecore_queue_cid *p_queue;
|
|
|
|
p_queue = rss_params->rss_ind_table[i];
|
|
p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id;
|
|
}
|
|
|
|
OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
|
|
sizeof(rss_params->rss_key));
|
|
}
|
|
|
|
if (p_params->update_accept_any_vlan_flg) {
|
|
struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
|
|
|
|
size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
|
|
tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
|
|
p_any_vlan_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
tlv, size);
|
|
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
|
|
p_any_vlan_tlv->update_accept_any_vlan_flg =
|
|
p_params->update_accept_any_vlan_flg;
|
|
}
|
|
|
|
if (p_params->sge_tpa_params) {
|
|
struct ecore_sge_tpa_params *sge_tpa_params;
|
|
struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
|
|
|
|
sge_tpa_params = p_params->sge_tpa_params;
|
|
size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
|
|
p_sge_tpa_tlv = ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
|
|
size);
|
|
resp_size += sizeof(struct pfvf_def_resp_tlv);
|
|
|
|
if (sge_tpa_params->update_tpa_en_flg)
|
|
p_sge_tpa_tlv->update_sge_tpa_flags |=
|
|
VFPF_UPDATE_TPA_EN_FLAG;
|
|
if (sge_tpa_params->update_tpa_param_flg)
|
|
p_sge_tpa_tlv->update_sge_tpa_flags |=
|
|
VFPF_UPDATE_TPA_PARAM_FLAG;
|
|
|
|
if (sge_tpa_params->tpa_ipv4_en_flg)
|
|
p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
|
|
if (sge_tpa_params->tpa_ipv6_en_flg)
|
|
p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
|
|
if (sge_tpa_params->tpa_pkt_split_flg)
|
|
p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
|
|
if (sge_tpa_params->tpa_hdr_data_split_flg)
|
|
p_sge_tpa_tlv->sge_tpa_flags |=
|
|
VFPF_TPA_HDR_DATA_SPLIT_FLAG;
|
|
if (sge_tpa_params->tpa_gro_consistent_flg)
|
|
p_sge_tpa_tlv->sge_tpa_flags |=
|
|
VFPF_TPA_GRO_CONSIST_FLAG;
|
|
|
|
p_sge_tpa_tlv->tpa_max_aggs_num =
|
|
sge_tpa_params->tpa_max_aggs_num;
|
|
p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
|
|
p_sge_tpa_tlv->tpa_min_size_to_start =
|
|
sge_tpa_params->tpa_min_size_to_start;
|
|
p_sge_tpa_tlv->tpa_min_size_to_cont =
|
|
sge_tpa_params->tpa_min_size_to_cont;
|
|
|
|
p_sge_tpa_tlv->max_buffers_per_cqe =
|
|
sge_tpa_params->max_buffers_per_cqe;
|
|
}
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
struct vfpf_first_tlv *req;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_AGAIN;
|
|
goto exit;
|
|
}
|
|
|
|
p_hwfn->b_int_enabled = 0;
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
struct vfpf_first_tlv *req;
|
|
u32 size;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
|
|
if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
|
|
rc = ECORE_AGAIN;
|
|
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
p_hwfn->b_int_enabled = 0;
|
|
|
|
if (p_iov->vf2pf_request)
|
|
OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
|
|
p_iov->vf2pf_request,
|
|
p_iov->vf2pf_request_phys,
|
|
sizeof(union vfpf_tlvs));
|
|
if (p_iov->pf2vf_reply)
|
|
OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
|
|
p_iov->pf2vf_reply,
|
|
p_iov->pf2vf_reply_phys,
|
|
sizeof(union pfvf_tlvs));
|
|
|
|
if (p_iov->bulletin.p_virt) {
|
|
size = sizeof(struct ecore_bulletin_content);
|
|
OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
|
|
p_iov->bulletin.p_virt,
|
|
p_iov->bulletin.phys, size);
|
|
}
|
|
|
|
OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
|
|
|
|
return rc;
|
|
}
|
|
|
|
void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_filter_mcast *p_filter_cmd)
|
|
{
|
|
struct ecore_sp_vport_update_params sp_params;
|
|
int i;
|
|
|
|
OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
|
|
sp_params.update_approx_mcast_flg = 1;
|
|
|
|
if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
|
|
for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
|
|
u32 bit;
|
|
|
|
bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
|
|
OSAL_SET_BIT(bit, sp_params.bins);
|
|
}
|
|
}
|
|
|
|
ecore_vf_pf_vport_update(p_hwfn, &sp_params);
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_filter_ucast
|
|
*p_ucast)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct vfpf_ucast_filter_tlv *req;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* Sanitize */
|
|
if (p_ucast->opcode == ECORE_FILTER_MOVE) {
|
|
DP_NOTICE(p_hwfn, true,
|
|
"VFs don't support Moving of filters\n");
|
|
return ECORE_INVAL;
|
|
}
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
|
|
req->opcode = (u8)p_ucast->opcode;
|
|
req->type = (u8)p_ucast->type;
|
|
OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
|
|
req->vlan = p_ucast->vlan;
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_AGAIN;
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep first tlv */
|
|
ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
|
|
sizeof(struct vfpf_first_tlv));
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset,
|
|
CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
if (rc)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
|
|
rc = ECORE_INVAL;
|
|
goto exit;
|
|
}
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
|
|
return rc;
|
|
}
|
|
|
|
enum _ecore_status_t
|
|
ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,
|
|
struct ecore_queue_cid *p_cid)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct vfpf_update_coalesce *req;
|
|
struct pfvf_def_resp_tlv *resp;
|
|
enum _ecore_status_t rc;
|
|
|
|
/* clear mailbox and prep header tlv */
|
|
req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,
|
|
sizeof(*req));
|
|
|
|
req->rx_coal = rx_coal;
|
|
req->tx_coal = tx_coal;
|
|
req->qid = p_cid->rel.queue_id;
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
|
|
"Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n",
|
|
rx_coal, tx_coal, req->qid);
|
|
|
|
/* add list termination tlv */
|
|
ecore_add_tlv(p_hwfn, &p_iov->offset, CHANNEL_TLV_LIST_END,
|
|
sizeof(struct channel_list_end_tlv));
|
|
|
|
resp = &p_iov->pf2vf_reply->default_resp;
|
|
rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
|
|
|
|
if (rc != ECORE_SUCCESS)
|
|
goto exit;
|
|
|
|
if (resp->hdr.status != PFVF_STATUS_SUCCESS)
|
|
goto exit;
|
|
|
|
p_hwfn->p_dev->rx_coalesce_usecs = rx_coal;
|
|
p_hwfn->p_dev->tx_coalesce_usecs = tx_coal;
|
|
|
|
exit:
|
|
ecore_vf_pf_req_end(p_hwfn, rc);
|
|
return rc;
|
|
}
|
|
|
|
u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
|
|
u16 sb_id)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
|
|
if (!p_iov) {
|
|
DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
|
|
return 0;
|
|
}
|
|
|
|
return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
|
|
}
|
|
|
|
enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
|
|
u8 *p_change)
|
|
{
|
|
struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
|
|
struct ecore_bulletin_content shadow;
|
|
u32 crc, crc_size;
|
|
|
|
crc_size = sizeof(p_iov->bulletin.p_virt->crc);
|
|
*p_change = 0;
|
|
|
|
/* Need to guarantee PF is not in the middle of writing it */
|
|
OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
|
|
|
|
/* If version did not update, no need to do anything */
|
|
if (shadow.version == p_iov->bulletin_shadow.version)
|
|
return ECORE_SUCCESS;
|
|
|
|
/* Verify the bulletin we see is valid */
|
|
crc = ecore_crc32(0, (u8 *)&shadow + crc_size,
|
|
p_iov->bulletin.size - crc_size);
|
|
if (crc != shadow.crc)
|
|
return ECORE_AGAIN;
|
|
|
|
/* Set the shadow bulletin and process it */
|
|
OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
|
|
|
|
DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
|
|
"Read a bulletin update %08x\n", shadow.version);
|
|
|
|
*p_change = 1;
|
|
|
|
return ECORE_SUCCESS;
|
|
}
|
|
|
|
void __ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_mcp_link_params *p_params,
|
|
struct ecore_bulletin_content *p_bulletin)
|
|
{
|
|
OSAL_MEMSET(p_params, 0, sizeof(*p_params));
|
|
|
|
p_params->speed.autoneg = p_bulletin->req_autoneg;
|
|
p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
|
|
p_params->speed.forced_speed = p_bulletin->req_forced_speed;
|
|
p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
|
|
p_params->pause.forced_rx = p_bulletin->req_forced_rx;
|
|
p_params->pause.forced_tx = p_bulletin->req_forced_tx;
|
|
p_params->loopback_mode = p_bulletin->req_loopback;
|
|
}
|
|
|
|
void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_mcp_link_params *params)
|
|
{
|
|
__ecore_vf_get_link_params(p_hwfn, params,
|
|
&p_hwfn->vf_iov_info->bulletin_shadow);
|
|
}
|
|
|
|
void __ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_mcp_link_state *p_link,
|
|
struct ecore_bulletin_content *p_bulletin)
|
|
{
|
|
OSAL_MEMSET(p_link, 0, sizeof(*p_link));
|
|
|
|
p_link->link_up = p_bulletin->link_up;
|
|
p_link->speed = p_bulletin->speed;
|
|
p_link->full_duplex = p_bulletin->full_duplex;
|
|
p_link->an = p_bulletin->autoneg;
|
|
p_link->an_complete = p_bulletin->autoneg_complete;
|
|
p_link->parallel_detection = p_bulletin->parallel_detection;
|
|
p_link->pfc_enabled = p_bulletin->pfc_enabled;
|
|
p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
|
|
p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
|
|
p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
|
|
p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
|
|
p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
|
|
}
|
|
|
|
void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_mcp_link_state *link)
|
|
{
|
|
__ecore_vf_get_link_state(p_hwfn, link,
|
|
&p_hwfn->vf_iov_info->bulletin_shadow);
|
|
}
|
|
|
|
void __ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_mcp_link_capabilities *p_link_caps,
|
|
struct ecore_bulletin_content *p_bulletin)
|
|
{
|
|
OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
|
|
p_link_caps->speed_capabilities = p_bulletin->capability_speed;
|
|
}
|
|
|
|
void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
|
|
struct ecore_mcp_link_capabilities *p_link_caps)
|
|
{
|
|
__ecore_vf_get_link_caps(p_hwfn, p_link_caps,
|
|
&p_hwfn->vf_iov_info->bulletin_shadow);
|
|
}
|
|
|
|
void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
|
|
{
|
|
*num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
|
|
}
|
|
|
|
void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn,
|
|
u8 *num_txqs)
|
|
{
|
|
*num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs;
|
|
}
|
|
|
|
void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
|
|
{
|
|
OSAL_MEMCPY(port_mac,
|
|
p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
|
|
ETH_ALEN);
|
|
}
|
|
|
|
void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
|
|
u8 *num_vlan_filters)
|
|
{
|
|
struct ecore_vf_iov *p_vf;
|
|
|
|
p_vf = p_hwfn->vf_iov_info;
|
|
*num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
|
|
}
|
|
|
|
void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
|
|
u32 *num_sbs)
|
|
{
|
|
struct ecore_vf_iov *p_vf;
|
|
|
|
p_vf = p_hwfn->vf_iov_info;
|
|
*num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
|
|
}
|
|
|
|
void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
|
|
u32 *num_mac_filters)
|
|
{
|
|
struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
|
|
|
|
*num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
|
|
}
|
|
|
|
bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
|
|
{
|
|
struct ecore_bulletin_content *bulletin;
|
|
|
|
bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
|
|
if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
|
|
return true;
|
|
|
|
/* Forbid VF from changing a MAC enforced by PF */
|
|
if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
|
|
return false;
|
|
|
|
return false;
|
|
}
|
|
|
|
bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
|
|
u8 *p_is_forced)
|
|
{
|
|
struct ecore_bulletin_content *bulletin;
|
|
|
|
bulletin = &hwfn->vf_iov_info->bulletin_shadow;
|
|
|
|
if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
|
|
if (p_is_forced)
|
|
*p_is_forced = 1;
|
|
} else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
|
|
if (p_is_forced)
|
|
*p_is_forced = 0;
|
|
} else {
|
|
return false;
|
|
}
|
|
|
|
OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
|
|
|
|
return true;
|
|
}
|
|
|
|
void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn,
|
|
u16 *p_vxlan_port,
|
|
u16 *p_geneve_port)
|
|
{
|
|
struct ecore_bulletin_content *p_bulletin;
|
|
|
|
p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
|
|
|
|
*p_vxlan_port = p_bulletin->vxlan_udp_port;
|
|
*p_geneve_port = p_bulletin->geneve_udp_port;
|
|
}
|
|
|
|
bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
|
|
{
|
|
struct ecore_bulletin_content *bulletin;
|
|
|
|
bulletin = &hwfn->vf_iov_info->bulletin_shadow;
|
|
|
|
if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
|
|
return false;
|
|
|
|
if (dst_pvid)
|
|
*dst_pvid = bulletin->pvid;
|
|
|
|
return true;
|
|
}
|
|
|
|
bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
|
|
{
|
|
return p_hwfn->vf_iov_info->b_pre_fp_hsi;
|
|
}
|
|
|
|
void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
|
|
u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
|
|
u16 *fw_eng)
|
|
{
|
|
struct pf_vf_pfdev_info *info;
|
|
|
|
info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
|
|
|
|
*fw_major = info->fw_major;
|
|
*fw_minor = info->fw_minor;
|
|
*fw_rev = info->fw_rev;
|
|
*fw_eng = info->fw_eng;
|
|
}
|