a339694621
According to latest DSA spec[1], the work-queue config register size
should be based off a value read from the WQ capabilities register.
Update driver to read this value and base the start of each WQ config
off that value.
[1] https://software.intel.com/content/www/us/en/develop/download/intel-data-streaming-accelerator-preliminary-architecture-specification.html
Fixes:
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|---|---|---|
| .. | ||
| dpaa2_cmdif | ||
| dpaa2_qdma | ||
| ifpga | ||
| ioat | ||
| ntb | ||
| octeontx2_dma | ||
| octeontx2_ep | ||
| skeleton | ||
| meson.build | ||