f1e9d2afea
Under heavy load, flow related operations can take more time to
complete. Increase max completion wait time to 10 seconds. Also
increase max receive budget to read more replies from firmware
in every cycle.
Fixes: 9eb2c9a480 ("net/cxgbe: implement flow create operation")
Cc: stable@dpdk.org
Signed-off-by: Rahul Lakkireddy <rahul.lakkireddy@chelsio.com>
45 lines
1.2 KiB
C
45 lines
1.2 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Chelsio Communications.
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* All rights reserved.
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*/
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#ifndef _CXGBE_FLOW_H_
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#define _CXGBE_FLOW_H_
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#include <rte_flow_driver.h>
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#include "cxgbe_filter.h"
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#include "mps_tcam.h"
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#include "cxgbe.h"
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/* Max poll time is 100 * 100msec = 10 sec */
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#define CXGBE_FLOW_POLL_MS 100 /* 100 milliseconds */
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#define CXGBE_FLOW_POLL_CNT 100 /* Max number of times to poll */
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struct chrte_fparse {
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int (*fptr)(const void *mask, /* currently supported mask */
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const struct rte_flow_item *item, /* user input */
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struct ch_filter_specification *fs, /* where to parse */
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struct rte_flow_error *e);
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const void *dmask; /* Specify what is supported by chelsio by default*/
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};
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struct rte_flow {
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struct filter_entry *f;
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struct ch_filter_specification fs; /* temp, to create filter */
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struct chrte_fparse *item_parser;
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/*
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* filter_entry doesn't store user priority.
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* Post creation of filter this will indicate the
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* flow index (fidx) for both hash and tcam filters
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*/
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unsigned int fidx;
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struct rte_eth_dev *dev;
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};
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int
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cxgbe_dev_filter_ctrl(struct rte_eth_dev *dev,
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enum rte_filter_type filter_type,
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enum rte_filter_op filter_op,
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void *arg);
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#endif /* _CXGBE_FLOW_H_ */
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