ec94dbc573
The base driver is the backend module for the QLogic FastLinQ QL4xxxx 25G/40G CNA family of adapters as well as their virtual functions (VF) in SR-IOV context. The purpose of the base module is to: - provide all the common code that will be shared between the various drivers that would be used with said line of products. Flows such as chip initialization and de-initialization fall under this category. - abstract the protocol-specific HW & FW components, allowing the protocol drivers to have clean APIs, which are detached in its slowpath configuration from the actual Hardware Software Interface(HSI). This patch adds a base module without any protocol-specific bits. I.e., this adds a basic implementation that almost entirely falls under the first category. Signed-off-by: Harish Patil <harish.patil@qlogic.com> Signed-off-by: Rasesh Mody <rasesh.mody@qlogic.com> Signed-off-by: Sony Chacko <sony.chacko@qlogic.com> |
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| app | ||
| config | ||
| doc | ||
| drivers | ||
| examples | ||
| lib | ||
| mk | ||
| pkg | ||
| scripts | ||
| tools | ||
| .gitignore | ||
| GNUmakefile | ||
| LICENSE.GPL | ||
| LICENSE.LGPL | ||
| MAINTAINERS | ||
| Makefile | ||
| README | ||
DPDK is a set of libraries and drivers for fast packet processing. It supports many processor architectures and both FreeBSD and Linux. The DPDK uses the Open Source BSD license for the core libraries and drivers. The kernel components are GPLv2 licensed. Please check the doc directory for release notes, API documentation, and sample application information. For questions and usage discussions, subscribe to: users@dpdk.org Report bugs and issues to the development mailing list: dev@dpdk.org