84fb33fec1
Replace use of RTE_MACHINE_CPUFLAG macros with regular compiler macros, which are more complete than those provided by DPDK, and as such it allows new instruction sets to be leveraged without having to do extra work to set them up in DPDK. Signed-off-by: Sean Morrissey <sean.morrissey@intel.com> Signed-off-by: Radu Nicolau <radu.nicolau@intel.com> Acked-by: David Marchand <david.marchand@redhat.com>
61 lines
1.5 KiB
C
61 lines
1.5 KiB
C
/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2017 Cavium, Inc
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*/
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#ifndef __RTE_LRU_ARM64_H__
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#define __RTE_LRU_ARM64_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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#include <rte_vect.h>
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#ifndef RTE_TABLE_HASH_LRU_STRATEGY
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#ifdef __ARM_NEON
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#define RTE_TABLE_HASH_LRU_STRATEGY 3
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#else /* if no NEON, use simple scalar version */
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#define RTE_TABLE_HASH_LRU_STRATEGY 1
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#endif
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#endif
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#if RTE_TABLE_HASH_LRU_STRATEGY == 3
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#define lru_init(bucket) \
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{ bucket->lru_list = ~0LLU; }
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static inline int
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f_lru_pos(uint64_t lru_list)
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{
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/* Compare the vector to zero vector */
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uint16x4_t lru_vec = vld1_u16((uint16_t *)&lru_list);
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uint16x4_t min_vec = vmov_n_u16(vminv_u16(lru_vec));
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uint64_t mask = vget_lane_u64(vreinterpret_u64_u16(
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vceq_u16(min_vec, lru_vec)), 0);
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return __builtin_clzl(mask) >> 4;
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}
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#define lru_pos(bucket) f_lru_pos(bucket->lru_list)
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#define lru_update(bucket, mru_val) \
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do { \
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const uint64_t orvals[] = {0xFFFFLLU, 0xFFFFLLU << 16, \
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0xFFFFLLU << 32, 0xFFFFLLU << 48, 0LLU}; \
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const uint64_t decs[] = {0x1000100010001LLU, 0}; \
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uint64x1_t lru = vdup_n_u64(bucket->lru_list); \
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uint64x1_t vdec = vdup_n_u64(decs[mru_val>>2]); \
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bucket->lru_list = vget_lane_u64(vreinterpret_u64_u16( \
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vsub_u16(vreinterpret_u16_u64(lru), \
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vreinterpret_u16_u64(vdec))), \
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0); \
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bucket->lru_list |= orvals[mru_val]; \
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} while (0)
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif
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