Satheesh Paul fe8e6571d5 common/cnxk: correct ROC naming conventions ...

Corrected some names to follow ROC naming convention in ROC NPC code.

Signed-off-by: Satheesh Paul <psatheesh@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>

2022-04-25 07:07:25 +02:00

..

baseband

baseband/acc100: avoid out-of-bounds access

2022-02-23 11:59:51 +01:00

bus

net/dpaa2: update management complex to 10.32

2022-05-10 15:43:08 +02:00

common

common/cnxk: correct ROC naming conventions

2022-04-25 07:07:25 +02:00

compress

compress/octeontx: support OCTEON TX2 SoC family

2022-04-29 11:36:46 +02:00

crypto

crypto/dpaa_sec: move cdb preparation to session create

2022-04-29 11:27:35 +02:00

dma

dma/idxd: configure maximum batch size to high value

2022-02-23 16:45:16 +01:00

event

event/dlb2: add shift value check in sparse dequeue

2022-03-03 10:25:17 +01:00

gpu

gpu/cuda: add more NVIDIA devices

2022-04-14 10:01:11 +02:00

mempool

mempool/cnxk: fix batch allocation failure path

2022-02-23 17:33:53 +01:00

net

net/cnxk: support mark pattern item type

2022-04-24 05:52:58 +02:00

raw

raw/ifpga: fix build with optimization

2022-03-16 20:35:04 +01:00

regex

remove extra blank line at EOF

2022-02-27 21:26:06 +01:00

vdpa

vdpa/mlx5: make statistics counter persistent

2022-05-09 21:39:58 +02:00

meson.build

build: make ring mempool driver mandatory

2022-02-22 15:38:19 +01:00