SPDK: add the support to use pci functions provided by DPDK
This patch did the work to use pci related functions provided by DPDK. Change-Id: I263b79f1b42868ef0c1efcf1bc392a4b3a328e93 Signed-off-by: Ziye Yang <ziye.yang@intel.com>
This commit is contained in:
Ziye Yang
Daniel Verkamp
parent
ff6125195c
commit
3c10754a8d
@ -40,6 +40,7 @@
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#include <inttypes.h>
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#include <stdbool.h>
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#include "spdk/pci.h"
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/**
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* Signature for callback function invoked when a request is completed.
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@ -35,6 +35,7 @@
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#define SPDK_NVME_H
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#include <stddef.h>
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#include "spdk/pci.h"
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#include "nvme_spec.h"
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/** \file
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@ -35,6 +35,7 @@
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#define SPDK_PCI_H
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#ifdef USE_PCIACCESS
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#include <pciaccess.h>
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#define spdk_pci_device_get_domain(dev) (dev->domain)
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#define spdk_pci_device_get_bus(dev) (dev->bus)
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#define spdk_pci_device_get_dev(pdev) (pdev->dev)
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@ -43,6 +44,17 @@
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#define spdk_pci_device_get_device_id(dev) (dev->device_id)
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#define spdk_pci_device_get_subvendor_id(dev) (dev->subvendor_id)
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#define spdk_pci_device_get_subdevice_id(dev) (dev->subdevice_id)
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#else
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#include <rte_pci.h>
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typedef struct rte_pci_device spdk_pci_device;
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typedef struct rte_pci_driver spdk_pci_driver;
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#define spdk_pci_device_get_domain(dev) (dev->addr.domain)
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#define spdk_pci_device_get_bus(dev) (dev->addr.bus)
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#define spdk_pci_device_get_dev(dev) (dev->addr.devid)
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#define spdk_pci_device_get_func(dev) (dev->addr.function)
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#endif
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#define PCI_CFG_SIZE 256
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@ -3,7 +3,6 @@
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#include <assert.h>
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#include <pthread.h>
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#include <pciaccess.h>
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#include <stdio.h>
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#include <rte_malloc.h>
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#include <rte_config.h>
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@ -11,6 +10,10 @@
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#include <rte_cycles.h>
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#include "spdk/vtophys.h"
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#include "spdk/pci.h"
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#include "spdk/ioat.h"
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#include "ioat_pci.h"
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/**
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* \file
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@ -84,6 +87,90 @@ ioat_pcicfg_unmap_bar(void *devhandle, uint32_t bar, void *addr)
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return pci_device_unmap_range(dev, addr, dev->regions[bar].size);
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}
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#else
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/* var should be the pointer */
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#define ioat_pcicfg_read32(handle, var, offset) rte_eal_pci_read_config(handle, var, 4, offset)
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#define ioat_pcicfg_write32(handle, var, offset) rte_eal_pci_write_config(handle, var, 4, offset)
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static inline int
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ioat_pcicfg_map_bar(void *devhandle, uint32_t bar, uint32_t read_only, void **mapped_addr)
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{
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struct rte_pci_device *dev = devhandle;
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*mapped_addr = dev->mem_resource[bar].addr;
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return 0;
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}
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static struct rte_pci_id ioat_driver_id[] = {
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB0)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB1)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB2)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB3)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB4)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB5)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB6)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB7)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_SNB8)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB0)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB1)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB2)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB3)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB4)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB5)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB6)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB7)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB8)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_IVB9)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW0)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW2)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW3)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW4)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW5)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW6)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW7)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW8)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_HSW9)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD0)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD1)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD2)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BWD3)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE0)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE1)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE2)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDXDE3)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX0)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX1)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX2)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX3)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX4)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX5)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX6)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX7)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX8)},
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{RTE_PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_IOAT_BDX9)},
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{ .vendor_id = 0, /* sentinel */ },
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};
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static struct rte_pci_driver ioat_rte_driver = {
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.name = "ioat_driver",
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.devinit = NULL,
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.id_table = ioat_driver_id,
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.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
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};
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static inline int
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ioat_driver_register_dev_init(void *fn_t)
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{
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int rc;
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ioat_rte_driver.devinit = fn_t;
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rte_eal_pci_register(&ioat_rte_driver);
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rc = rte_eal_pci_probe();
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rte_eal_pci_unregister(&ioat_rte_driver);
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return rc;
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}
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#endif
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typedef pthread_mutex_t ioat_mutex_t;
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@ -35,8 +35,9 @@
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#define __NVME_IMPL_H__
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#include "spdk/vtophys.h"
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#include "spdk/pci.h"
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#include "spdk/nvme_spec.h"
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#include <assert.h>
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#include <pciaccess.h>
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#include <rte_malloc.h>
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#include <rte_config.h>
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#include <rte_mempool.h>
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@ -172,7 +173,52 @@ nvme_pcicfg_unmap_bar(void *devhandle, uint32_t bar, void *addr)
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return pci_device_unmap_range(dev, addr, dev->regions[bar].size);
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}
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#endif
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#else
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/* var should be the pointer */
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#define nvme_pcicfg_read32(handle, var, offset) rte_eal_pci_read_config(handle, var, 4, offset)
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#define nvme_pcicfg_write32(handle, var, offset) rte_eal_pci_write_config(handle, var, 4, offset)
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static inline int
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nvme_pcicfg_map_bar(void *devhandle, uint32_t bar, uint32_t read_only, void **mapped_addr)
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{
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struct rte_pci_device *dev = devhandle;
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*mapped_addr = dev->mem_resource[bar].addr;
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return 0;
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}
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static inline int
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nvme_pcicfg_unmap_bar(void *devhandle, uint32_t bar, void *addr)
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{
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return 0;
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}
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static struct rte_pci_id nvme_pci_driver_id[] = {
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{RTE_PCI_DEVICE(0x8086, 0x0953)},
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{ .vendor_id = 0, /* sentinel */ },
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};
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static struct rte_pci_driver nvme_rte_driver = {
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.name = "nvme_driver",
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.devinit = NULL,
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.id_table = nvme_pci_driver_id,
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.drv_flags = RTE_PCI_DRV_NEED_MAPPING,
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};
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static inline int nvme_driver_register_dev_init(pci_driver_init fn_t)
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{
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int rc;
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nvme_rte_driver.devinit = fn_t;
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rte_eal_pci_register(&nvme_rte_driver);
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rc = rte_eal_pci_probe();
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rte_eal_pci_unregister(&nvme_rte_driver);
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return rc;
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}
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#endif /* !USE_PCIACCESS */
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typedef pthread_mutex_t nvme_mutex_t;
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@ -41,8 +41,6 @@
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#include <sys/stat.h>
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#include <sys/types.h>
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#include <pciaccess.h>
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#ifdef __FreeBSD__
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#include <sys/pciio.h>
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#endif
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@ -51,13 +49,51 @@
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#define SYSFS_PCI_DEVICES "/sys/bus/pci/devices"
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#define SYSFS_PCI_DRIVERS "/sys/bus/pci/drivers"
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#define PCI_PRI_FMT "%04x:%02x:%02x.%1u"
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#define SPDK_PCI_PATH_MAX 256
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#ifdef USE_PCIACCESS
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#define PCI_PRI_FMT "%04x:%02x:%02x.%1u"
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/* var should be the pointer */
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#define spdk_pcicfg_read32(handle, var, offset) pci_device_cfg_read_u32(handle, var, offset)
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#define spdk_pcicfg_write32(handle, var, offset) pci_device_cfg_write_u32(handle, *var, offset)
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#else
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/* var should be the pointer */
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#define spdk_pcicfg_read32(handle, var, offset) rte_eal_pci_read_config(handle, var, 4, offset)
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#define spdk_pcicfg_write32(handle, var, offset) rte_eal_pci_write_config(handle, var, 4, offset)
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#endif
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#ifndef USE_PCIACCESS
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static int pci_device_get_info(struct pci_device *dev, const char *file, uint32_t *val)
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{
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char filename[SPDK_PCI_PATH_MAX];
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FILE *fd;
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char buf[10];
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char *end = NULL;
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snprintf(filename, sizeof(filename),
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SYSFS_PCI_DEVICES "/" PCI_PRI_FMT "/%s",
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spdk_pci_device_get_domain(dev), spdk_pci_device_get_bus(dev),
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spdk_pci_device_get_dev(dev), spdk_pci_device_get_func(dev), file);
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fd = fopen(filename, "r");
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if (!fd)
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return -1;
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if (fgets(buf, sizeof(buf), fd) == NULL) {
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fclose(fd);
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return -1;
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}
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*val = strtoul(buf, &end, 0);
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if ((buf[0] == '\0') || (end == NULL) || (*end != '\n')) {
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fclose(fd);
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return -1;
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}
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fclose(fd);
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return 0;
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}
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#endif
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int
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