75440d0537
Correct explanation of NVMe SQ command submission Change-Id: Ibdb3d13369c916708269c18fc04d5680044fce8e Signed-off-by: Michael Bang <mi.bang@samsung.com> Reviewed-on: https://review.spdk.io/gerrit/c/spdk/spdk/+/6027 Community-CI: Mellanox Build Bot Reviewed-by: Changpeng Liu <changpeng.liu@intel.com> Reviewed-by: sunshihao <sunshihao@huawei.com> Reviewed-by: Jim Harris <james.r.harris@intel.com> Reviewed-by: Aleksey Marchuk <alexeymar@mellanox.com> Tested-by: SPDK CI Jenkins <sys_sgci@intel.com>
124 lines
7.4 KiB
Markdown
124 lines
7.4 KiB
Markdown
# Submitting I/O to an NVMe Device {#nvme_spec}
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## The NVMe Specification
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The NVMe specification describes a hardware interface for interacting with
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storage devices. The specification includes network transport definitions for
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remote storage as well as a hardware register layout for local PCIe devices.
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What follows here is an overview of how an I/O is submitted to a local PCIe
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device through SPDK.
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NVMe devices allow host software (in our case, the SPDK NVMe driver) to allocate
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queue pairs in host memory. The term "host" is used a lot, so to clarify that's
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the system that the NVMe SSD is plugged into. A queue pair consists of two
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queues - a submission queue and a completion queue. These queues are more
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accurately described as circular rings of fixed size entries. The submission
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queue is an array of 64 byte command structures, plus 2 integers (head and tail
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indices). The completion queue is similarly an array of 16 byte completion
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structures, plus 2 integers (head and tail indices). There are also two 32-bit
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registers involved that are called doorbells.
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An I/O is submitted to an NVMe device by constructing a 64 byte command, placing
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it into the submission queue at the current location of the submission queue
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tail index, and then writing the new index of the submission queue tail to the
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submission queue tail doorbell register. It's actually valid to copy a whole set
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of commands into open slots in the ring and then write the doorbell just one
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time to submit the whole batch.
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There is a very detailed description of the command submission and completion
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process in the NVMe specification, which is conveniently available from the main
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page over at [NVM Express](https://nvmexpress.org).
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Most importantly, the command itself describes the operation and also, if
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necessary, a location in host memory containing a descriptor for host memory
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associated with the command. This host memory is the data to be written on a
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write command, or the location to place the data on a read command. Data is
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transferred to or from this location using a DMA engine on the NVMe device.
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The completion queue works similarly, but the device is instead the one writing
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entries into the ring. Each entry contains a "phase" bit that toggles between 0
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and 1 on each loop through the entire ring. When a queue pair is set up to
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generate interrupts, the interrupt contains the index of the completion queue
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head. However, SPDK doesn't enable interrupts and instead polls on the phase
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bit to detect completions. Interrupts are very heavy operations, so polling this
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phase bit is often far more efficient.
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## The SPDK NVMe Driver I/O Path
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Now that we know how the ring structures work, let's cover how the SPDK NVMe
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driver uses them. The user is going to construct a queue pair at some early time
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in the life cycle of the program, so that's not part of the "hot" path. Then,
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they'll call functions like spdk_nvme_ns_cmd_read() to perform an I/O operation.
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The user supplies a data buffer, the target LBA, and the length, as well as
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other information like which NVMe namespace the command is targeted at and which
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NVMe queue pair to use. Finally, the user provides a callback function and
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context pointer that will be called when a completion for the resulting command
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is discovered during a later call to spdk_nvme_qpair_process_completions().
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The first stage in the driver is allocating a request object to track the operation. The
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operations are asynchronous, so it can't simply track the state of the request
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on the call stack. Allocating a new request object on the heap would be far too
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slow, so SPDK keeps a pre-allocated set of request objects inside of the NVMe
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queue pair object - `struct spdk_nvme_qpair`. The number of requests allocated to
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the queue pair is larger than the actual queue depth of the NVMe submission
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queue because SPDK supports a couple of key convenience features. The first is
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software queueing - SPDK will allow the user to submit more requests than the
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hardware queue can actually hold and SPDK will automatically queue in software.
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The second is splitting. SPDK will split a request for many reasons, some of
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which are outlined next. The number of request objects is configurable at queue
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pair creation time and if not specified, SPDK will pick a sensible number based
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on the hardware queue depth.
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The second stage is building the 64 byte NVMe command itself. The command is
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built into memory embedded into the request object - not directly into an NVMe
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submission queue slot. Once the command has been constructed, SPDK attempts to
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obtain an open slot in the NVMe submission queue. For each element in the
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submission queue an object called a tracker is allocated. The trackers are
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allocated in an array, so they can be quickly looked up by an index. The tracker
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itself contains a pointer to the request currently occupying that slot. When a
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particular tracker is obtained, the command's CID value is updated with the
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index of the tracker. The NVMe specification provides that CID value in the
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completion, so the request can be recovered by looking up the tracker via the
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CID value and then following the pointer.
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Once a tracker (slot) is obtained, the data buffer associated with it is
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processed to build a PRP list. That's essentially an NVMe scatter gather list,
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although it is a bit more restricted. The user provides SPDK with the virtual
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address of the buffer, so SPDK has to go do a page table look up to find the
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physical address (pa) or I/O virtual addresses (iova) backing that virtual
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memory. A virtually contiguous memory region may not be physically contiguous,
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so this may result in a PRP list with multiple elements. Sometimes this may
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result in a set of physical addresses that can't actually be expressed as a
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single PRP list, so SPDK will automatically split the user operation into two
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separate requests transparently. For more information on how memory is managed,
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see @ref memory.
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The reason the PRP list is not built until a tracker is obtained is because the
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PRP list description must be allocated in DMA-able memory and can be quite
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large. Since SPDK typically allocates a large number of requests, we didn't want
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to allocate enough space to pre-build the worst case scenario PRP list,
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especially given that the common case does not require a separate PRP list at
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all.
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Each NVMe command has two PRP list elements embedded into it, so a separate PRP
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list isn't required if the request is 4KiB (or if it is 8KiB and aligned
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perfectly). Profiling shows that this section of the code is not a major
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contributor to the overall CPU use.
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With a tracker filled out, SPDK copies the 64 byte command into the actual NVMe
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submission queue slot and then rings the submission queue tail doorbell to tell
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the device to go process it. SPDK then returns back to the user, without waiting
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for a completion.
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The user can periodically call `spdk_nvme_qpair_process_completions()` to tell
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SPDK to examine the completion queue. Specifically, it reads the phase bit of
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the next expected completion slot and when it flips, looks at the CID value to
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find the tracker, which points at the request object. The request object
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contains a function pointer that the user provided initially, which is then
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called to complete the command.
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The `spdk_nvme_qpair_process_completions()` function will keep advancing to the
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next completion slot until it runs out of completions, at which point it will
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write the completion queue head doorbell to let the device know that it can use
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the completion queue slots for new completions and return.
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